// SPDX-License-Identifier: GPL-2.0-or-later /* * sun4i-ss-cipher.c - hardware cryptographic accelerator for Allwinner A20 SoC * * Copyright (C) 2013-2015 Corentin LABBE <clabbe.montjoie@gmail.com> * * This file add support for AES cipher with 128,192,256 bits * keysize in CBC and ECB mode. * Add support also for DES and 3DES in CBC and ECB mode. * * You could find the datasheet in Documentation/arch/arm/sunxi.rst
*/ #include"sun4i-ss.h"
staticint noinline_for_stack sun4i_ss_opti_poll(struct skcipher_request *areq)
{ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); struct sun4i_tfm_ctx *op = crypto_skcipher_ctx(tfm); struct sun4i_ss_ctx *ss = op->ss; unsignedint ivsize = crypto_skcipher_ivsize(tfm); struct sun4i_cipher_req_ctx *ctx = skcipher_request_ctx(areq);
u32 mode = ctx->mode; /* when activating SS, the default FIFO space is SS_RX_DEFAULT(32) */
u32 rx_cnt = SS_RX_DEFAULT;
u32 tx_cnt = 0;
u32 spaces;
u32 v; int err = 0; unsignedint i; unsignedint ileft = areq->cryptlen; unsignedint oleft = areq->cryptlen; unsignedint todo; unsignedlong pi = 0, po = 0; /* progress for in and out */ bool miter_err; struct sg_mapping_iter mi, mo; unsignedint oi, oo; /* offset for in and out */ unsignedlong flags; struct skcipher_alg *alg = crypto_skcipher_alg(tfm); struct sun4i_ss_alg_template *algt;
if (!areq->cryptlen) return 0;
if (!areq->src || !areq->dst) {
dev_err_ratelimited(ss->dev, "ERROR: Some SGs are NULL\n"); return -EINVAL;
}
/* * if we have only SGs with size multiple of 4, * we can use the SS optimized function
*/ while (in_sg && no_chunk == 1) { if ((in_sg->length | in_sg->offset) & 3u)
no_chunk = 0;
in_sg = sg_next(in_sg);
} while (out_sg && no_chunk == 1) { if ((out_sg->length | out_sg->offset) & 3u)
no_chunk = 0;
out_sg = sg_next(out_sg);
}
if (no_chunk == 1 && !need_fallback) return sun4i_ss_opti_poll(areq);
if (need_fallback) return sun4i_ss_cipher_poll_fallback(areq);
while (oleft) { if (ileft) {
sg_miter_start(&mi, areq->src, sg_nents(areq->src),
SG_MITER_FROM_SG | SG_MITER_ATOMIC); if (pi)
sg_miter_skip(&mi, pi);
miter_err = sg_miter_next(&mi); if (!miter_err || !mi.addr) {
dev_err_ratelimited(ss->dev, "ERROR: sg_miter return null\n");
err = -EINVAL; goto release_ss;
} /* * todo is the number of consecutive 4byte word that we * can read from current SG
*/
todo = min(rx_cnt, ileft / 4);
todo = min_t(size_t, todo, (mi.length - oi) / 4); if (todo && !ob) {
writesl(ss->base + SS_RXFIFO, mi.addr + oi,
todo);
ileft -= todo * 4;
oi += todo * 4;
} else { /* * not enough consecutive bytes, so we need to * linearize in buf. todo is in bytes * After that copy, if we have a multiple of 4 * we need to be able to write all buf in one * pass, so it is why we min() with rx_cnt
*/
todo = min(rx_cnt * 4 - ob, ileft);
todo = min_t(size_t, todo, mi.length - oi);
memcpy(ss->buf + ob, mi.addr + oi, todo);
ileft -= todo;
oi += todo;
ob += todo; if (!(ob % 4)) {
writesl(ss->base + SS_RXFIFO, ss->buf,
ob / 4);
ob = 0;
}
} if (oi == mi.length) {
pi += mi.length;
oi = 0;
}
sg_miter_stop(&mi);
}
if (!tx_cnt) continue;
sg_miter_start(&mo, areq->dst, sg_nents(areq->dst),
SG_MITER_TO_SG | SG_MITER_ATOMIC); if (po)
sg_miter_skip(&mo, po);
miter_err = sg_miter_next(&mo); if (!miter_err || !mo.addr) {
dev_err_ratelimited(ss->dev, "ERROR: sg_miter return null\n");
err = -EINVAL; goto release_ss;
} /* todo in 4bytes word */
todo = min(tx_cnt, oleft / 4);
todo = min_t(size_t, todo, (mo.length - oo) / 4);
if (todo) {
readsl(ss->base + SS_TXFIFO, mo.addr + oo, todo);
oleft -= todo * 4;
oo += todo * 4; if (oo == mo.length) {
po += mo.length;
oo = 0;
}
} else { /* * read obl bytes in bufo, we read at maximum for * emptying the device
*/
readsl(ss->base + SS_TXFIFO, ss->bufo, tx_cnt);
obl = tx_cnt * 4;
obo = 0; do { /* * how many bytes we can copy ? * no more than remaining SG size * no more than remaining buffer * no need to test against oleft
*/
todo = min_t(size_t,
mo.length - oo, obl - obo);
memcpy(mo.addr + oo, ss->bufo + obo, todo);
oleft -= todo;
obo += todo;
oo += todo; if (oo == mo.length) {
po += mo.length;
sg_miter_next(&mo);
oo = 0;
}
} while (obo < obl); /* bufo must be fully used here */
}
sg_miter_stop(&mo);
} if (areq->iv) { if (mode & SS_DECRYPTION) {
memcpy(areq->iv, ctx->backup_iv, ivsize);
memzero_explicit(ctx->backup_iv, ivsize);
} else {
scatterwalk_map_and_copy(areq->iv, areq->dst, areq->cryptlen - ivsize,
ivsize, 0);
}
}
/* check and set the AES key, prepare the mode to be used */ int sun4i_ss_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, unsignedint keylen)
{ struct sun4i_tfm_ctx *op = crypto_skcipher_ctx(tfm); struct sun4i_ss_ctx *ss = op->ss;
/* check and set the DES key, prepare the mode to be used */ int sun4i_ss_des_setkey(struct crypto_skcipher *tfm, const u8 *key, unsignedint keylen)
{ struct sun4i_tfm_ctx *op = crypto_skcipher_ctx(tfm); int err;
err = verify_skcipher_des_key(tfm, key); if (err) return err;
/* check and set the 3DES key, prepare the mode to be used */ int sun4i_ss_des3_setkey(struct crypto_skcipher *tfm, const u8 *key, unsignedint keylen)
{ struct sun4i_tfm_ctx *op = crypto_skcipher_ctx(tfm); int err;
err = verify_skcipher_des3_key(tfm, key); if (err) return err;
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