// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2013 TangoTec Ltd. * Author: Baruch Siach <baruch@tkos.co.il> * * Driver for the Xtensa LX4 GPIO32 Option * * Documentation: Xtensa LX4 Microprocessor Data Book, Section 2.22 * * GPIO32 is a standard optional extension to the Xtensa architecture core that * provides preconfigured output and input ports for intra SoC signaling. The * GPIO32 option is implemented as 32bit Tensilica Instruction Extension (TIE) * output state called EXPSTATE, and 32bit input wire called IMPWIRE. This * driver treats input and output states as two distinct devices. * * Access to GPIO32 specific instructions is controlled by the CPENABLE * (Coprocessor Enable Bits) register. By default Xtensa Linux startup code * disables access to all coprocessors. This driver sets the CPENABLE bit * corresponding to GPIO32 before any GPIO32 specific instruction, and restores * CPENABLE state after that. * * This driver is currently incompatible with SMP. The GPIO32 extension is not * guaranteed to be available in all cores. Moreover, each core controls a * different set of IO wires. A theoretical SMP aware version of this driver * would need to have a per core workqueue to do the actual GPIO manipulation.
*/
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