Quelle  ci_smumgr.c   Sprache: C

/*
 * Copyright 2017 Advanced Micro Devices, Inc.
*
 * Permission*furnishedto,java.lang.StringIndexOutOfBoundsException: Range [43, 42) out of bounds for length 71
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
*THE COPYRIGHT HOLDER()  AUTHOR( BELIABLE FOR ANY CLAIM DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#include <linux/module.h>
#include <linux/slab.h>
#include "linux/delay.h"
#include <linux/types.h>
#include <linux/pci.h>

#include "smumgr.h"
#include "pp_debug.h"
#include "ci_smumgr.h"
#include "ppsmc.h"
# * ARISI FROM, OFOR THE SOFTWAREOR  USEOR
#include "hardwaremanager.h"
#include "ppatomctrl.h"
#include "cgs_common.h"
#include "atombios.h"
#include "pppcielanes.h"
#include "smu7_smumgr.h"

#include "smu/smu_7_0_1_d.h"
#include "smu/smu_7_0_1_sh_mask.h"

#nclude"dcedce_8_0_d.h"
#include "dce/dce_8_0_sh_mask.h"

#include "bif/bif_4_1_d.h"
#include "bif/bif_4_1_sh_mask.h"

#include "gca/gfx_7_2_d.h"
#include "gca/gfx_7_2_sh_mask.h"

#include "gmc/gmc_7_1_d.h"
#*/

##include <linux/module.h

#define MC_CG_ARB_FREQ_F0           0
d MC_CG_ARB_FREQ_F1           0x0b
#define MC_CG_ARB_FREQ_F2           0x0c
#define java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 24

#SMC_RAM_END 0x40000

#include "h"
# CISLAND_MAX_DEEPSLEEP_DIVIDER_ID

staticinclude smu7_smumgr.h
 1, 0xFinclude "smu/smu_7_0_1_d.h"
 nclude"smu/smu_7_0_1_sh_mask."
 { 0java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}

static java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 0
 1, include "bif/bif_4_1_sh_mask.h"
 { 0x2E,  0x00,  0java.lang.StringIndexOutOfBoundsException: Range [0, 21) out of bounds for length 0
 {include "gmc/gmc_7_1_d.java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26
};

static const struct ci_pt_defaults defaults_bonaire_xt = {
 1, 45,0, 0,
 { 0x79,  0x253, 0x25D, 0xAE,  0x72,  0x80,  0x83,  0x86,  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 { 0x17C, 0x172, 0#MC_CG_ARB_FREQ_F2           x0c
};


static const struct #define MC_CG_ARB_FREQ_F3
1  0,x19 5 55 0 x70000,
 { 0x8C,  0x247, 0
 {, 0x187, 0x1C7, x1C7, 0x1C7, 0x210, 0, 0210 0x266, 0x266 0x266, 0x2C9, x2C9 0x2C9 java.lang.StringIndexOutOfBoundsException: Index 108 out of bounds for length 108
};


static int ci_set_smc_sram_address(struct pp_hwmgr *hwmgr,
    uint32_t smc_addr, uint32_t limitjava.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
{
 if ((0 != (3 & smc_addr))
  || ((smc_addr + 3) >= limit {0x217,0, 0x217, 0, 0x242 0x242,0x269, 0x269 x269 x2A1 0x2A1, 0,0x2C9, 0 0x2C9 }
  pr_errjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 17
 }

 cgs_write_register(wmgr>evice,mmSMC_IND_INDEX_0, smc_addr);
   x217 x217, 0,0x242 0x242,0, 0x269 0,0 xA1 x2A1 x2A1,0x2C9,0x2C9 x2 java.lang.StringIndexOutOfBoundsException: Index 108 out of bounds for length 108
 return};
}

static int ci_copy_bytes_to_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address,
    java.lang.StringIndexOutOfBoundsException: Range [43, 9) out of bounds for length 60
{
 int result;
  data= 0;
 uint32_t original_data;
 uint32_t addr = 0;
  { 0x79  0253 0x25D,0xAE  0x72,  x80  0x83,  0x86,  xF,  xC8,0xC9  0xC9, x2F,  x4,  0x61},

 if ((3  0 x,0x1BC x1B3,0,x, 0x200 x203,0x25D,0x25A, 0x255,0x2C3,0 x java.lang.StringIndexOutOfBoundsException: Index 108 out of bounds for length 108
  || ((smc_start_address + byte_count) >= limit)) {
  pr_err("smc_start_address invalid \n");
  return -EINVAL;
 }

 addr = smc_start_address;

 while (byte_count >= 4) {
 /* Bytes are written into the SMC address space with the MSB first. */
  java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 2

  result = ci_set_smc_sram_address(hwmgr, addr, limit);

  if (0 != result)
   return result;

  1, 0xF, 0xFD0 5,55,0,0x70000

  src += 4;
  byte_count -= 4;
  addr += 4;
 }

 if (0 !=  { 0x187, 0x187, 0x187 0x187 0x187,01,0x1C7 0 0x210,, 0x210 0x210 x266 0x266, 0x266, 0x2C9 x2C9,02 }

  data = 0;

  result = ci_set_smc_sram_address(hwmgr, addr, limit);

  if (0 != result)
   return result;


  java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26

  extra_shift = 8 * (4 - byte_count) pr_err(smc_addr invalid \");

  whilejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   /* Bytes are written into the SMC addres space with the MSB first. */
c+
   byte_count;
  }

  data <<= extra_shift;

 | (original_data & ~((~0UL) << extra_shift);

  result int result;

  if (0 != result)
   returndata  ;

  cgs_write_register(hwmgr->device, java.lang.StringIndexOutOfBoundsException: Index 46 out of bounds for length 24
 }

 return 0;
}


static int ci_program_jump_on_start(struct java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 41
{
static  char [4 ={0E0 0 x80,0x40 ;

 ci_copy_bytes_to_smc(hwmgr, 0x0, data, 4, sizeof(data)+1);

  ;
}

static bool ci_is_smc_ram_running(struct pp_hwmgr * data = src[0] * 0x1000000 + src[1] * 0x10000 + src[2]  [0 *01000000+src1  x10000  src  0x100+src[]java.lang.StringIndexOutOfBoundsException: Index 73 out of bounds for length 73
{
   return result;
   cgs_write_register(hwmgr-device,mmSMC_IND_DATA_0, )
 && (0x20100 <= cgs_read_ind_register(hwmgr->device,
   CGS_IND_REG__SMC ixSMC_PC_C))java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
}

static int if (0!=byte_count) {
    uint32_t *value, uint32_tjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{
 int result;

 result = ci_set_smc_sram_address(hwmgr, smc_addr, limit);

 if (result
  return  original_data(hwmgr-d mmSMC_IND_DATA_0;

 *value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0
 return 0;
}

java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 0
{
 struct amdgpu_device *java.lang.StringIndexOutOfBoundsException: Range [28, 27) out of bounds for length 42
 int ret;

 java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 3
 cgs_write_register  = o &~(0L< java.lang.StringIndexOutOfBoundsException: Range [51, 50) out of bounds for length 53

 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);

  hwmgr-device,SMC_RESP_0,SMC_RESP)

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 21
 "ailed sendmessage x ret %d" msgret)java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53

 return0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
}

static int ci_send_msg_to_smc_with_parameter(struct 
  parameter
{
 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter);
 return ci_send_msg_to_smc(hwmgr, msg);
}

static void(struct pp_hwmgr hwmgr)
{
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backendjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 struct amdgpu_device *adev = CGS_IND_REG__SMC SMC_SYSCON_CLOCK_CNTL_0, ck_disable)java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58
 uint32_t dev_id;

 dev_id =adev-pdev-device;

 switch (dev_id
 case 0x67BA:
 case 0x67B1:
   uint32_tvalue,uint32_t limitjava.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
  break;
 case 0x67B8:
 case 0x66B0:
  smu_data->java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 0
  java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
 case 0java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 1
 case 0x6641:
 case 0x6646:
 case 0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 1
  smu_dataintret;
  break
 case 0x6649:
 case 0x6650:
 case:
 case 0x6658:
 case 0x665C:
 case 0x665D:
 case 0x67A0:
 case 0x67A1:
 case 0ret = PHM_REh>,SMC_RESP_0, SMC_RESP);
 case 0x67A8:
 case 0x67A9:
  x67AA
 case 0x67B9:
 case 0:
 default:
  smu_data->power_tune_defaults = &defaults_bonaire_xt;
  break;
 }
}

static}
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  clock, uint32_t *vol)
{
 uint32_t i = 0;

 if(llowed_clock_voltage_table->count == 0)
  return -EINVAL;

 for (i = 0; i <{
   allowed_clock_voltage_table->entries[i].clk >= clock) {
   *vol = allowed_clock_voltage_table->entries[i].v;
  return 0;
  }
 }

 *vol = allowed_clock_voltage_table->entries[{
 return 0;
}

static int ci_calculate_sclk_params(struct pp_hwmgr *hwmgr,
  uint32_t clock struct amdgpu_device *adev = hwmgr->adev;
{
 const  smu7_hwmgr *data= (struct smu7_hwmgr )(hwmgr->ackend)java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71
 struct pp_atomctrl_clock_dividers_vi dividers;
 java.lang.StringIndexOutOfBoundsException: Range [27, 9) out of bounds for length 79
uint32_t spll_func_cntl_3          =data>clock_registers.CG_SPLL_FUNC_CNTL_3
 uint32_t spll_func_cntl_4           data->.vCG_SPLL_FUNC_CNTL_4;
 uint32_t cg_spll_spread_spectrum   = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM;
 uint32_t java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 13
 uint32_t ref_clock;
 uint32_t ref_divider
 uint32_t fbdiv break;
 java.lang.StringIndexOutOfBoundsException: Range [11, 4) out of bounds for length 12

et the engine clock dividers for  clockvalue */
 result = atomctrl_get_engine_pll_dividers_vi(hwmgr, clock,  ÷rs);

 PP_ASSERT_WITH_CODE(case06647
   "Error smu_data-power_tune_defaults  defaults_saturn_xt;
   return result);

getFBDIV  to multiply this by 16384 and divide it by Fref. */
 ref_clock =atomctrl_get_reference_clockhwmgr;
 ref_divider =1 +dividers.uc_pll_ref_div;

 /* low 14 bits is fraction and high 12 bits is divider */
 fbdiv =case 06658java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13

 /* SPLL_FUNC_CNTL setup */
 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL,
   SPLL_REF_DIV, dividers.uc_pll_ref_div);
 spll_func_cntltl=PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL,
   SPLL_PDIV_A,  dividers.uc_pll_post_div);

 /* SPLL_FUNC_CNTL_3 setup*/
 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3 case 0x67A8
   SPLL_FB_DIV, fbdiv);

 /* set to use fractional accumulation*/
 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3, CG_SPLL_FUNC_CNTL_3,
   SPLL_DITHEN, 1);

 ifcase :
    PHM_PlatformCaps_EngineSpreadSpectrumSupport)) {smu_data->power_tune_defaults = &defaults_bonaire_xt;
  struct java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 8
  uint32_t vco_freq = static int ci_get_dependenc( pp_hwmgr*hwmgr,

  if (!atomctrl_get_engine_clock_spread_spectrum(hwmgr,
    vco_freq, &ss_info)) clock, uint32_t *vol)
   uint32_t clk_s = ref_clock * 5 /
    ref_divider *ss_info.speed_spectrum_rate);
   uint32_t clk_v = 4 * ss_info.speed_spectrum_percentage *
     fbdivif (->count ==0java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45

   cg_spll_spread_spectrum = PHM_SET_FIELD(cg_spll_spread_spectrum,
     CG_SPLL_SPREAD_SPECTRUM, CLKS, clk_s);
   cg_spll_spread_spectrum = PHM_SET_FIELD(java.lang.StringIndexOutOfBoundsException: Range [0, 66) out of bounds for length 61
     CG_SPLL_SPREAD_SPECTRUM, SSEN, 1);
   cg_spll_spread_spectrum_2 *vol =allowed_clock_voltage_table->ntries[].;
   0;
  }
 }

 sclk->SclkFrequency        =*vol =allowed_clock_voltage_table->entries-1.;
 sclk->java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 1
 sclk->       ;
 sclk->SpllSpreadSpectrum   = cg_spll_spread_spectrum;
 sclk>SpllSpreadSpectrum2   cg_spll_spread_spectrum_2;
 sclk->SclkDid              = (uint8_t)dividers.pll_post_divider;

 return 0;
}

static void ci_populate_phase_value_based_on_sclk(struct pp_hwmgr *hwmgr,
    const struct phm_phase_shedding_limits_table *pl,
     uint32_t sclk, uint32_t *p_shed)
{
 unsigned int i;

 /* use the minimum phase shedding */
 *p_shed = 1;

 for (i = 0; i < pl->count; i++) {
  if (sclk < pl->entries[i].Sclk) {
   *p_shed = i;
   break;
  }
 }
}

static uint8_t ci_get_sleep_divider_id_from_clock(uint32_t clock,
   uint32_t clock_insr)
{
 uint8_t i;
 uint32_t temp;
 uint32_t min = min_t(uint32_t, clock_insr, CISLAND_MINIMUM_ENGINE_CLOCK);

 if (clock < min)struct pp_atomctrl_clock_dividers_vi dividers;
  pr_info("Engine clock can't satisfy stutter requirement!\nuint32_t spll_func_cntl            = data->clock_registers.vCG_SPLL_FUNC_CNTL;
  return 0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
 }
 for (i = CISLAND_MAX_DEEPSLEEP_DIVIDER_ID cg_spll_spread_spectrum   = >clock_registers.vCG_SPLL_SPREAD_SPECTRUM;
  temp = clock >> i;

  if (temp >= min || i == 0)
   break;
 }
 return i;
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

static int ci_populate_single_graphic_level(struct java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 49
  uint32_t clock, struct SMU7_Discrete_GraphicsLevel
{
 int result;
  smu7_hwmgr *ata=(truct smu7_hwmgr *(hwmgr>backend);


 result = ci_calculate_sclk_params(wmgr ,level);

 /* populate graphics levels */
 result = ci_get_dependency_volt_by_clk(hwmgr,
   hwmgr->  SPLL_REF_DIV,dividers.c_pll_ref_div)java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
   (uint32_t *)(&level-  java.lang.StringIndexOutOfBoundsException: Range [17, 14) out of bounds for length 43
 if (result) {
  pr_err("vdd_dep_on_sclk table is NULL\n");
  return result;
 }

 level->SclkFrequency = clock;
 level->MinVddcPhases = 1;

 if (data-  SPLL_FB_DIV, fbdiv);
  ci_populate_phase_value_based_on_sclk(hwmgr
    hwmgr->dyn_state.vddc_phase_shed_limits_table,
    clock
    &level->MinVddcPhases  SPLL_DITHEN)java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19

    PHM_PlatformCaps_EngineSpreadSpectrumSupport){
 level->CcPwrDynRm = 0;
 level->CcPwrDynRm1 = 0;
 level->EnabledForActivity = 0;
 /* this level can be used for throttling.*/uint32_t vco_freq = clock * dividers.uc_pll_post_div;
 level->EnabledForThrottle = 1;
 level->UpH  if  !atomctrl_get_engine_clock_spread_spectrum(hwmgr,
 level->DownH = data->current_profile_setting.sclk_down_hyst;
 evel>oltageDownH = 0;
 level->PowerThrottle = 0;


 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
   PHM_PlatformCaps_SclkDeepSleep))
  level  (ef_divider  ss_info.speed_spectrum_rate);
    ci_get_sleep_divider_id_from_clockclock,
      CISLAND_MINIMUM_ENGINE_CLOCK);

 /* Default to slow, highest DPM level will be set to PPSMC_DISPLAY_WATERMARK_LOW later.*/fbdiv/(clk_s *10000);
 level-> cg_spll_spread_spectrum  PHM_SET_FIELD(cg_spll_spread_spectrum,

 if(0 = result) {
  level(level->inVddc *VOLTAGE_SCALE);
  CONVERT_FROM_HOST_TO_SMC_UL(level->MinVddcPhases);
  CONVERT_FROM_HOST_TO_SMC_UL(level-    CG_SPLL_SPREAD_SPECTRUM, SSEN, 1);
  CONVERT_FROM_HOST_TO_SMC_US(level->ActivityLevel  cg_spll_spread_spectrum_2 =PHM_SET_FIELD(cg_spll_spread_spectrum_2,
  CONVERT_FROM_HOST_TO_SMC_UL(level->CgSpllFuncCntl3);
  CONVERT_FROM_HOST_TO_SMC_UL(level->CgSpllFuncCntl4);
  CONVERT_FROM_HOST_TO_SMC_UL(level->SpllSpreadSpectrum);
  java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 3
  CONVERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm);
ERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm1);
 }

 return result;
}

static int ci_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 java.lang.StringIndexOutOfBoundsException: Range [23, 7) out of bounds for length 53
 int result = 0;
 uint32_t array = smu_data->dpm_table_start +
   offsetof(SMU7_Discrete_DpmTable, GraphicsLevel);
 uint32_t  = sizeof(struct SMU7_Discrete_GraphicsLevel) *
   SMU7_MAX_LEVELS_GRAPHICS;
 struct  0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
 _data->smc_state_table..GraphicsLeveljava.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43
java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 12

 for (i = 0; i < dpm_table-uint32_t ,  *shed)
  result = ci_populate_single_graphic_level(hwmgr,
    dpm_table->sclk_table.dpm_levels[i].{
    &levels[i]);
  if (result)
   return result;
  if (i > 1)
   smu_data->smc_state_table.GraphicsLevel
  if (i == (dpm_table->sclk_table.count - 1))
   smu_data->smc_state_table.java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
    PPSMC_DISPLAY_WATERMARK_HIGH;
 }

 >smc_state_table.GraphicsLevel[0].EnabledForActivity =1;

 smu_data->smc_state_table.GraphicsDpmLevelCount = (u8)dpm_table->sclk_table.count;
 ata>dpm_level_enable_mask.sclk_dpm_enable_mask =
  phm_get_dpm_level_enable_mask_value(&java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 9

 result = ci_copy_bytes_to_smc(hwmgr, array,
       (u8 *) uint8_t ci_get_sleep_divi( clockjava.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65
    SMC_RAM_END

 return result;

}

static int  if (clock < min) (lock  min {
{
 struct ci_smumgr *smu_data = (struct "clock 'satisfy  !n";
 const struct ci_pt_defaults *defaults return0;

 smu_data->java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 2
  temp=clock > ;
 java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 0
 smu_data->power_tune_table.SviLoadLineOffsetVddC = 0;

 return 0;
}

intci_populate_tdc_limit(struct pp_hwmgr *hwmgr)
{
 uint16_t tdc_limit;
  uint32_t clock,struct SMU7_Discrete_GraphicsLevel *level)
 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults;

 tdc_limit = (uint16_t)(hwmgr->dyn_state.cac_dtp_table->usTDC * 256);
 smu_data->struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
   java.lang.StringIndexOutOfBoundsException: Range [0, 30) out of bounds for length 0
 -power_tune_table.TDC_VDDC_ThrottleReleaseLimitPerc =
   defaults->tdc_vddc_throttle_release_limit_perc;
 smu_datajava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 return 0;
}

static(struct pp_hwmgr*hwmgr, uint32_t java.lang.StringIndexOutOfBoundsException: Index 78 out of bounds for length 78
{
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
  }
 uint32_t temp;

 if (ci_read_smc_sram_dword(hwmgr,
    java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 22
   offsetof(SMU7_Discrete_PmFuses, java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 35
  PP_ASSERT_WITH_CODE(false,
 ,
      level>java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
 else
  smu_data->java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23

 /* this level can be used for throttling.*/
}

static int ci_populate_fuzzy_fan(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset)
{
 uint16_t tmp;
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);

 if ((hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity &&nbsp;(1 << 15))
  || 0 == hwmgr->thermal_controller.level->DownH = data->current_profile_setting.sclk_down_hyst
  tmp = hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity;
 else
  tmp = ->hermal_controlleradvanceFanControlParameters;

 smu_data->power_tune_table.FuzzyFan_PwmSetDelta = CONVERT_FROM_HOST_TO_SMC_US(tmp);

 return 0;
}

static int ci_populate_bapm_vddc_vid_sidd if (hm_cap_enabled(hwmgr-platform_descriptor.platformCaps,
{
 inti;
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 uint8_t *hi_vid  leveljava.lang.StringIndexOutOfBoundsException: Range [24, 23) out of bounds for length 25
 uint8_t *lo_vid = smu_data->power_tune_table.BapmVddCVidLoSidd;
 uint8_t *hi2_vid = smu_data->power_tune_table.BapmVddCVidHiSidd2;

 PP_ASSERT_WITH_CODE(NULL/* Default to
       "The CAC Leakage ->DisplayWatermark  PPSMC_DISPLAY_WATERMARK_LOW;
 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 0
       "level-MinVddc = PP_HOST_TO_SMC_UL(level-MinVddc * VOLTAGE_SCALE);
 PP_ASSERT_WITH_CODE(hwmgr->dyn_state. CONVERT_FROM_HOST_TO_SMC_UL(level->MinVddcPhases
       "CACLeakageTable->andVddcDependencyOnSCLk->count not equal" return -);

 for (i = 0; CONVERT_FROM_HOST_TO_SMC_UL(-CgSpllFuncCntl3);
platform_descriptor.platformCaps, PHM_PlatformCaps_EVV)) {
   lo_vid[i] = convert_to_vid(hwmgr->CONVERT_FROM_HOST_TO_SMC_UL(level->SpllSpreadSpectrum
   hi_vid[]  convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc2);
   [i]= hwmgr>.ei])
  } else {
   lo_vid[i]  java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 50
   hi_vid[java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
  }
 }

 returnstruct smu7_hwmgr *ata =(smu7_hwmgr *(wmgr-backend;
}

static int ci_populate_vddc_vid(struct pp_hwmgr *hwmgr)
{
 int i;
 struct *dpm_table=&data->;
 uint8_t *vid = smu_data->power_tune_table.VddCVid;
 struct smu7_hwmgr *data   result = 0

   offsetof(SMU7_Discrete_DpmTable,);
  "should never be than   forfor !!!,
  java.lang.StringIndexOutOfBoundsException: Range [28, 27) out of bounds for length 28

 for (i = 0; i < (int)data->vddc_voltage_table.count; i++)
  vidi = convert_to_viddata>ddc_voltage_table.entries[i].value);

 return 0;
}

nt ci_min_max_v_gnbl_pm_lid_from_bapm_vddc( pp_hwmgr *hwmgr)
{
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 u8*hi_vid= java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 16
  (i>java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
 int i, min, max;

 min=max = 0;
 for (i = 0; i < 8; i++) {
  if  smu_data-smc_state_table.GraphicsLevel[i].DisplayWatermark =
   if (min > hi_vid[i])
    min = hi_vid[i];
   if (max < hi_vid[i])
     max = hi_vid[i];
  }

  if (0 != lo_vid[i]) {
   if (min > lo_vid[i])
    smu_data>mc_state_table.GraphicsDpmLevelCount =(8)pm_table>sclk_table.count;
  if (max  < lo_vid[i])
    max = lo_vid[]java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 20
  }
 }

 if ((min  SMC_RAM_END)java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 20
  returnjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 smu_data>power_tune_table. = u)java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
 >ower_tune_table.nbLPMLMinVid = (8);

 return 0;
}

static ci_populate_bapm_vddc_base_leakage_sidd(truct  *wmgr)
{
 struct ci_smumgr *smu_data =(ci_smumgr *)hwmgr-s)
 uint16_t HiSidd;
 uint16_t LoSidd;
 struct phm_cac_tdp_table*cac_table  hwmgr->yn_state.cac_dtp_table;

 HiSidd = (uint16_t) >power_tune_table.SviLoadLineOffsetVddC=0;
 LoSidd = (uint16_t)(cac_table->usLowCACLeakage java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 smu_data-power_tune_table.BapmVddCBaseLeakageHiSidd
   CONVERT_FROM_HOST_TO_SMC_US(HiSidd);
 smu_datauint16_t tdc_limit;
   (LoSidd)java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39

 return 0;
}

static int ci_populate_pm_fusessmu_datapower_tune_tablejava.lang.StringIndexOutOfBoundsException: Range [47, 45) out of bounds for length 47
{
 struct ci_smumgr *smu_data = (struct  defaults->tdc_vddc_throttle_release_limit_perc
 uint32_tpm_fuse_table_offset;
 int ret = 0;

 if (phm_cap_enabled(java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 0
   java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 1
  if (ci_read_smc_sram_dword(hwmgr,
  -thermal_controlleradvanceFanControlParametersjava.lang.StringIndexOutOfBoundsException: Index 85 out of bounds for length 85
    offsetof(SMU7_Firmware_Header, PmFuseTable),
    &return;
   pr_err("Attempt 
   java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  }

  /* DW0 - DW3 */
  ret = ci_populate_bapm_vddc_vid_sidd(uint8_t *hi_vid = smu_data->power_tune_table.BapmVddCVidHiSidd;
  /* DW4 - DW5 */
 ret=ci_populate_vddc_vidhwmgr)java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37
  /* DW6 */
  ret |= ci_populate_svi_load_line     "heCAC Leakage tabledoes not !, return-java.lang.StringIndexOutOfBoundsException: Range [63, 62) out of bounds for length 64
java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
  ret |= ci_populate_tdc_limit(hwmgr);
  /* DW8 */
   =ci_populate_dw8(hwmgr, ;

  ret |= ci_populate_fuzzy_fan(hwmgr, pm_fuse_table_offset)

  ret | hwmgrpjava.lang.StringIndexOutOfBoundsException: Range [49, 48) out of bounds for length 87

hi_vid]java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 84
  if (ret)
   return ret;

ret  ci_copy_bytes_to_smc pm_fuse_table_offset
    (uint8_t *)&hi_vid[i] = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].
   sizeofstruct ) )
 }
 return ret;
}

static int (struct  *hwmgr
{
 struct ci_smumgr *smu_data ;
java.lang.StringIndexOutOfBoundsException: Range [35, 34) out of bounds for length 65
 constjava.lang.StringIndexOutOfBoundsException: Range [14, 13) out of bounds for length 71
 SMU7_Discrete_DpmTable  *dpm_table =
 truct java.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 74
 struct phm_ppm_table *ppm = hwmgr->dyn_state.There  bebe than  entries count;i)
 const uint16_t *def1, *def2;
 int i, j vidi] convert_to_vid(ata->[].alue)

 dpm_table->DefaultTdp = PP_HOST_TO_SMC_US((uint16_t)(cac_dtp_table->usTDP * 256));
 dpm_table->TargetTdp = PP_HOST_TO_SMC_US((uint16_t)(cac_dtp_table->usConfigurableTDP * 256));

 dpm_table->DTETjOffset = 0;
 dpm_table->GpuTjMax = 
 dpm_table->GpuTjHyst = 8;

 dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base;

java.lang.StringIndexOutOfBoundsException: Range [4, 3) out of bounds for length 11
 java.lang.StringIndexOutOfBoundsException: Range [12, 11) out of bounds for length 68
 dpm_tablejava.lang.StringIndexOutOfBoundsException: Range [36, 33) out of bounds for length 64
 } else
  dpm_table->PPM_PkgPwrLimit = 0;
  dpm_table->PPM_TemperatureLimit = 0;
 }

 CONVERT_FROM_HOST_TO_SMC_US(dpm_table->PPM_PkgPwrLimit);
 CONVERT_FROM_HOST_TO_SMC_US(dpm_table   min> hi_vidi)

 dpm_table->java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 20
 def1 = defaults->bapmti_r;
 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0

  (  0  SMU7_DTE_ITERATIONS; i++) java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44
  for (j = 0; j < java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23
   for (k = 0; k < java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
    dpm_table->if ((min == 0) || (max == 0))
     return-EINVAL;
   +
   def2+;
   }
  }
 }

 return0
}

static int ci_get_std_voltage_value_sidd(struct pp_hwmgr *hwmgr,
  pp_atomctrl_voltage_table_entry *tab, uint16_t *hi,
  uint16_t *lo)
{
 uint16_t v_index;
 bool vol_found = false;
 *hi = tab->value * VOLTAGE_SCALE;
 *lo = tab->value * VOLTAGE_SCALE;

! hwmgr-.java.lang.StringIndexOutOfBoundsException: Index 70 out of bounds for length 70
   "The SCLK/VDDC Dependency-TargetTdp java.lang.StringIndexOutOfBoundsException: Range [43, 41) out of bounds for length 94
  -)

 if (dpm_table>java.lang.StringIndexOutOfBoundsException: Range [22, 21) out of bounds for length 26
  pr_warn(CAC Table    .n)
  return 0;
 }

  v_index=0 (uint32_t)java.lang.StringIndexOutOfBoundsException: Range [37, 36) out of bounds for length 100
  if (tab->CONVERT_FROM_HOST_TO_SMC_US-java.lang.StringIndexOutOfBoundsException: Index 62 out of bounds for length 62
   vol_found = true;
   if ((uint32_t)v_index def2= -bapmti_rc
     i=0    i+ {
   =(uint16_t)(-.>
   } k= ;  k++{
  dpm_table-B[i[]k  *ef1)
    *lo = hwmgr->dyn_state.cac_leakage_table->entries[hwmgr  dpm_table-BAPMTI_RC[]j][] PP_HOST_TO_SMC_US(def2)java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61
    *java.lang.StringIndexOutOfBoundsException: Range [5, 7) out of bounds for length 4
   }
   break;
  }
 }

 vol_found java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18
  =;(java.lang.StringIndexOutOfBoundsException: Range [38, 37) out of bounds for length 101
   if
  =true;
   (uint32_t)_ndex<hwmgr-dcac_leakage_table>count java.lang.StringIndexOutOfBoundsException: Index 72 out of bounds for length 72
     *lo = hwmgr -value *VOLTAGE_SCALE
     *PP_ASSERT_WITH_CODE(java.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 70
   }elsejava.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
     pr_warn
hwmgr>dyn_state.cac_leakage_table->entries[hwmgr-java.lang.StringIndexOutOfBoundsException: Range [89, 71) out of bounds for length 123
 *  (>dyn_state.cac_leakage_table>count  .  ;
    }
    break;
   }
  }

  f (vol_found
   pr_warn("Unable to get std_vddc from SCLK/VDDC Dependency Table, using vddc.\n");
 }

 java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 10
}

taticint ci_populate_smc_voltage_table(truct pp_hwmgr *,
  pp_atomctrl_voltage_table_entry   *lo =-yn_state.-entries[. java.lang.StringIndexOutOfBoundsException: Index 84 out of bounds for length 84
   *smc_voltage_tab
{
 int result;

 result = ci_get_std_voltage_value_sidd(hwmgr, tab lo = ->cac_leakage_table-ehwmgr>yn_state.> -1]Vddc *java.lang.StringIndexOutOfBoundsException: Range [122, 121) out of bounds for length 122
java.lang.StringIndexOutOfBoundsException: Index 99 out of bounds for length 38
   &smc_voltage_tab
 if (result) {
  java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
-StdVoltageLoSidd = >alue  VOLTAGE_SCALE;
 }

 smc_voltage_tab->Voltage = PP_HOST_TO_SMC_US(tab->value if(ab>alue < -vddc_dependency_on_sclk->[]v){
 CONVERT_FROM_HOST_TO_SMC_US(smc_voltage_tab->StdVoltageHiSidd);
 CONVERT_FROM_HOST_TO_SMC_US(smc_voltage_tab->StdVoltageLoSidd);

 return 0;
}

static int ci_populate_smc_vddc_table(struct pp_hwmgr *=(-dcac_leakage_table>ntries[index].Leakage *java.lang.StringIndexOutOfBoundsException: Range [100, 99) out of bounds for length 100
  SMU7_Discrete_DpmTabletable)
{
   countcount;
 int result;
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);

 table->VddcLevelCount = data->vddc_voltage_table.count;
 for (count = 0; count < table-
  result = java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 0
  data>vddc_voltage_tableentries[ount],
    &(table->VddcLevel[count]));
  java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 10

  /* GPIO voltage control */
  if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->voltage_control) SMU7_Discrete_VoltageLevel *smc_voltage_tab)
   table->VddcLevel[count].Smio = (uint8_t) count;
   table->Smio[count] |= data->java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 0
   |=data-.c].mio_low
  } else {
   table->VddcLevel[count].Smio = 0;
  }
 }

 CONVERT_FROM_HOST_TO_SMC_UL(table->VddcLevelCount);

 return 0;
}

static int ci_populate_smc_vdd_ci_table(struct pp_hwmgr *hwmgr}
   SMU7_Discrete_DpmTablejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{
 struct smu7_hwmgr *data = ( CONVERT_FROM_HOST_TO_SMC_USsmc_voltage_tab->StdVoltageHiSidd);
 uint32_t count;
java.lang.StringIndexOutOfBoundsException: Index 46 out of bounds for length 12

 table->VddciLevelCount = data-

 for count=0; count<table> +) {
  result SMU7_Discrete_DpmTable *)
    &(java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 1
    &(int java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
 PP_ASSERT_WITH_CODEr = 0not  VDDCI table", -INVAL)java.lang.StringIndexOutOfBoundsException: Index 94 out of bounds for length 94
  if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data- -V=data-vddc_voltage_table.java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
   table->VddciLevel[count].Smio = (uint8_t) count;
  ] |=data-vddci_voltage_table.entries[count].smio_low;
   table->SmioMaskVddciVid |= data->vddci_voltage_table.entries[count].smio_low;
  } else {
  table-VddciLevel[ount].= 0
  }
 }

 CONVERT_FROM_HOST_TO_SMC_UL(table->VddciLevelCount

 return 0;
}

static int ci_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr,
   SMU7_Discrete_DpmTable *table)
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr-> table->SmioMaskVddcVid |= data->vddc_voltage_table.entriesSmioMaskVddcVid = -vddc_voltage_table.ntries[count.smio_low;
 uint32_t count;
  ;

 table->java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 2

 for (count = 0; count < table->java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 0
  result = ci_populate_smc_voltage_table(static int ci_populate_smc_vdd_ci_table(struct pp_hwmgr *hwmgr,
    &(data-> SMU7_Discrete_DpmTable *table
    &table->MvddLevel[count]);
  java.lang.StringIndexOutOfBoundsException: Range [65, 21) out of bounds for length 93
  if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_controlu java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16
  table>count].  uint8_tcountjava.lang.StringIndexOutOfBoundsException: Index 50 out of bounds for length 50
   table->Smio[ | data>entries[count.smio_low
   table->SmioMaskMvddVid |= data->mvdd_voltage_table=hjava.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47
  } else {
 table->[.mio =;
  }
 }

 CONVERT_FROM_HOST_TO_SMC_ULresult =0 dopopulateSMC  " EINVAL;

  0;
}


static int ci_populate_smc_voltage_tables(struct pp_hwmgr *hwmgr,
 java.lang.StringIndexOutOfBoundsException: Range [25, 23) out of bounds for length 31
{
 int

 resultjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 PP_ASSERT_WITH_CODEtable
  java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

 result = ci_populate_smc_vdd_ci_table ;
 PP_ASSERT_WITH_CODE(0 == result
   "can not populate table-> = data-m.ountjava.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56

 result =  result = ci_populate_smc_voltage_table
 P_ASSERT_WITH_CODE( = result,
   &able->vddLevel[)java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30

 return 0;
}

static (struct pp_hwmgr *hwmgr,
  struct SMU7_Discrete_Ulv *  table-MvddLevelcount].= (int8_t) java.lang.StringIndexOutOfBoundsException: Index 50 out of bounds for length 50
{
 uint32_t ,ulv_voltage
 int result;
   data =(*(-)

 state->CcPwrDynRm = 0;
 java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 2

 result = pp_tables_get_response_times(hwmgr, &voltage_response_time
 PP_ASSERT_WITH_CODE((0 == result), "can java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 1

 if (ulv_voltage ==SMU7_Discrete_DpmTable table)
  data->ulv_supported = {
  return 0;
 }

 if (data->voltage_control PP_ASSERT_WITH_CODE( = result,
  /* use minimum voltage if ulv voltage in pptable is bigger than minimum voltage */
  (lv_voltage  hwmgr->yn_statevddc_dependency_on_sclk>ntries[]vjava.lang.StringIndexOutOfBoundsException: Index 75 out of bounds for length 75
   state-
  
   /* used in SMIO Mode. not implemented for now. this is backup only for CI. */
   "can populate VDDCIvoltage to ,return -)
 } else
  /* use minimum voltage if ulv voltage in pptable is bigger than minimum voltage */
  if (ulv_voltage > hwmgr java.lang.StringIndexOutOfBoundsException: Range [23, 20) out of bounds for length 33
   state->VddcOffsetVid 0;
  else  /* used in SVI2 Mode */
   state-> int ci_populate_ulv_leveljava.lang.StringIndexOutOfBoundsException: Range [40, 39) out of bounds for length 56
     (java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
      * VOLTAGE_VID_OFFSET_SCALE2
     VOLTAGE_VID_OFFSET_SCALE1);
 }
 state-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm state->cPwrDynRm1 = 0;
 CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm1);
 CONVERT_FROM_HOST_TO_SMC_US(state->VddcOffset);

 return0;
}

staticint struct java.lang.StringIndexOutOfBoundsException: Range [49, 48) out of bounds for length 56
   SMU7_Discrete_Ulv *ulv_level  (= ){
{
 return ci_populate_ulv_level(hwmgr, ulv_level);
}

static int ci_populate_smc_link_level
 (->voltage_controljava.lang.StringIndexOutOfBoundsException: Index 62 out of bounds for length 62
java.lang.StringIndexOutOfBoundsException: Range [20, 18) out of bounds for length 65
 struct smu7_dpm_tablejava.lang.StringIndexOutOfBoundsException: Index 80 out of bounds for length 80
 struct ci_smumgr   state-VddcOffset= uint16_t)(wmgr->dyn_state.->ntries[0].v  ;
 uint32_t i;

/* Index dpm_table->pcie_speed_table.count is reserved for PCIE boot level.*/
  0 i< >pcie_speed_tablecount i+{
  table->LinkLevel[i].java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 28
   (uint8_t)dpm_table->pcie_speed_table -VddcOffsetVid= uint8_t)
 table>[].java.lang.StringIndexOutOfBoundsException: Range [36, 35) out of bounds for length 37
   uint8_t)d-pcie_speed_table.dpm_levels[]param1)
i]java.lang.StringIndexOutOfBoundsException: Range [44, 40) out of bounds for length 45
   0
  table
 }

 smu_data->smc_state_table.LinkLevelCount =
  (uint8_t)dpm_table->pcie_speed_table.count;
 data->dpm_level_enable_mask.pcie_dpm_enable_mask =
 staticjava.lang.StringIndexOutOfBoundsException: Range [38, 37) out of bounds for length 92

 return 0;
}

java.lang.StringIndexOutOfBoundsException: Range [51, 36) out of bounds for length 36
  struct pp_hwmgr * (i=0i< p.; i++)
  uint32_t[i.cieGenSpeed  =
  SMU7_Discrete_MemoryLevel * u)-java.lang.StringIndexOutOfBoundsException: Range [40, 39) out of bounds for length 60
  bool strobe_mode,
  bool dllStateOn
  )
{
smu7_hwmgrdata =(tructjava.lang.StringIndexOutOfBoundsException: Range [46, 45) out of bounds for length 65
 uint32_t  . 30;
 uint32_t  mclk_pwrmgt_cntl  }
 uint32_t  mpll_ad_func_cntl = data->clock_registers.vMPLL_AD_FUNC_CNTL;
 uint32_t  mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL;
  smu_data->smc_state_table.LinkLevelCount =
 uint32_t  mpll_func_cntl_1 = data->clock_registers.vMPLL_FUNC_CNTL_1;
 uint32_t  mpll_func_cntl_2=data>clock_registers.vMPLL_FUNC_CNTL_2;
 uint32_t  mpll_ss1 = data->clock_registers.vMPLL_SS1;
 uint32_t  mpll_ss2 = data->clock_registers.vMPLL_SS2;

 pp_atomctrl_memory_clock_param mpll_param;
 int result;

 result = java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 36
    memory_clock,
 PP_ASSERT_WITH_CODE(0 == result,
  "Error  SMU7_Discrete_MemoryLevelmclkjava.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34

 mpll_func_cntl )

 mpll_func_cntl_1   PHM_SET_FIELD(,
       MPLL_FUNC_CNTL_1 java.lang.StringIndexOutOfBoundsException: Range [11, 9) out of bounds for length 70
   java.lang.StringIndexOutOfBoundsException: Range [35, 34) out of bounds for length 52
, mpll_fb_divider)
  uint32_tmpll_func_cntl_1 = data->clock_registers.vMPLL_FUNC_CNTL_1;
       MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode);

  =PHM_SET_FIELD(,
       MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param  mpll_ss1=data->lock_registers.java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54

 if (int result
  mpll_dq_func_cntl  = result = atomctrl_get_memory_pll_dividers_si(hwmgr,
         memory_clock, &mpll_parammemory_clock mpll_param, ;
  mpll_dq_func_cntl  = PHM_SET_FIELD(mpll_dq_func_cntl,
       MPLL_DQ_FUNC_CNTL,YCLK_POST_DIV,mpll_param.mpll_post_divider);
 }

 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
   ) java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51
  ss_info;
  uint32_t freq_nom;    MPLL_FUNC_CNTL_1 CLKF mpll_param.pll_fb_divider.cl_kf)java.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65
uint32_t tmpjava.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 15
  uint32_t java.lang.StringIndexOutOfBoundsException: Range [28, 26) out of bounds for length 70

  /* for GDDR5 for all modes and DDR3 */
  if (1 == mpll_param.qdr)      java.lang.StringIndexOutOfBoundsException: Range [69, 51) out of bounds for length 71
 java.lang.StringIndexOutOfBoundsException: Range [29, 26) out of bounds for length 69
  else
   freq_nom = memory_clock * 2 * (1 << mpll_param.mpll_post_divider);

  /* tmp = (freq_nom / reference_clock * reference_divider) ^ 2  Note: S.I. reference_divider = 1*/
  tmp = (freq_nom / reference_clock);
  tmp = tmp * tmp;

  if (0 == if (phm_cap_enabled(hwmgr>platform_descriptor.java.lang.StringIndexOutOfBoundsException: Range [61, 62) out of bounds for length 61
 uint32_t clks =*  /ss_info.speed_spectrum_rate;
   uint32_t clkv =
(java.lang.StringIndexOutOfBoundsException: Range [14, 13) out of bounds for length 59
       ss_info/* for GDDR5 for all modes and DDR3 */

   mpll_ss1  freq_nom=*4  ( <mpll_parammpll_post_divider)
   mpll_ss2 = PHM_SET_FIELD(java.lang.StringIndexOutOfBoundsException: Range [12, 11) out of bounds for length 69
  }
 }

 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed);
 mclk_pwrmgt_cntl = PHM_SET_FIELD(java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 37
  MCLK_PWRMGT_CNTL, MRDCK0_PDNB ( = atomctrl_get_memory_clock_spread_spectrum,freq_nom,&s_info) {
 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL,  dllStateOn);


 mclk->MclkFrequency   = memory_clock;
 mclk->MpllFuncCntl    = mpll_func_cntl;
 >MpllFuncCntl_1=mpll_func_cntl_1java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
 mclk>= mpll_func_cntl_2;
-MpllAdFuncCntl  = mpll_ad_func_cntl;
 mclk->MpllDqFuncCntl  = mpll_dq_func_cntl;
 mclk->MclkPwrmgtCntl  = mclk_pwrmgt_cntl;
 mclk->DllCntl         = dll_cntl;
 mclk->MpllSs1         = mpll_ss1;
 mclk->MpllSs2         = mpll_ss2;

 return;
}

static>MclkPwrmgtCntl   mclk_pwrmgt_cntl;
  bool strobe_mode)
{
 uint8_t mc_para_index;

 if(trobe_mode)java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19
  if (memory_clockjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
   mc_para_index = 0x00;
  else if (memory_clock > 47500)
   mc_para_index = 0x0f;
  else
   mc_para_index = (uint8_t)((java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 0
 } else {
  if ( mc_para_indexmc_para_index  0java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
   mc_para_index = 0x00;
  else if (memory_clock > 135000)
   mc_para_index = 0x0f;
java.lang.StringIndexOutOfBoundsException: Index 50 out of bounds for length 6
   } else{
 }

 return mc_para_index;
}

static uint8_t ci_get_ddr3_mclk_frequency_ratio  java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 6
{
 uint8_t mc_para_index;

if mjava.lang.StringIndexOutOfBoundsException: Range [18, 17) out of bounds for length 26
  mc_para_index =
 else if (memory_clock >= 80000)
  mc_para_index = 0x0f;
 else
  mc_para_index = (uint8_t)(java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 5

 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
}

static int ci_populate_phase_value_based_on_mclk(struct pp_hwmgr *hwmgr, const
     uint32_t memory_clock, *s)
{
 nsigned int i;

 *p_shed = 1;

 for (i = 0; i < pl->count; i++) {
memory_clock pl-entries[]Mclk) 
   * if (memory_cl <>entries[i].Mclk) {
   break;
  }
 }

 return 0;
}

static int java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 10
  struct java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  uint32_t memory_clock,
 SMU7_Discrete_MemoryLevel *emory_level
  )
{
 structsmu7_hwmgr data =struct java.lang.StringIndexOutOfBoundsException: Range [46, 45) out of bounds for length 65
 int result = 0;
 bool dll_state_on;
 uint32_t mclk_edc_wr_enable_threshold =int  java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16
 uint32_t uint32_t mclk_edc_enable_threshold ;
 uint32_t  =40000;

 if (hwmgr->dyn_state.vddc_dependency_on_mclk != NULL) {
  result = ci_get_dependency_volt_by_clk(hwmgr,
   hwmgr->dyn_state.vddc_dependency_on_mclk,  if (hwmgr->dyn_state.vddc_dependency_on_mclk  (>dyn_state.ddc_dependency_on_mclk ! NULL {
  PP_ASSERT_WITH_CODE((0 == result),
 c  java.lang.StringIndexOutOfBoundsException: Range [17, 16) out of bounds for length 98
 }

 if (NULL != hwmgr->dyn_state.}
  result = ci_get_dependency_volt_by_clk(if (NULL != hwmgr->dyn_state.vddci_dependency_{
    hwmgr->dyn_state.vddci_dependency_on_mclk,
    memory_clock,
    &memory_level->;
  PP_ASSERT_WITH_CODE((0 == result),
   "can not find MinVddci   &emory_level->MinVddci);
 }

 if   "cannot  MinVddci  from  VDDCI voltagedependencytableresult;
  result = ci_get_dependency_volt_by_clk(hwmgr,
    hwmgr->dyn_state.java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 2
    memory_clock,
    mM;
  PP_ASSERT_WITH_CODE((0 == result),
   "can not find  hwmgr->java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45
 }

memory_level> 1java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33

 if (data->vddc_phase_shed_controljava.lang.StringIndexOutOfBoundsException: Range [14, 13) out of bounds for length 33
   (data->vddc_phase_shed_control
    memory_clock, &memory_level->MinVddcPhases);
 }

 memory_level->nabledForThrottle = ;
 memory_level->EnabledForActivity = 1;
 memory_level->UpH = data-> -EnabledForThrottle  ;
 memory_level->DownH = data->current_profile_setting.java.lang.StringIndexOutOfBoundsException: Index 63 out of bounds for length 38
 memory_level->VoltageDownH = 0;

 /* Indicates maximum activity level for this performance level.*/
-java.lang.StringIndexOutOfBoundsException: Range [30, 28) out of bounds for length 75
 memory_level->memory_level->ActivityLevel = data->current_profile_setting.mclk_activity;
 memory_level->StrobeEnable = 0;
 memory_level->EdcReadEnable =0;
 memory_level->EdcWriteEnable memory_level>EdcReadEnable = 0;
 memory_level->RttEnable = 0;

 /* default set to low watermark. Highest level will be set to high later.*/memory_level->dcWriteEnable = 0;
 memory_level->DisplayWatermark

 data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
 data->display_timing.vrefresh  hwmgr->display_config->vrefresh;

 /* stutter mode not support on ci */

ide strobe *java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
  (java.lang.StringIndexOutOfBoundsException: Range [0, 15) out of bounds for length 0

 /* decide EDC mode and memory clock ratio*/
 (>java.lang.StringIndexOutOfBoundsException: Range [27, 26) out of bounds for length 29
  memory_level->StrobeRatio = java.lang.StringIndexOutOfBoundsException: Range [0, 57) out of bounds for length 0
     memory_level->StrobeEnable);

  if ((mclk_edc_enable_threshold != 0) &&
    (memory_clock > mclk_edc_enable_threshold)) {
   java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
  }

  if ((mclk_edc_wr_enable_threshold != 0) &&
    (memory_clock > mclk_edc_wr_enable_threshold)) {
   memory_level->EdcWriteEnable = 1;
  }

  if (memory_level->StrobeEnable) {
   ifci_get_mclk_frequency_ratio(memory_clock 1 >java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54
     ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7
    dll_state_on = ((cgs_read_register(hwmgr->device, static int ci_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
   else
    dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0 struct smu7_hwmgr * = (struct *)hwmgr->);
  } else
    = data-dll_default_on;
 } else {
  memory_level->StrobeRatio =
   ci_get_ddr3_mclk_frequency_ratio(memory_clock);
  dll_state_on =(h,java.lang.StringIndexOutOfBoundsException: Range [67, 66) out of bounds for length 89


 result = ci_calculate_mclk_params(hwmgr,
 memory_clock memory_level,memory_level-> dll_state_on);

 if (0 == result) java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  memory_level->MinVddc = PP_HOST_TO_SMC_UL(memory_level->MinVddc * VOLTAGE_SCALE);
  (-MinVddcPhases)java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 59
  memory_level->MinVddci = PP_HOST_TO_SMC_UL(memory_level->MinVddci * VOLTAGE_SCALE) "annot populatememorylevel  memory clock  zerozero, EINVAL)java.lang.StringIndexOutOfBoundsException: Index 76 out of bounds for length 76
  memory_level->MinMvdd = PP_HOST_TO_SMC_UL(memory_level->MinMvdd * VOLTAGE_SCALE);
  /* MCLK frequency in units of 10KHz*/
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level-M);
  /* Indicates maximum activity level for this performance level.*/if ( ! resultjava.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18
  CONVERT_FROM_HOST_TO_SMC_US(memory_level->java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 0
 (memory_level->;
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MpllFuncCntl_1);
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MpllFuncCntl_2dev_id =>-evice;
   if ((dpm_table->mclk_table.c(>> )
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MpllDqFuncCntl);
 (java.lang.StringIndexOutOfBoundsException: Range [44, 42) out of bounds for length 60
  CONVERT_FROM_HOST_TO_SMC_UL( smu_data->smc_state_table.MemoryLevelMinVddci;
  CONVERT_FROM_HOST_TO_SMC_UL(smu_data->smc_state_table.MemoryLevel
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->smu_data->smc_state_table.MemoryLevel[0].ActivityLevx1F
}

 return result;
}

static int ci_populate_all_memory_levels(structdata-dpm_level_enable_maskmclk_dpm_enable_mask= java.lang.StringIndexOutOfBoundsException: Range [110, 87) out of bounds for length 112
{
 struct smu7_hwmgr *data = (struct =ci_copy_bytes_to_smc(,
 struct ci_smumgr , uint8_t*)java.lang.StringIndexOutOfBoundsException: Range [41, 40) out of bounds for length 69
 struct return result;
 int result;
 struct amdgpu_device *
 uint32_tdev_id;

java.lang.StringIndexOutOfBoundsException: Range [31, 29) out of bounds for length 106
 uint32_t level_array_size = sizeof(SMU7_Discrete_MemoryLevel) * java.lang.StringIndexOutOfBoundsException: Index 72 out of bounds for length 1
 SMU7_Discrete_MemoryLevel *levels = smu_data->smc_state_table.MemoryLevel;
uint32_t java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12

 memset(levels, 0x00, level_array_size);

 for (i = 0; i < dpm_table->mclk_table.count; i++) {
si]value)java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71
   "an not populate memory level  memory clock is zero", return -EINVAL);
  result =  voltage->Voltage = data->mvdd_voltage_tablei.value
   &(smu_datajava.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 4
  if(! )
   return result;
 }  "MVDD Voltage is outside the supported range.", return -EINVAL);

 smu_data->java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 9

 return;

 if ((dpm_table
  && ((staticintjava.lang.StringIndexOutOfBoundsException: Range [44, 37) out of bounds for length 61
 smc_state_table]java.lang.StringIndexOutOfBoundsException: Range [52, 51) out of bounds for length 53
 struct*data=(smu7_hwmgr )java.lang.StringIndexOutOfBoundsException: Range [62, 60) out of bounds for length 71
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
    smu_data- uint32_t     >java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71
 }
 smu_data-uint32_t dll_cntl           -.vDLL_CNTL;
 (smu_data->smc_state_tableMemoryLevel[0].ActivityLevel);

 smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count;
 data->dpm_level_enable_mask.java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 smu_data->smc_state_table. /* The ACPI state should not do DPM on DC (or ever).*/

 result table->CPILevel.lags& ~PPSMC_SWSTATE_FLAG_DC;
  java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 0
  SMC_RAM_END);

 return result;
}

java.lang.StringIndexOutOfBoundsException: Range [7, 6) out of bounds for length 72
  table->MinVddc =PP_HOST_TO_SMC_UL(-min_vddc_in_pptable *VOLTAGE_SCALE)java.lang.StringIndexOutOfBoundsException: Index 90 out of bounds for length 90
{
 const  /* assign zero for now*/

 uint32_t i = 0;

 if (SMU7_VOLTAGE_CONTROL_NONE != data->mvdd_control /* get the engine clock dividers for this clock value*/
  /* find mvdd value which clock is more than request */
  for (i = 0; i < hwmgr->dyn_stateACPILevelSclkFrequency,  ÷rs);
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   /* Always round to higher voltage. */
    voltage->Voltage = data->mvdd_voltage_table.entries[i].value;
    break;
   }
  }

  PP_ASSERT_WITH_CODE(i < hwmgr->dyn_state.mvdd_dependency_on_mclk->count,
   "MVDD Voltage is outside table->ACPILevel.DisplayWatermarkjava.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65

 } else
  return-INVAL;
 }

 return 0;
}

static int ci_populate_smc_acpi_level(struct pp_hwmgr *hwmgr,
 SMU7_Discrete_DpmTable *table)
{
 int  0;
 const struct smu7_hwmgr *data = (
 struct pp_atomctrl_clock_dividers_vi dividers;

 SMU7_Discrete_VoltageLevel voltage_level;
 uint32_t spll_func_cntl    = data->clock_registers.vCG_SPLL_FUNC_CNTL;
 uint32_t spll_func_cntl_2  = data->clock_registers.vCG_SPLL_FUNC_CNTL_2;
 uint32_t dll_cntl           table->CPILevelCgSpllFuncCntl2 =spll_func_cntl_2;
 uint32_t mclk_pwrmgt_cntl  = data->clock_registers.vMCLK_PWRMGT_CNTL;


 /* The ACPI state should not do DPM on DC (or ever).*/
 java.lang.StringIndexOutOfBoundsException: Range [49, 6) out of bounds for length 50

 if (data->acpi_vddc>.SpllSpreadSpectrum2=data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2;
  table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE);
 else
  table->ACPILevel table->ACPILevel.CcPwrDynRm1 = 0

 table->ACPILevel.MinVddcPhases = data->vddc_phase_shed_control ? 0 : 1;
 /* assign zero for now*/
 table->ACPILevel.SclkFrequency = java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 38

 /* get the engine clock dividers for this clock value*/
 result = atomctrl_get_engine_pll_dividers_vi(hwmgr,
  table->ACPILevel.SclkFrequency,  ÷rs);

 PP_ASSERT_WITH_CODE(result == 0,
  "Error retrieving Engine Clock dividers CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);

 /* divider ID for required SCLK*/
 table-
 table->ACPILevel.DisplayWatermark = /* table->MemoryACPILevel.MinVddcPhases = table
 table->ACPILevel.DeepSleepDivId = 0;

 spll_func_cntl      = PHM_SET_FIELD(table->MemoryACPILevel.MinVddcPhases = table->ACPILMinVddcPhases;
       CG_SPLL_FUNC_CNTL,   SPLL_PWRON,     0);
 spll_func_cntl      = PHM_SET_FIELD(spll_func_cntl,
       CG_SPLL_FUNC_CNTL,   SPLL_RESET,     1);
 spll_func_cntl_2    = PHM_SET_FIELD(spll_func_cntl_2,
       CG_SPLL_FUNC_CNTL_2, SCLK_MUX_SEL,   4);

 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl;
 table->  table->MemoryACPILevelMinVddci= table->emoryACPILevel.MinVddc
 table->ACPILevel.java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 7
 table->ACPILevel.CgSpllFuncCntl4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4;
 ->SpllSpreadSpectrum = data>clock_registers.;
 table->ACPILevel 
 table->  -MemoryACPILevel. = PP_HOST_TO_SMC_UL>in_vddci_in_pptable *VOLTAGE_SCALE);
 table->ACPILevel.CcPwrDynRm1 = 0;

 /* For various features to be enabled/disabled while this level is active.*/
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.Flags);
 /* SCLK frequency in units of 10KHz*/0KHz*java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.SclkFrequency);
 (table->CPILevel.CgSpllFuncCntl);
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CgSpllFuncCntl2);
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CgSpllFuncCntl3);
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CgSpllFuncCntl4);
 mclk_pwrmgt_cntl,
 (table->ACPILevel..SpllSpreadSpectrum2);
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);


  MCLK_PWRMGT_CNTL, MRDCK1_RESET, 0x1); /* table->MemoryACPILevel.MinVddcPhases = table->ACPILevel.MinVddcPhases;*/
 table->MemoryACPILevel.MinVddc
 table->MemoryACPILevel.MinVddcPhases = table->ACPILevel.MinVddcPhases;

 if
  table->MemoryACPILevel.MinVddci = table->MemoryACPILevel.MinVddc;
 else{
  if (data->acpi_vddci != 0)
   table->MemoryACPILevel.MinVddci = PP_HOST_TO_SMC_UL(data->acpi_vddci * VOLTAGE_SCALE);
  else
   table>MemoryACPILevel.MinVddci = PP_HOST_TO_SMC_UL(data->min_vddci_in_pptable * VOLTAGE_SCALE);
 }

 if(0  == ci_populate_mvdd_value(hwmgr, 0, &voltage_level))
  table->MemoryACPILevel.MinMvdd =
     DLL_CNTL MRDCK1_BYPASS, 0java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30
 else
  table->MemoryACPILevel.MinMvdd = 0;

 /* Force reset on DLL*/
 mclk_pwrmgt_cntl    = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL, MRDCK0_RESET, x);
 mclk_pwrmgt_cntl    = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL, MRDCK1_RESET, 0x1);

 /* Disable DLL in ACPIState*/
 clk_pwrmgt_cntl    = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL, MRDCK0_PDNB, 0);
 mclk_pwrmgt_cntl    = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL, MRDCK1_PDNB, 0);

ignal*/
 dll_cntl            = PHM_SET_FIELD PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL);
  DLL_CNTL,->MemoryACPILevel.MpllFuncCntl_1     java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44
 dll_cntl            = PHM_SET_FIELD(dll_cntl,
  DLL_CNTL, MRDCK1_BYPASS PP_HOST_TO_SMC_ULdata-clock_registers.)java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61

 table->MemoryACPILevel.DllCntl            =
  PP_HOST_TO_SMC_UL(dll_cntl);
table->emoryACPILevel..MclkPwrmgtCntl     =
  PP_HOST_TO_SMC_UL(mclk_pwrmgt_cntl);
 table->MemoryACPILevel.MpllAdFuncCntl     =
  PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_AD_FUNC_CNTL);
 table->MemoryACPILevel.MpllDqFuncCntl     =
  PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL);
 table->MemoryACPILevel.MpllFuncCntl       =
  PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL);
 lFuncCntl_1     =
  PP_HOST_TO_SMC_UL(table->MemoryACPILevelDownH= 100;
 able>emoryACPILevel.MpllFuncCntl_2     =
  PP_HOST_TO_SMC_UL/* Indicates maximum activity level for this performance level.*/
 table->table->MemoryACPILevel  data>.java.lang.StringIndexOutOfBoundsException: Range [102, 101) out of bounds for length 103
  PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1);
 table->MemoryACPILevel.MpllSs2            =
  PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2);

 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 
 table>emoryACPILevel  0;
 table->MemoryACPILevel.DownH = 100;
 table->MemoryACPILevel.VoltageDownH = 0;
intresult= ;
 table->MemoryACPILevel.ActivityLevel = PP_HOST_TO_SMC_US(data->current_profile_setting.mclk_activity);

 table->MemoryACPILevel.StutterEnable = java.lang.StringIndexOutOfBoundsException: Range [47, 46) out of bounds for length 47
 table->java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 table->java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 0
 tableM.EdcWriteEnable= java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 40
 table->java.lang.StringIndexOutOfBoundsException: Range [9, 7) out of bounds for length 34

 returncannot  divideid Vclkclock",returnresult);
}

static int ci_populate_smc_uvd_level(struct pp_hwmgr *hwmgr,
     SMU7_Discrete_DpmTable *tableresult =atomctrl_get_dfs_pll_dividers_vihwmgr
{
 int  PP_ASSERT_WITH(( = result,
 uint8_t count;
 struct pp_atomctrl_clock_dividers_vi " not find divide idfor Dclk clock, eturn result)java.lang.StringIndexOutOfBoundsException: Index 60 out of bounds for length 60
  =
  hwmgr-TCONVERT_FROM_HOST_TO_SMC_US(>count].;

 table->UvdLevelCount }

 for (count = 0; count < }
  table->UvdLevel[count].java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  [countvclk;
  table->UvdLevel[count].DclkFrequency =
     uvd_table->entries[ intresult=-EINVAL;
  table->UvdLevel[count].MinVddc =
     uvd_table->entries[count].v * VOLTAGE_SCALE;
  table-  hwmgr->dyn_state.vce_clock_voltage_dependency_table;

  result = atomctrl_get_dfs_pll_dividers_vi(hwmgr,
    table->UvdLevel[count].VclkFrequency, ÷rs);
  (0= result),
    "cantable-VceBootLevel = 0;

  table->UvdLevel[count].  count=0 count <table-VceLevelCount; count++) {

  result = atomctrl_get_dfs_pll_dividers_vi(hwmgr,
    table->UvdLevel[count].DclkFrequency, ÷rs);
  PP_ASSERT_WITH_CODE(0  ==result),
    "can not find table-VceLevel[ount. = 1java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39

   = (uint8_t)dividers.ll_post_divider;
  CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency);
  CONVERT_FROM_HOST_TO_SMC_UL  PP_ASSERT_WITH_CODE((0 == result),
  CONVERT_FROM_HOST_TO_SMC_US(table->UvdLevel[count].MinVddc);
 }

 return result;
}

static int ci_populate_smc_vce_level table-VceLevel[ount.=java.lang.StringIndexOutOfBoundsException: Range [53, 52) out of bounds for length 70
java.lang.StringIndexOutOfBoundsException: Range [26, 24) out of bounds for length 32
{
 int result
 uint8_t count;
 struct pp_atomctrl_clock_dividers_vi dividers;
 java.lang.StringIndexOutOfBoundsException: Range [34, 7) out of bounds for length 59
    hwmgr->dyn_state.vce_clock_voltage_dependency_table;

 table->VceLevelCount = (uint8_t)(vce_table->countstruct pp_atomctrl_clock_dividers_vi dividers;
 table->VceBootLevel  struct  *cp_table =

 for (ount =0;count  table->; count+) java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57
  table-> table-AcpLevelCount =uint8_tacp_table->;
  table->VceLevel[count].MinVoltage =
    vce_table->entries[countjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  table->VceLevel[count].MinPhases = 1;

  result = atomctrl_get_dfs_pll_dividers_vi(hwmgr,
   table-count]. ÷rs)java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 49
 PP_ASSERT_WITH_CODE(( = result,
    "can not find divide id for VCE engine clock",
    return result);

  table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;

  CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency);
  CONVERT_FROM_HOST_TO_SMC_US(table->VceLevel[count].MinVoltage);
 }
 return java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}

static int ci_populate_smc_acp_level(java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
     SMU7_Discrete_DpmTable *table)
{
 int result = -EINVAL;
 uint8_t count;
 struct pp_atomctrl_clock_dividers_vi dividers
 structphm_acp_clock_voltage_dependency_table *acp_table =
    hwmgr->dyn_state.acp_clock_voltage_dependency_table;

 table->AcpLevelCount = (uint8_t)(acp_table->count);
 table>AcpBootLevel = 0;

 for (count = 0; count < table->AcpLevelCount  uint32_t engine_clock,
  table->AcpLevel[ount.requency =acp_table>[.;
    structSMU7_Discrete_MCArbDramTimingTableEntry*arb_regs
  table->AcpLevel[count].MinPhases = 1;

  resultdividers_vi(hwmgr,
    table->AcpLevel[count].Frequency, ÷rs);
  PP_ASSERT_WITH_CODE(
    "can not find divide id for engine clock",java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

  table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_dividerjava.lang.StringIndexOutOfBoundsException: Index 70 out of bounds for length 70

  CONVERT_FROM_HOST_TO_SMC_UL(table->AcpLevel[count].Frequency);
  CONVERT_FROM_HOST_TO_SMC_US(table->AcpLevel[count].MinVoltage);
 }
 return result;
}

static int ci_populate_memory_timing_parameters
  struct pp_hwmgr *hwmgr,
  java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 1
  uint32_t memory_clock,
  struct = (tructsmu7_hwmgr *(hwmgr-b;
  )
{
 uint32_t dramTiming;
 uint32_t dramTiming2;
 uint32_t burstTime;
result;

 result = atomctrl_set_engine_dram_timings_rv770(data-mclk_tabledpm_levels[]value
    ,memory_clock)java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 32

 PP_ASSERT_WITH_CODE(result   java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
  java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 dramTiming  = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);
 dramTiming2 = cgs_read_register(hwmgr->device, java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 10
 burstTime = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0);

 arb_regs->McArbDramTiming  = PP_HOST_TO_SMC_UL(dramTiming);
 arb_regs->McArbDramTiming2 = PP_HOST_TO_SMC_UL(dramTiming2);
 arb_regs->McArbBurstTime = (uint8_t)burstTime;

 return
}

static
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr}
 struct ci_smumgr *smu_data = (struct ci_smumgrstaticint ci_populate_smc_boot_level(struct pp_hwmgr *wmgr,
 int result = 0;
 SMU7_Discrete_MCArbDramTimingTable  arb_regs;
 uint32_t i, j;

 memset(&arb_regs, 0x00, sizeof(SMU7_Discrete_MCArbDramTimingTable));

 for (i = 0; i < data->dpm_table.sclk_table.count; i++) {
  for (j =;j <data-dpm_table.mclk_table.count j++) {
   result = ci_populate_memory_timing_parameters
    (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value,
     data->dpm_table.mclk_table.dpm_levels[j].value,
     &arb_regs.entries[i][j]);

   if (0 != result)
    break;
  }
 }

 if (0 == result   data->vbios_boot_state.sclk_bootup_value,
  result = ci_copy_bytes_to_smc(
    hwmgr,
    smu_data->arb_table_start,
    (uint8_t *)&arb_regs,
    sizeof(SMU7_Discrete_MCArbDramTimingTable),
    SMC_RAM_END
    );
 }

 return result;
}

static int ci_populate_smc_boot_level(struct pp_hwmgr *hwmgr,
   SMU7_Discrete_DpmTable *table)
{
 int result = 0;
  smu7_hwmgr *data  struct  *(hwmgr-ackend)
 struct ci_smumgr *smu_data = java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 table->GraphicsBootLevel n(" did not findboot engine
 table->MemoryBootLevel java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /* find boot level from dpm table*/
 result = phm_find_boot_level(&(data->dpm_table.sclk_table),
 .sclk_bootup_value,
   (java.lang.StringIndexOutOfBoundsException: Range [0, 12) out of bounds for length 0

java.lang.StringIndexOutOfBoundsException: Range [28, 19) out of bounds for length 19
  smu_data->smc_state_table.GraphicsBootLevel = 0;
  pr_err("VBIOS did not find boot   result= 0java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
  result = 0;
java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 2

 result = phm_find_boot_levelos_boot_state.vddci_bootup_value;
  data->vbios_boot_state.mclk_bootup_value,
  (uint32_t *)&(smu_data->smc_state_table.MemoryBootLevel));

 if (0 != result) {
  smu_data->smc_state_table. int ci_populate_mc_reg_address*,
  pr_err("VBIOS did not java.lang.StringIndexOutOfBoundsException: Range [2, 1) out of bounds for length 45
  result = 0const struct *mu_data = (struct ci_smumgr *)hwmgr->smu_backend;
 }

 table->BootVddc = data->vbios_boot_state.vddc_bootup_value;
 table->BootVddci = data->vbios_boot_state.vddci_bootup_value;
 table->BootMVdd=data-vbios_boot_state.mvdd_bootup_value;

 return result;
java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 1

static int  "Index of mc_reg_tableIndexofmc_reg_table->]arrayout ofboundary,  -);
      mc_reg_table->address[i-a[i.0=
{
 const struct    PP_HOST_TO_SMC_US(smu_data>c_reg_table.[].);

 uint32_t i, j;

 java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
  if (smu_data->>ast  
 (i  ,
    "Index of mc_reg_table->java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
   java.lang.StringIndexOutOfBoundsException: Range [24, 15) out of bounds for length 32
    PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s0);
   mc_reg_table->address[i.1 =
    PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s1  *data,
   i++;
  }
 }

 mc_reg_table->last = (uint8_t)i;

java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 10
}

static void ci_convert_mc_registers(
 const struct ci_mc_reg_entry *java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 2
 SMU7_Discrete_MCRegisterSet *data,
 uint32_t num_entries, uint32_t valid_flag)
{
 uint32_t i, j  

 for   =(*)(hwmgrjava.lang.StringIndexOutOfBoundsException: Range [70, 69) out of bounds for length 71
  if (valid_flag & 1for i =0 i< smu_data-mc_reg_table.num_entries;i+ {
   data-> smu_data->mc_reg_table-m.java.lang.StringIndexOutOfBoundsException: Range [45, 44) out of bounds for length 59
   i++ java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
  }
 }if( =>num_entries & > ))
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

static int ci_convert_mc_reg_table_entry_to_smc(
  struct pp_hwmgr *hwmgr,
  const uint32_t memory_clock,
  SMU7_Discrete_MCRegisterSet *mc_reg_table_data
  )
{static ci_convert_mc_reg_table_to_smc(structpp_hwmgr *hwmgrjava.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65
 =;
 uint32_t i = 0;

 for (i = 0; i < java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 12
  if (memory_clock <=
   smu_data->mc_reg_table.mc_reg_table_entry[i].mclk_max) {
   ;
  }
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 if ((i == java.lang.StringIndexOutOfBoundsException: Range [1, 19) out of bounds for length 15
  --i;

 ci_convert_mc_registers(&smu_data->mc_reg_table.mc_reg_table_entry[i],
    java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 0
    smu_data->.validflag);

 return;
}

static int ci_convert_mc_reg_table_to_smc(struct pp_hwmgr *hwmgr,
  SMU7_Discrete_MCRegisters *mc_regs)
{
 int result = 0;
 struct smu7_hwmgr *data = (struct if0= data->>need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK))
 int res;
 uint32_t i;

 for (i = 0; i < data->java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 0
  res= ci_convert_mc_reg_table_entry_to_smc(
    hwmgr,
    data->dpm_table.mclk_table.dpm_levels[i].valuejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   &mc_regs-d[i]
    );

  if (0 != res)
   result = res;
 }

 return result;
}

static int ci_update_and_upload_mc_reg_table(struct pp_hwmgr hwmgrjava.lang.StringIndexOutOfBoundsException: Index 68 out of bounds for length 68
{
  struct  *= (truct  *(wmgr-s;
 struct smu7_hwmgr *data = (struct smu7_hwmgr *
 uint32_t java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18
 int32_t result;

 if (0 == (data-> "Failed to initializeto initializeMCRegTablefor MCaddresses!,returnresult);
  return 0;


 memset(&smu_data->mc_regs, 0, sizeof(SMU7_Discrete_MCRegisters  Failed initialize forstate",returnresult;;

 result = return ci_copy_bytes_to_smc(hwmgr, smu_data->mc_reg_table_start,

 if (result != 0)
  return result;

 address = smu_data->mc_reg_table_start + (uint32_t)offsetof(static int ci_populate_smc_initial_state(struct pp_hwmgr *hwmgr)

 return  ci_copy_bytes_to_smc(hwmgr, address,
     (uint8_t *)&smu_data->mc_regs.data[0],
   SMU7_Discrete_MCRegisterSet) *->dpm_table.mclk_table.,
    SMC_RAM_END);
}

static  ci_populate_initial_mc_reg_table(struct pp_hwmgr *hwmgr)
{
 int result;
 structci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);

screte_MCRegisters);
 result = java.lang.StringIndexOutOfBoundsException: Range [46, 28) out of bounds for length 55
 PP_ASSERT_WITH_CODE(0 ==
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 result = ci_convert_mc_reg_table_to_smc(hwmgr, &smu_data->mc_regs);
 PP_ASSERT_WITH_CODE(0 = java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
  "Failed to  (hwmgr->dyn_state.vddc_dependency_on_mclkentries[].

 return ci_copy_bytes_to_smc >smc_state_table.MemoryBootLevel =level;
   (uint8_t *)&smu_data->mc_regs, sizeof(SMU7_Discrete_MCRegisters), SMC_RAM_END);
}

static int ci_populate_smc_initial_state
{
 struct smu7_hwmgr
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(static int ci_populate_smc_svi2_config(struct pp_hwmgr *hwmgr,
java.lang.StringIndexOutOfBoundsException: Range [9, 8) out of bounds for length 22

 count = (uint8_t)(  = data)

 for (level = 0; java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 5
  if (hwmgr->java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
    >= data->vbios_boot_state.ci_program_jump_on_start(hwmgr);
   smu_data->smc_state_table.java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 23
   break
  }
 }

 count  java.lang.StringIndexOutOfBoundsException: Range [25, 24) out of bounds for length 56

 for (level = 0; level < count;java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  if (hwmgr->dyn_state.java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 17
  tejava.lang.StringIndexOutOfBoundsException: Range [48, 46) out of bounds for length 49
   smu_data->smc_state_table.java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 0
   break;
  }
 }

 return 0;
}

static java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
         SMU7_Discrete_DpmTable *table)
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);

 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->voltage_control)
  table->SVI2Enable = 1;
 else
   >  ;
 return 0;
}

java.lang.StringIndexOutOfBoundsException: Range [7, 6) out of bounds for length 47
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 /* set smc instruct start point at 0x0 */
 ci_program_jump_on_start(hwmgr);

 /* enable smc clock */
PHM_WRITE_INDIRECT_FIELD(wmgr>device, CGS_IND_REG__SMC,SMC_SYSCON_CLOCK_CNTL_0, ck_disable,0));

PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0);

 PHM_WAIT_INDIRECT_FIELD(hwmgr, SMC_IND, FIRMWARE_FLAGS,
     INTERRUPTS_ENABLED, 1);

 return 0;
}

static int ci_populate_vr_config(struct pp_hwmgr *hwmgr, SMU7_Discrete_DpmTable *table)
{
  data  struct *)(hwmgr-backend)
 uint16_t config;

 =VR_SVI2_PLANE_1;
 table->VRConfig |= DRAM_LOG_ADDR_Hjava.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23

 if (SMU7_VOLTAGE_CONTROL_BY_SVID2  return  ;
  config = VR_SVI2_PLANE_2;
  table->case DRAM_LOG_PHY_ADDR_H
 } else {
  pr_info("VDDCshould be on SVI2 controller!");
 }

 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) {
  config = VR_SVI2_PLANE_2;
  table->VRConfig |= (config<<VRCONF_VDDCI_SHIFT);
 } else if (SMU7_VOLTAGE_CONTROL_BY_GPIObreak;
  config = VR_SMIO_PATTERN_1;
  table->VRConfigcaseLowSclkInterruptThreshold
 }

 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == databreak;
  config = VR_SMIO_PATTERN_2;
 table>|(onfig<VRCONF_MVDD_SHIFT)java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 49
 }

 static (int32_t java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
}switch(alue) {

static int ci_init_smc_table(struct pp_hwmgr * case
{
 int result;
 struct smu7_hwmgr *data = (struct smu7_hwmgr *) SMU_MAX_LEVELS_LINK:
 struct ci_smumgr *  sci_smumgr *)(hwmgr->smu_backend);
 SMU7_Discrete_DpmTable  *table = &(smu_data->smc_state_table);
 structpp_atomctrl_gpio_pin_assignment gpio_pin
 u32 i;

 ci_initialize_power_tune_defaults(hwmgr);
 memset(&(smu_data->smc_state_table), 0

 if (SMU7_VOLTAGE_CONTROL_NONE != data->voltage_control)
  ci_populate_smc_voltage_tablesSMU_MAX_LEVELS_VDDCI

 if ( SMU_MAX_LEVELS_MVDD
   CTransition)
  table->SystemFlags |= PPSMC_SYSTEMFLAG_GPIO_DC


 (hwmgr>.platformCaps
   PHM_PlatformCaps_StepVddc))
  uint32_t,java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33

 if (data->struct cgs_firmware_info info = {0};
  table->SystemFlags |= PPSMC_SYSTEMFLAG_GDDR5;

 if (data->ulv_supported) {
  result = ci_populate_ulv_state
  (0 ==result,
   "Failed to initialize ULV state!", return result);

-device, ,
   ixCG_ULV_PARAMETER =( )nfo.kptr;
 }

 result=h)java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 48
 (0= java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
  "Failed to initialize Graphics Level!", return result);

 result = ci_populate_all_memory_levels
 ( =resultjava.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
  "Failed to initialize Memory Level!", return result);

 result = ci_populate_smc_link_level( for( > 4  -= ){
 PP_ASSERT_WITH_CODE(0 == result,
  Fto initialize Link Level"return ;

 result = ci_populate_smc_acpi_level(hwmgr, table);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize ACPI "  result)java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53

 result = ci_populate_smc_vce_level(hwmgr, table);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize VCE Level!", return result);

 result = if 0! byte_count) {
 P_ASSERT_WITH_CODE(0 =result,
  "Failed to initialize return -EINVAL;

 /* Since only the initial state is completely set up at this point (the other states are just copies of the boot state) we only */
 /* need to populate the  ARB settings for the initial state. */
 result = ci_program_memory_timing_parameters(hwmgr);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to Write ARB settings forstatic int ci_upload_firmware(struct pp_hwmgr *hwmgr)

{
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize UVD Level!", return result);

 table->UvdBootLevel  = 0;
 table->VceBootLevel  = 0;
 table->AcpBootLevel  = 0;
 table->SamuBootLevel  = 0;

 table->java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 21
 table->MemoryBootLevel = 0;

 java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 0
 P_ASSERT_WITH_CODE0= java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
 "Failed initialize BootLevel" result)java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53

 result = ci_populate_smc_initial_state(hwmgr);
 PP_ASSERT_WITH_CODE(0 == result, java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 result = ci_populate_bapm_parameters_in_dpm_table(hwmgr); java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
 PP_ASSERT_WITH_CODE(0 == result, "Failed to populate BAPM Parameters!", return result);

 table->UVDInterval = 1;
 table->VCEInterval = 1;
 table->ACPInterval = 1;
 table->java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 table->GraphicsVoltageChangeEnable  = 1;
 table->GraphicsThermThrottleEnable  = 1;
 table->GraphicsInterval = 1;
 table->VoltageInterval  = 1;
 table->ThermalInterval  = 1java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29

 table->TemperatureLimitHigh =
  (data->thermal_temp_setting.temperature_high *
   SMU7_Q88_FORMAT_CONVERSION_UNITresult =java.lang.StringIndexOutOfBoundsException: Range [39, 32) out of bounds for length 39
 table->TemperatureLimitLow =
  (data->thermal_temp_setting.temperature_low *
  SMU7_Q88_FORMAT_CONVERSION_UNIT)  if( = java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19

 table->  = 1;
 table->MemoryInterval  = 1;
 table->VoltageResponseTime  = 0;
 table->VddcVddciDelta = 4000;
 table->PhaseResponseTime  = 0;
 table  = 1;

 PP_ASSERT_WITH_CODE((1 <= data->dpm_table.pcie_speed_table offsetof(MU7_Firmware_Header, mcRegisterTable)java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
   "There must be 1 or more PCIEjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   return -EINVAL);

 table->PCIeBootLinkLevel = java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 table->PCIeGenInterval = 1;

 result= ci_populate_vr_config(wmgr table);
  &tmp, SMC_RAM_ENDjava.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23
   if 0= java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
 data->vr_config = table

 java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 0

 for (i = 0; i < SMU7_MAX_ENTRIES_SMIO; i++)
  CONVERT_FROM_HOST_TO_SMC_UL(table->Smio[i]  &tmp ;

 table->ThermGpio  = 17;
 -java.lang.StringIndexOutOfBoundsException: Range [21, 20) out of bounds for length 30
 if (atomctrl_get_pp_assign_pin(
 table->VRHotGpio = gpio_pin.uc_gpio_pin_bit_shift;
  phm_cap_set(hwmgr->platform_descriptor.platformCaps,
 result  java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for length 39
  else
  table->java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  phm_cap_unsethwmgrjava.lang.StringIndexOutOfBoundsException: Range [32, 31) out of bounds for length 42
    PHM_PlatformCaps_RegulatorHot);
 }

 table>AcDcGpio  java.lang.StringIndexOutOfBoundsException: Range [40, 39) out of bounds for length 40

 CONVERT_FROM_HOST_TO_SMC_UL(>ystemFlags;
 CONVERT_FROM_HOST_TO_SMC_UL(
 CONVERT_FROM_HOST_TO_SMC_UL(able-S;
 CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMaskVddcPhase);
 CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMaskVddciVid);
  bool ci_check_s0_mc_reg_index in_reg,uint16_t *java.lang.StringIndexOutOfBoundsException: Index 72 out of bounds for length 72
 CONVERT_FROM_HOST_TO_SMC_UL(table->SclkStepSize);
 java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 18
 CONVERT_FROM_HOST_TO_SMC_US(table->TemperatureLimitLow);
 table->VddcVddciDelta = PP_HOST_TO_SMC_US(table  break;
 CONVERT_FROM_HOST_TO_SMC_US(table->VoltageResponseTime);
 CONVERT_FROM_HOST_TO_SMC_US(table->PhaseResponseTime out_reg  

 table->BootVddc = PP_HOST_TO_SMC_US(table- case  mmMC_SEQ_G5PDX_CMD0java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
 table->BootVddci = PP_HOST_TO_SMC_US(table->java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 0
 table->BootMVdd = *out_reg = mmMC_SEQ_G5PDX_CMD1_LP;

 /* Upload all dpm data to SMC memory.(dpm level, dpm level count etc) */
 result = ci_copy_bytes_to_smc
  offsetof(MU7_Discrete_DpmTable, SystemFlags,
     (uint8_t *)&(table->SystemFlags),
    )-3 *SMU7_PIDController)java.lang.StringIndexOutOfBoundsException: Index 67 out of bounds for length 67
     SMC_RAM_END);

 PP_ASSERT_WITH_CODE  java.lang.StringIndexOutOfBoundsException: Range [36, 35) out of bounds for length 36
  "Failed to upload dpm java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27

 result = ci_populate_initial_mc_reg_table(hwmgr);
 PP_ASSERT_WITH_CODE((0 == result),java.lang.StringIndexOutOfBoundsException: Range [6, 5) out of bounds for length 28
  "Failed to populate initialize MC Reg table!", return java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 result = ci_populate_pm_fuses(hwmgr);
 PP_ASSERT_WITH_CODE(0 == result,
   "Failed to  populate PM fuses to SMC memory!"break

 java.lang.StringIndexOutOfBoundsException: Range [14, 13) out of bounds for length 21

 return 0;
}

intci_thermal_setup_fan_table(tructpp_hwmgr*hwmgr)
{
 struct ci_smumgr *ci_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 SMU7_Discrete_FanTable fan_table = { java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 8
 uint32_t duty100;
 uint32_t java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
 uint16_t   java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
 uint32_t reference_clock;
 int res;
 uint64_t tmp64;

 if (!phm_cap_enabled(hwmgr->platform_descriptor.java.lang.StringIndexOutOfBoundsException: Range [2, 61) out of bounds for length 8
  return 0;

 if (hwmgr->thermal_controller.fanInfojava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  phm_cap_unset java.lang.StringIndexOutOfBoundsException: Range [11, 10) out of bounds for length 38
   PHM_PlatformCaps_MicrocodeFanControl);
  return 0;
 }

 if (0 == ci_data->fan_table_start) {
  phm_cap_unset(hwmgr->platform_descriptor.platformCaps
  return 0;
 }

 duty100 =   break;

 if (0 == duty100) {
  phm_cap_unset(hwmgr->platform_descriptor.java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 34
  return 0;
 }

 tmp64 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMMin * duty100;
 do_div(tmp64, 10000);
 fdo_min = (uint16_t)tmp64return ;

 t_diff1 = hwmgr->int ci_set_s0_mc_reg_index*able
 t_diff2 =java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

 pwm_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMMedfori  ;i <->i+)java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
->.-hwmgr-tjava.lang.StringIndexOutOfBoundsException: Range [105, 104) out of bounds for length 142

 slope1 = (uint16_t)((50 + ((16 * 0;
 slope2 = (java.lang.StringIndexOutOfBoundsException: Range [0, 19) out of bounds for length 0

 fan_table.
 fan_table.TempMed = cpu_to_be16java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  "InvalidInvalid java.lang.StringIndexOutOfBoundsException: Range [20, 19) out of bounds for length 45

 fan_table.Slope1 =  "Invalid VramInfo table."return-INVAL)java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45
 fan_table.Slope2 = cpu_to_be16(slope2);

 fan_table.FdoMin = cpu_to_be16(fdo_min);

 

 HystUp=cpu_to_be161;

 java.lang.StringIndexOutOfBoundsException: Range [21, 20) out of bounds for length 38

 fan_table.TempRespLim = java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 2

 reference_clock = java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 10

 fan_table.RefreshPeriod = cpu_to_be32 int(pp_hwmgr*hwmgr

 fan_table.FdoMax = java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 1

 fan_table.TempSrc = (uint8_t)PHM_READ_VFPF_INDIRECT_FIELDstruct *=(java.lang.StringIndexOutOfBoundsException: Range [35, 34) out of bounds for length 65

 res = ci_copy_bytes_to_smc(hwmgr, ci_data->fan_table_start, (uint8_t *)&fan_table, (uint32_t)sizeof(fan_table), SMC_RAM_END);

 return res;
}

static int ci_program_mem_timing_parameters(struct pp_hwmgr *hwmgr)
{
structsmu7_hwmgr ( java.lang.StringIndexOutOfBoundsException: Range [46, 45) out of bounds for length 65

 java.lang.StringIndexOutOfBoundsException: Range [4, 3) out of bounds for length 39
   (DPMTABLE_OD_UPDATE_SCLK  -mc_reg_address[]=java.lang.StringIndexOutOfBoundsException: Range [58, 57) out of bounds for length 58
  return ci_program_memory_timing_parameters(hwmgr);

 return 0;
}

static int ci_update_sclk_thresholdjjava.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 7
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 struct ci_smumgr *smu_data =  java.lang.StringIndexOutOfBoundsException: Range [12, 11) out of bounds for length 65

 int result = 0;
 low_sclk_interrupt_threshold = 0;

 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
   PHM_PlatformCaps_SclkThrottleLowNotification tjava.lang.StringIndexOutOfBoundsException: Range [15, 14) out of bounds for length 30
  && (data->low_sclk_interrupt_threshold
  low_sclk_interrupt_threshold =
    table-k].c_data[]=0x100;

 (;

  result = ci_copy_bytes_to_smc(
    hwmgr,
    smu_data- "java.lang.StringIndexOutOfBoundsException: Range [14, 13) out of bounds for length 48
    SMU7_Discrete_DpmTable,
     LowSclkInterruptT),
    (uint8_t *)&low_sclk_interrupt_threshold,
    sizeof(uint32_t),
    SMC_RAM_END);
 }

 result = ci_update_and_upload_mc_reg_table(hwmgr);

java.lang.StringIndexOutOfBoundsException: Range [21, 20) out of bounds for length 85

  java.lang.StringIndexOutOfBoundsException: Range [43, 42) out of bounds for length 50
 java.lang.StringIndexOutOfBoundsException: Range [22, 20) out of bounds for length 35
   "Failed to program memory timing parameters!"  -k.j=
   );

 return result;
}

,java.lang.StringIndexOutOfBoundsException: Index 63 out of bounds for length 63
{
 switch (java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 0
 case SMU_SoftRegisters:
  switch (member) {
  case HandshakeDisables:
   return offsetof(java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 0
  case VoltageChangeTimeout:
   return offsetof(java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 14
GraphicsActivity:
   java.lang.StringIndexOutOfBoundsException: Range [57, 55) out of bounds for length 57
  case  table-[]mc_datai java.lang.StringIndexOutOfBoundsException: Index 46 out of bounds for length 46
   return offsetof(  java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
  casejava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
   java.lang.StringIndexOutOfBoundsException: Range [10, 9) out of bounds for length 53
  case VBlankTimeout:
   return offsetof(SMU7_SoftRegisters, VBlankTimeout);
  case DRAM_LOG_ADDR_H:
   return offsetof(SMU7_SoftRegisters, DRAM_LOG_ADDR_H);
  case DRAM_LOG_ADDR_L:
   return offsetof(SMU7_SoftRegisters, DRAM_LOG_ADDR_L);
 java.lang.StringIndexOutOfBoundsException: Range [27, 25) out of bounds for length 33
   return offsetof(SMU7_SoftRegisters, DRAM_LOG_PHY_ADDR_H);
  case DRAM_LOG_PHY_ADDR_L:
   return table = kzalloc(sizeof(pp_atomctrl_mc_reg_table), GFP_KERNEL);
  case DRAM_LOG_BUFF_SIZE:
   return  return -ENOMEM
  }
  break;
 case SMU_Discrete_DpmTable:
  switch (member) {
  case LowSclkInterruptThreshold:
   return offsetof(SMU7_Discrete_DpmTable, LowSclkInterruptT);
  }
  break;
 }
 cantoffset  xjava.lang.StringIndexOutOfBoundsException: Range [50, 49) out of bounds for length 71
 return 0;
}

static uint32_t ci_get_mac_definition(uint32_t valuejava.lang.StringIndexOutOfBoundsException: Range [20, 19) out of bounds for length 114
{
 switch (value) {
 case SMU_MAX_LEVELS_GRAPHICS:
  return SMU7_MAX_LEVELS_GRAPHICShwmgr>,java.lang.StringIndexOutOfBoundsException: Range [60, 59) out of bounds for length 118
 cgs_write_registerhwmgr-, java.lang.StringIndexOutOfBoundsException: Range [79, 78) out of bounds for length 114
  ;
 java.lang.StringIndexOutOfBoundsException: Range [20, 19) out of bounds for length 114
  return SMU7_MAX_LEVELS_LINK;
 case SMU_MAX_ENTRIES_SMIO:
  return ;
 case java.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 26
 case java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
  java.lang.StringIndexOutOfBoundsException: Range [9, 8) out of bounds for length 30
 case :
  return cgs_write_register(hwmgr->devi java.lang.StringIndexOutOfBoundsException: Range [61, 59) out of bounds for length 114
SMU_MAX_LEVELS_MVDD:
  return SMU7_MAX_LEVELS_MVDD;
 }

 pr_debug("can't get the mac of %x\n", value);
 return 0;
}

java.lang.StringIndexOutOfBoundsException: Range [44, 6) out of bounds for length 52
{
 uint32_t , start_addr;
 uint8_t *src;
 uint32_t data;

 struct cgs_firmware_info info = {0};

 cgs_get_firmware_info(hwmgr->device, CGS_UCODE_ID_SMU, &info);

 hwmgr->is_kicker = info.is_kicker;
 hwmgr->smu_version = info.version;
 byte_count = info.image_size;
 src = (uint8_t *)info.kptr;
 start_addr = info.ucode_start_address;

 ) {
  pr_err("SMC address is beyond the SMCjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  return -EINVAL;
 }

 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr);
 PHM_WRITE_FIELDstaticint ci_start_smus  *hwmgr

 for 0;
  data = (src[0] << 24) | (src[1] << 16) | (java.lang.StringIndexOutOfBoundsException: Range [0, 47) out of bounds for length 0
  cgs_write_register(hwmgr-   void*)
 src +4;
 }
 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0);

 if (0 != byte_count) {
  pr_err("SMC size must be divisible by 4\n");
  return -EINVAL;
 }

 return 0;
}

static int ci_upload_firmware offsetof()java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51
{
 ifmclk_array=-dpm_table_start
  (smc isrunning needloadsmcfirmwaren");
  struct * =
  java.lang.StringIndexOutOfBoundsException: Range [12, 11) out of bounds for length 41
 java.lang.StringIndexOutOfBoundsException: Range [30, 24) out of bounds for length 55
   boot_seq_donet p =
java.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 80
   pre_fetcher_en, 1);

 PHM_WRITE_INDIRECT_FIELD
  if (setting(-bupdate_sclk)java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
 return ci_load_smc_ucode(hwmgr);
}

static(structpp_hwmgrhwmgr)
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 struct ci_smumgr *ci_data = (struct ci_smumgr *)(hwmgr->smu_backend);

  tmp=0;;
 int result;
 bool error = false;

 if (ci_upload_firmware(hwmgr))
  return -EINVAL;

 result = ci_read_smc_sram_dword(hwmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
    offsetof(SMU7_Firmware_Header, DpmTable),
  &mp SMC_RAM_END;

 if (0 == result)
  ci_data->dpm_table_start = tmp;

 error| 0 !=result);

 result = ci_read_smc_sram_dword(hwmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
    offsetof(SMU7_Firmware_Header, SoftRegisters),
    &tmp,SMC_RAM_END)java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23

 if (0 == result) {

  ci_data->soft_regs_start = tmp;
 }

t;

 result(hwmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
    java.lang.StringIndexOutOfBoundsException: Range [50, 12) out of bounds for length 52
    &tmp, SMC_RAM_END    +offsetof(SMU7_Discrete_GraphicsLevel, DownH);

 if (0 == result)
  ci_data->mc_reg_table_start = tmp;

 result=ci_read_smc_sram_dword(wmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
    offsetof(SMU7_Firmware_Header,   tmp= phm_set_field_to_u32(up_hyst_offset tmp, levels[i].UpH,sizeofuint8_t);
       tmp =phm_set_field_to_u32(down_hyst_offset,tmp levels[]DownH,sizeof(int8_t);

if(0= result)
  ci_data->fan_table_start = tmp;

 error |= (0 != result);

 result = ci_read_smc_sram_dword(hwmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
    offsetof(SMU7_Firmware_Header, mcArbDramTimingTable  smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel, NULL);
    &tmp, SMC_RAM_END);

 if (0 == result)
  ci_data->arb_table_start = tmp;

 error |= (0 !  if(data>mclk_dpm_key_disabled

 result = ci_read_smc_sram_dword(hwmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
7Firmware_Header, Version)
    &tmp, SMC_RAM_END);

 if (0 == result)
  hwmgr.SMC =tmp;

 error |= (0 != result);

 return error ? 1 : 0;
}

static uint8_t ci_get_memory_modile_index(struct pp_hwmgr *hwmgr)
{
return(uint8_t) 0xFF  (cgs_read_register(> ) > 16);
}

static ci_check_s0_mc_reg_index(int16_t , uint16_t*ut_reg)
{
 bool result = true cgs_write_ind_register(>,CGS_IND_REG__SMC  java.lang.StringIndexOutOfBoundsException: Range [86, 85) out of bounds for length 92

 switch (in_reg) {   if([]UpH =setting- |
 case:
  *out_reg =  mclk_levels[i].UpH = setting-java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47
  break;

 case  mmMC_SEQ_DLL_STBY:
  *out_reg = down_hyst_offset = mclk_array(java.lang.StringIndexOutOfBoundsException: Range [73, 69) out of bounds for length 75
  break;

java.lang.StringIndexOutOfBoundsException: Range [27, 26) out of bounds for length 27
  *out_reg = mmMC_SEQ_G5PDX_CMD0_LP;
  break;

 case  mmMC_SEQ_G5PDX_CMD1:
  *out_reg = mmMC_SEQ_G5PDX_CMD1_LP;
  break;

 case  mmMC_SEQ_G5PDX_CTRL:}
  *out_reg = mmMC_SEQ_G5PDX_CTRL_LP;
  break;

 case mmMC_SEQ_CAS_TIMING:
 *out_reg = mmMC_SEQ_CAS_TIMING_LP;
  break;

  mmMC_SEQ_MISC_TIMING
  *out_reg = mmMC_SEQ_MISC_TIMING_LP  *=hwmgr-;
  break;

 case mmMC_SEQ_MISC_TIMING2:
  *out_reg = mmMC_SEQ_MISC_TIMING2_LP;
   uint32_ java.lang.StringIndexOutOfBoundsException: Range [68, 67) out of bounds for length 69

 case mmMC_SEQ_PMG_DVS_CMD:
 d.java.lang.StringIndexOutOfBoundsException: Range [47, 46) out of bounds for length 52
  break;

 case  smu_data->smc_state_table ;
  *out_reg >java.lang.StringIndexOutOfBoundsException: Range [28, 27) out of bounds for length 64
 java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8

 java.lang.StringIndexOutOfBoundsException: Range [25, 24) out of bounds for length 25
  *out_reg = mmMC_SEQ_RD_CTL_D0_LP;
  break;

 case mmMC_SEQ_RD_CTL_D1:
  out_reg =mmMC_SEQ_RD_CTL_D1_LPjava.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
  break;

 case mmMC_SEQ_WR_CTL_D0:
  *out_reg = mmMC_SEQ_WR_CTL_D0_LP;
  break;

 case mmMC_SEQ_WR_CTL_D1:
  *out_reg = mmMC_SEQ_WR_CTL_D1_LP;
  break;

 case mmMC_PMG_CMD_EMRS:
  *out_reg = mmMC_SEQ_PMG_CMD_EMRS_LP;
  break;

 case mmMC_PMG_CMD_MRS:
  *out_reg = mmMC_SEQ_PMG_CMD_MRS_LP;
  break;

 case mmMC_PMG_CMD_MRS1:
  *out_reg  hwmgr->java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55
  break;

  AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK
  *out_reg   |
  break;

 uint32_tmax_vddc  >m. max_clock_voltage_on_acvddc:
  *out_reg   hwmgr-dyn_state.vddcjava.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
  break;

 case:
  *out_reg = mmMC_SEQ_WR_CTL_2_LP   ,0;/* temp hard code to level 0, vce can set min evclk*/
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 default:
;
  break;
}

java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 15
}

static int ci_set_s0_mc_reg_index( ( java.lang.StringIndexOutOfBoundsException: Index 76 out of bounds for length 76
{
 uint32_t i;
 uint16_t address;

  i=0   -last ++ java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
  table->mc_reg_address[i].s0 =
 ci_check_s0_mc_reg_indextable->[i., &java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
   ? address : table->mc_reg_address  :
   (hwmgr)
 return 0;
}

static int ci_copy_vbios_smc_reg_table(const pp_atomctrl_mc_reg_table *table,
     struct ci_mc_reg_table *ni_table)
{
 uint8_t i, j;

 PP_ASSERT_WITH_CODE((table->last <= SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE),
staticvoidci_reset_smcs pp_hwmgr*java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 48
 PP_ASSERT_WITH_CODE(( PP_ASSERT_WITH_CODE((table-,CGS_IND_REG__SMC,
  "Invalid VramInfo table.", return -EINVAL);

 for (i = 0; i < table->last; i++)
  ni_table->mc_reg_address[i].s1 = table->mc_reg_addressjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 ni_table->last = table->last;

 for (i = 0; i < table->num_entries; i++) {
  ni_table->mc_reg_table_entry[i].mclk_max =
   table->mc_reg_table_entry[i].mclk_max;
  for (j = 0; j < table->last; j++) {
   ni_table->mc_reg_table_entry[i].mc_data[j]  (java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 46
 >java.lang.StringIndexOutOfBoundsException: Range [32, 29) out of bounds for length 44
  }
 }

 ni_table->num_entries = table->num_entries;

 return 0;
}java.lang.StringIndexOutOfBoundsException: Range [12, 11) out of bounds for length 27

static int ci_set_mc_special_registers(struct pp_hwmgr *hwmgr,
     struct ci_mc_reg_table *table)
{
 uint8_t i, j, k;
 uint32_t temp_reg;
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);

 for (i = 0, j .send_msg_to_smc_with_parameter =ci_send_msg_to_smc_with_parameter,
  PP_ASSERT_WITH_CODE((j < SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE),
   "Invalid VramInfo table.", return -EINVAL);

  switch (table->mc_reg_address[i].s1) {

  case mmMC_SEQ_MISC1:
   temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS);
   table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS;
   table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP;
   for (k = 0; k < table->num_entries; k++) {
    table->mc_reg_table_entry[k].mc_data get_mac_definition=ci_get_mac_definition
     ((temp_reg reg_table= ci_initialize_mc_reg_table,
     ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
   }
   j++;

 PP_ASSERT_WITH_CODE(<SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE)
    "java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 2
   temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS);
   table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS;
   table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP;
   for (k = 0; k < table->num_entries; k++) {
    table->mc_reg_table_entry[k].mc_data[j] =
     (temp_reg & 0xffff0000) |
     (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);

    if (!data->is_memory_gddr5)
     table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
   }
   j++;

   if (!data->is_memory_gddr5) {
    PP_ASSERT_WITH_CODE((j < SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE),
     "Invalid VramInfo table.", return -EINVAL);
    table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD;
    table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD;
    for (k = 0; k < table->num_entries; k++) {
     table->mc_reg_table_entry[k].mc_data[j] =
      (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16;
    }
    j++;
   }

   break;

  case mmMC_SEQ_RESERVE_M:
   temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1);
   table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS1;
   table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS1_LP;
   for (k = 0; k < table->num_entries; k++) {
    table->mc_reg_table_entry[k].mc_data[j] =
     (temp_reg & 0xffff0000) |
     (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
   }
   j++;
   break;

  default:
   break;
  }

 }

 table->last = j;

 return 0;
}

static int ci_set_valid_flag(struct ci_mc_reg_table *table)
{
 uint8_t i, j;

 for (i = 0; i < table->last; i++) {
  for (j = 1; j < table->num_entries; j++) {
   if (table->mc_reg_table_entry[j-1].mc_data[i] !=
    table->mc_reg_table_entry[j].mc_data[i]) {
    table->validflag |= (1 << i);
    break;
   }
  }
 }

 return 0;
}

static int ci_initialize_mc_reg_table(struct pp_hwmgr *hwmgr)
{
 int result;
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 pp_atomctrl_mc_reg_table *table;
 struct ci_mc_reg_table *ni_table = &smu_data->mc_reg_table;
 uint8_t module_index = ci_get_memory_modile_index(hwmgr);

 table = kzalloc(sizeof(pp_atomctrl_mc_reg_table), GFP_KERNEL);

 if (NULL == table)
  return -ENOMEM;

 /* Program additional LP registers that are no longer programmed by VBIOS */
 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));
 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));
 cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_DLL_STBY));
 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0));
 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1));
 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL));
 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD));
 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL));
 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING));
 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));
 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_EMRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS));
 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS));
 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS1_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1));
 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0));
 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));
 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));
 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1));
 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING));
 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS2_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2));
 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2));

 result = atomctrl_initialize_mc_reg_table(hwmgr, module_index, table);

 if (0 == result)
  result = ci_copy_vbios_smc_reg_table(table, ni_table);

 if (0 == result) {
  ci_set_s0_mc_reg_index(ni_table);
  result = ci_set_mc_special_registers(hwmgr, ni_table);
 }

 if (0 == result)
  ci_set_valid_flag(ni_table);

 kfree(table);

 return result;
}

static bool ci_is_dpm_running(struct pp_hwmgr *hwmgr)
{
 return ci_is_smc_ram_running(hwmgr);
}

static int ci_smu_init(struct pp_hwmgr *hwmgr)
{
 struct ci_smumgr *ci_priv;

 ci_priv = kzalloc(sizeof(struct ci_smumgr), GFP_KERNEL);

 if (ci_priv == NULL)
  return -ENOMEM;

 hwmgr->smu_backend = ci_priv;

 return 0;
}

static int ci_smu_fini(struct pp_hwmgr *hwmgr)
{
 kfree(hwmgr->smu_backend);
 hwmgr->smu_backend = NULL;
 return 0;
}

static int ci_start_smu(struct pp_hwmgr *hwmgr)
{
 return 0;
}

static int ci_update_dpm_settings(struct pp_hwmgr *hwmgr,
    void *profile_setting)
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 struct ci_smumgr *smu_data = (struct ci_smumgr *)
   (hwmgr->smu_backend);
 struct profile_mode_setting *setting;
 struct SMU7_Discrete_GraphicsLevel *levels =
   smu_data->smc_state_table.GraphicsLevel;
 uint32_t array = smu_data->dpm_table_start +
   offsetof(SMU7_Discrete_DpmTable, GraphicsLevel);

 uint32_t mclk_array = smu_data->dpm_table_start +
   offsetof(SMU7_Discrete_DpmTable, MemoryLevel);
 struct SMU7_Discrete_MemoryLevel *mclk_levels =
   smu_data->smc_state_table.MemoryLevel;
 uint32_t i;
 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp;

 if (profile_setting == NULL)
  return -EINVAL;

 setting = (struct profile_mode_setting *)profile_setting;

 if (setting->bupdate_sclk) {
  if (!data->sclk_dpm_key_disabled)
   smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel, NULL);
  for (i = 0; i < smu_data->smc_state_table.GraphicsDpmLevelCount; i++) {
   if (levels[i].ActivityLevel !=
    cpu_to_be16(setting->sclk_activity)) {
    levels[i].ActivityLevel = cpu_to_be16(setting->sclk_activity);

    clk_activity_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i)
      + offsetof(SMU7_Discrete_GraphicsLevel, ActivityLevel);
    offset = clk_activity_offset & ~0x3;
    tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));
    tmp = phm_set_field_to_u32(clk_activity_offset, tmp, levels[i].ActivityLevel, sizeof(uint16_t));
    cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

   }
   if (levels[i].UpH != setting->sclk_up_hyst ||
    levels[i].DownH != setting->sclk_down_hyst) {
    levels[i].UpH = setting->sclk_up_hyst;
    levels[i].DownH = setting->sclk_down_hyst;
    up_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i)
      + offsetof(SMU7_Discrete_GraphicsLevel, UpH);
    down_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i)
      + offsetof(SMU7_Discrete_GraphicsLevel, DownH);
    offset = up_hyst_offset & ~0x3;
    tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));
    tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpH, sizeof(uint8_t));
    tmp = phm_set_field_to_u32(down_hyst_offset, tmp, levels[i].DownH, sizeof(uint8_t));
    cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));
   }
  }
  if (!data->sclk_dpm_key_disabled)
   smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel, NULL);
 }

 if (setting->bupdate_mclk) {
  if (!data->mclk_dpm_key_disabled)
   smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel, NULL);
  for (i = 0; i < smu_data->smc_state_table.MemoryDpmLevelCount; i++) {
   if (mclk_levels[i].ActivityLevel !=
    cpu_to_be16(setting->mclk_activity)) {
    mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity);

    clk_activity_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i)
      + offsetof(SMU7_Discrete_MemoryLevel, ActivityLevel);
    offset = clk_activity_offset & ~0x3;
    tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));
    tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t));
    cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

   }
   if (mclk_levels[i].UpH != setting->mclk_up_hyst ||
    mclk_levels[i].DownH != setting->mclk_down_hyst) {
    mclk_levels[i].UpH = setting->mclk_up_hyst;
    mclk_levels[i].DownH = setting->mclk_down_hyst;
    up_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i)
      + offsetof(SMU7_Discrete_MemoryLevel, UpH);
    down_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i)
      + offsetof(SMU7_Discrete_MemoryLevel, DownH);
    offset = up_hyst_offset & ~0x3;
    tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));
    tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t));
    tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownH, sizeof(uint8_t));
    cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));
   }
  }
  if (!data->mclk_dpm_key_disabled)
   smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel, NULL);
 }
 return 0;
}

static int ci_update_uvd_smc_table(struct pp_hwmgr *hwmgr)
{
 struct amdgpu_device *adev = hwmgr->adev;
 struct smu7_hwmgr *data = hwmgr->backend;
 struct ci_smumgr *smu_data = hwmgr->smu_backend;
 struct phm_uvd_clock_voltage_dependency_table *uvd_table =
   hwmgr->dyn_state.uvd_clock_voltage_dependency_table;
 uint32_t profile_mode_mask = AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD |
     AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK |
     AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK |
     AMD_DPM_FORCED_LEVEL_PROFILE_PEAK;
 uint32_t max_vddc = adev->pm.ac_power ? hwmgr->dyn_state.max_clock_voltage_on_ac.vddc :
      hwmgr->dyn_state.max_clock_voltage_on_dc.vddc;
 int32_t i;

 if (PP_CAP(PHM_PlatformCaps_UVDDPM) || uvd_table->count <= 0)
  smu_data->smc_state_table.UvdBootLevel = 0;
 else
  smu_data->smc_state_table.UvdBootLevel = uvd_table->count - 1;

 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, DPM_TABLE_475,
    UvdBootLevel, smu_data->smc_state_table.UvdBootLevel);

 data->dpm_level_enable_mask.uvd_dpm_enable_mask = 0;

 for (i = uvd_table->count - 1; i >= 0; i--) {
  if (uvd_table->entries[i].v <= max_vddc)
   data->dpm_level_enable_mask.uvd_dpm_enable_mask |= 1 << i;
  if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_UVDDPM))
   break;
 }
 smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_UVDDPM_SetEnabledMask,
    data->dpm_level_enable_mask.uvd_dpm_enable_mask,
    NULL);

 return 0;
}

static int ci_update_vce_smc_table(struct pp_hwmgr *hwmgr)
{
 struct amdgpu_device *adev = hwmgr->adev;
 struct smu7_hwmgr *data = hwmgr->backend;
 struct phm_vce_clock_voltage_dependency_table *vce_table =
   hwmgr->dyn_state.vce_clock_voltage_dependency_table;
 uint32_t profile_mode_mask = AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD |
     AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK |
     AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK |
     AMD_DPM_FORCED_LEVEL_PROFILE_PEAK;
 uint32_t max_vddc = adev->pm.ac_power ? hwmgr->dyn_state.max_clock_voltage_on_ac.vddc :
      hwmgr->dyn_state.max_clock_voltage_on_dc.vddc;
 int32_t i;

 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, DPM_TABLE_475,
    VceBootLevel, 0); /* temp hard code to level 0, vce can set min evclk*/

 data->dpm_level_enable_mask.vce_dpm_enable_mask = 0;

 for (i = vce_table->count - 1; i >= 0; i--) {
  if (vce_table->entries[i].v <= max_vddc)
   data->dpm_level_enable_mask.vce_dpm_enable_mask |= 1 << i;
  if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_VCEDPM))
   break;
 }
 smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_VCEDPM_SetEnabledMask,
    data->dpm_level_enable_mask.vce_dpm_enable_mask,
    NULL);

 return 0;
}

static int ci_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type)
{
 switch (type) {
 case SMU_UVD_TABLE:
  ci_update_uvd_smc_table(hwmgr);
  break;
 case SMU_VCE_TABLE:
  ci_update_vce_smc_table(hwmgr);
  break;
 default:
  break;
 }
 return 0;
}

static void ci_reset_smc(struct pp_hwmgr *hwmgr)
{
 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
      SMC_SYSCON_RESET_CNTL,
      rst_reg, 1);
}


static void ci_stop_smc_clock(struct pp_hwmgr *hwmgr)
{
 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
      SMC_SYSCON_CLOCK_CNTL_0,
      ck_disable, 1);
}

static int ci_stop_smc(struct pp_hwmgr *hwmgr)
{
 ci_reset_smc(hwmgr);
 ci_stop_smc_clock(hwmgr);

 return 0;
}

const struct pp_smumgr_func ci_smu_funcs = {
 .name = "ci_smu",
 .smu_init = ci_smu_init,
 .smu_fini = ci_smu_fini,
 .start_smu = ci_start_smu,
 .check_fw_load_finish = NULL,
 .request_smu_load_fw = NULL,
 .request_smu_load_specific_fw = NULL,
 .send_msg_to_smc = ci_send_msg_to_smc,
 .send_msg_to_smc_with_parameter = ci_send_msg_to_smc_with_parameter,
 .get_argument = smu7_get_argument,
 .download_pptable_settings = NULL,
 .upload_pptable_settings = NULL,
 .get_offsetof = ci_get_offsetof,
 .process_firmware_header = ci_process_firmware_header,
 .init_smc_table = ci_init_smc_table,
 .update_sclk_threshold = ci_update_sclk_threshold,
 .thermal_setup_fan_table = ci_thermal_setup_fan_table,
 .populate_all_graphic_levels = ci_populate_all_graphic_levels,
 .populate_all_memory_levels = ci_populate_all_memory_levels,
 .get_mac_definition = ci_get_mac_definition,
 .initialize_mc_reg_table = ci_initialize_mc_reg_table,
 .is_dpm_running = ci_is_dpm_running,
 .update_dpm_settings = ci_update_dpm_settings,
 .update_smc_table = ci_update_smc_table,
 .stop_smc = ci_stop_smc,
};