Quelle  dpu_plane.c   Sprache: C

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014-2018 The Linux Foundation. All rights reserved.
 * Copyright (C) 2013 Red Hat
 * Author: Rob Clark <robdclark@gmail.com>
 */

#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__

#include <linux/debugfs.h>
#include <linux/dma-buf.h>

#include <drm/drm_atomic.h>
#include <drm/drm_atomic_uapi.h>
#include <drm/drm_blend.h>
#include <drm/drm_damage_helper.h>
#include <drm/drm_framebuffer.h>
#include <drm/drm_gem_atomic_helper.h>

#include <linux/soc/qcom/ubwc.h>

#include "msm_drv.h"
#include "dpu_kms.h"
#include "dpu_hw_sspp.h"
#include "dpu_hw_util.h"
#include "dpu_trace.h"
#include "dpu_crtc.h"
#include "dpu_vbif.h"
#include "dpu_plane.h"

#define DPU_DEBUG_PLANE(pl, fmt, ...) DRM_DEBUG_ATOMIC("plane%d " fmt,\
  (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)

#define DPU_ERROR_PLANE(pl, fmt, ...) DPU_ERROR("plane%d " fmt,\
  (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)

#define DECIMATED_DIMENSION(dim, deci) (((dim) + ((1 << (deci)) - 1)) >> (deci))
#define PHASE_STEP_SHIFT 21
#define PHASE_STEP_UNIT_SCALE   ((int) (1 << PHASE_STEP_SHIFT))
#define PHASE_RESIDUAL  15

#define SHARP_STRENGTH_DEFAULT 32
#define SHARP_EDGE_THR_DEFAULT 112
#define SHARP_SMOOTH_THR_DEFAULT 8
#define SHARP_NOISE_THR_DEFAULT 2

#define DPU_PLANE_COLOR_FILL_FLAG BIT(31)
#define DPU_ZPOS_MAX 255

/*
 * Default Preload Values
 */
#define DPU_QSEED3_DEFAULT_PRELOAD_H 0x4
#define DPU_QSEED3_DEFAULT_PRELOAD_V 0x3
#define DPU_QSEED4_DEFAULT_PRELOAD_V 0x2
#define DPU_QSEED4_DEFAULT_PRELOAD_H 0x4

#define DEFAULT_REFRESH_RATE 60

static const uint32_t qcom_compressed_supported_formats[] = {
 DRM_FORMAT_ABGR8888,
 DRM_FORMAT_ARGB8888,
 DRM_FORMAT_XBGR8888,
 DRM_FORMAT_XRGB8888,
 DRM_FORMAT_ARGB2101010,
 DRM_FORMAT_XRGB2101010,
 DRM_FORMAT_BGR565,

 DRM_FORMAT_NV12,
 DRM_FORMAT_P010,
};

/*
 * struct dpu_plane - local dpu plane structure
 * @vm: address space pointer
 * @csc_ptr: Points to dpu_csc_cfg structure to use for current
 * @catalog: Points to dpu catalog structure
 * @revalidate: force revalidation of all the plane properties
 */
struct dpu_plane {
 struct drm_plane base;

 enum dpu_sspp pipe;

 uint32_t color_fill;
 bool is_error;
 bool is_rt_pipe;
 const struct dpu_mdss_cfg *catalog;
};

static const uint64_t supported_format_modifiers[] = {
 DRM_FORMAT_MOD_QCOM_COMPRESSED,
 DRM_FORMAT_MOD_LINEAR,
 DRM_FORMAT_MOD_INVALID
};

#define to_dpu_plane(x) container_of(x, struct dpu_plane, base)

static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane)
{
 struct msm_drm_private *priv = plane->dev->dev_private;

 return to_dpu_kms(priv->kms);
}

/**
 * _dpu_plane_calc_bw - calculate bandwidth required for a plane
 * @catalog: Points to dpu catalog structure
 * @fmt: Pointer to source buffer format
 * @mode: Pointer to drm display mode
 * @pipe_cfg: Pointer to pipe configuration
 * Result: Updates calculated bandwidth in the plane state.
 * BW Equation: src_w * src_h * bpp * fps * (v_total / v_dest)
 * Prefill BW Equation: line src bytes * line_time
 */
static u64 _dpu_plane_calc_bw(const struct dpu_mdss_cfg *catalog,
 const struct msm_format *fmt,
 const struct drm_display_mode *mode,
 struct dpu_sw_pipe_cfg *pipe_cfg)
{
 int src_width, src_height, dst_height, fps;
 u64 plane_pixel_rate, plane_bit_rate;
 u64 plane_prefill_bw;
 u64 plane_bw;
 u32 hw_latency_lines;
 u64 scale_factor;
 int vbp, vpw, vfp;

 src_width = drm_rect_width(&pipe_cfg->src_rect);
 src_height = drm_rect_height(&pipe_cfg->src_rect);
 dst_height = drm_rect_height(&pipe_cfg->dst_rect);
 fps = drm_mode_vrefresh(mode);
 vbp = mode->vtotal - mode->vsync_end;
 vpw = mode->vsync_end - mode->vsync_start;
 vfp = mode->vsync_start - mode->vdisplay;
 hw_latency_lines =  catalog->perf->min_prefill_lines;
 scale_factor = src_height > dst_height ?
  mult_frac(src_height, 1, dst_height) : 1;

 plane_pixel_rate = src_width * mode->vtotal * fps;
 plane_bit_rate = plane_pixel_rate * fmt->bpp;

 plane_bw = plane_bit_rate * scale_factor;

 plane_prefill_bw = plane_bw * hw_latency_lines;

 if ((vbp+vpw) > hw_latency_lines)
  do_div(plane_prefill_bw, (vbp+vpw));
 else if ((vbp+vpw+vfp) < hw_latency_lines)
  do_div(plane_prefill_bw, (vbp+vpw+vfp));
 else
  do_div(plane_prefill_bw, hw_latency_lines);


 return max(plane_bw, plane_prefill_bw);
}

/**
 * _dpu_plane_calc_clk - calculate clock required for a plane
 * @mode: Pointer to drm display mode
 * @pipe_cfg: Pointer to pipe configuration
 * Result: Updates calculated clock in the plane state.
 * Clock equation: dst_w * v_total * fps * (src_h / dst_h)
 */
static u64 _dpu_plane_calc_clk(const struct drm_display_mode *mode,
  struct dpu_sw_pipe_cfg *pipe_cfg)
{
 int dst_width, src_height, dst_height, fps;
 u64 plane_clk;

 src_height = drm_rect_height(&pipe_cfg->src_rect);
 dst_width = drm_rect_width(&pipe_cfg->dst_rect);
 dst_height = drm_rect_height(&pipe_cfg->dst_rect);
 fps = drm_mode_vrefresh(mode);

 plane_clk =
  dst_width * mode->vtotal * fps;

 if (src_height > dst_height) {
  plane_clk *= src_height;
  do_div(plane_clk, dst_height);
 }

 return plane_clk;
}

/**
 * _dpu_plane_calc_fill_level - calculate fill level of the given source format
 * @plane:  Pointer to drm plane
 * @pipe:  Pointer to software pipe
 * @lut_usage:  LUT usecase
 * @fmt:  Pointer to source buffer format
 * @src_width:  width of source buffer
 * Return: fill level corresponding to the source buffer/format or 0 if error
 */
static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
  struct dpu_sw_pipe *pipe,
  enum dpu_qos_lut_usage lut_usage,
  const struct msm_format *fmt, u32 src_width)
{
 struct dpu_plane *pdpu;
 u32 fixed_buff_size;
 u32 total_fl;

 if (!fmt || !pipe || !src_width || !fmt->bpp) {
  DPU_ERROR("invalid arguments\n");
  return 0;
 }

 if (lut_usage == DPU_QOS_LUT_USAGE_NRT)
  return 0;

 pdpu = to_dpu_plane(plane);
 fixed_buff_size = pdpu->catalog->caps->pixel_ram_size;

 /* FIXME: in multirect case account for the src_width of all the planes */

 if (fmt->fetch_type == MDP_PLANE_PSEUDO_PLANAR) {
  if (fmt->chroma_sample == CHROMA_420) {
   /* NV12 */
   total_fl = (fixed_buff_size / 2) /
    ((src_width + 32) * fmt->bpp);
  } else {
   /* non NV12 */
   total_fl = (fixed_buff_size / 2) * 2 /
    ((src_width + 32) * fmt->bpp);
  }
 } else {
  if (pipe->multirect_mode == DPU_SSPP_MULTIRECT_PARALLEL) {
   total_fl = (fixed_buff_size / 2) * 2 /
    ((src_width + 32) * fmt->bpp);
  } else {
   total_fl = (fixed_buff_size) * 2 /
    ((src_width + 32) * fmt->bpp);
  }
 }

 DPU_DEBUG_PLANE(pdpu, "pnum:%d fmt: %p4cc w:%u fl:%u\n",
   pipe->sspp->idx - SSPP_VIG0,
   &fmt->pixel_format,
   src_width, total_fl);

 return total_fl;
}

/**
 * _dpu_plane_set_qos_lut - set QoS LUT of the given plane
 * @plane:  Pointer to drm plane
 * @pipe:  Pointer to software pipe
 * @fmt:  Pointer to source buffer format
 * @pipe_cfg:  Pointer to pipe configuration
 */
static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
  struct dpu_sw_pipe *pipe,
  const struct msm_format *fmt, struct dpu_sw_pipe_cfg *pipe_cfg)
{
 struct dpu_plane *pdpu = to_dpu_plane(plane);
 struct dpu_hw_qos_cfg cfg;
 u32 total_fl, lut_usage;

 if (!pdpu->is_rt_pipe) {
  lut_usage = DPU_QOS_LUT_USAGE_NRT;
 } else {
  if (fmt && MSM_FORMAT_IS_LINEAR(fmt))
   lut_usage = DPU_QOS_LUT_USAGE_LINEAR;
  else
   lut_usage = DPU_QOS_LUT_USAGE_MACROTILE;
 }

 total_fl = _dpu_plane_calc_fill_level(plane, pipe, lut_usage, fmt,
    drm_rect_width(&pipe_cfg->src_rect));

 cfg.creq_lut = _dpu_hw_get_qos_lut(&pdpu->catalog->perf->qos_lut_tbl[lut_usage], total_fl);
 cfg.danger_lut = pdpu->catalog->perf->danger_lut_tbl[lut_usage];
 cfg.safe_lut = pdpu->catalog->perf->safe_lut_tbl[lut_usage];

 if (pipe->sspp->idx != SSPP_CURSOR0 &&
     pipe->sspp->idx != SSPP_CURSOR1 &&
     pdpu->is_rt_pipe)
  cfg.danger_safe_en = true;

 DPU_DEBUG_PLANE(pdpu, "pnum:%d ds:%d is_rt:%d\n",
  pdpu->pipe - SSPP_VIG0,
  cfg.danger_safe_en,
  pdpu->is_rt_pipe);

 trace_dpu_perf_set_qos_luts(pipe->sspp->idx - SSPP_VIG0,
   (fmt) ? fmt->pixel_format : 0,
   pdpu->is_rt_pipe, total_fl, cfg.creq_lut, lut_usage);

 DPU_DEBUG_PLANE(pdpu, "pnum:%d fmt: %p4cc rt:%d fl:%u lut:0x%llx\n",
   pdpu->pipe - SSPP_VIG0,
   fmt ? &fmt->pixel_format : NULL,
   pdpu->is_rt_pipe, total_fl, cfg.creq_lut);

 trace_dpu_perf_set_danger_luts(pdpu->pipe - SSPP_VIG0,
   (fmt) ? fmt->pixel_format : 0,
   (fmt) ? fmt->fetch_mode : 0,
   cfg.danger_lut,
   cfg.safe_lut);

 DPU_DEBUG_PLANE(pdpu, "pnum:%d fmt: %p4cc mode:%d luts[0x%x, 0x%x]\n",
   pdpu->pipe - SSPP_VIG0,
   fmt ? &fmt->pixel_format : NULL,
   fmt ? fmt->fetch_mode : -1,
   cfg.danger_lut,
   cfg.safe_lut);

 pipe->sspp->ops.setup_qos_lut(pipe->sspp, &cfg);
}

/**
 * _dpu_plane_set_qos_ctrl - set QoS control of the given plane
 * @plane:  Pointer to drm plane
 * @pipe:  Pointer to software pipe
 * @enable:  true to enable QoS control
 */
static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
 struct dpu_sw_pipe *pipe,
 bool enable)
{
 struct dpu_plane *pdpu = to_dpu_plane(plane);

 if (!pdpu->is_rt_pipe)
  enable = false;

 DPU_DEBUG_PLANE(pdpu, "pnum:%d ds:%d is_rt:%d\n",
  pdpu->pipe - SSPP_VIG0,
  enable,
  pdpu->is_rt_pipe);

 pipe->sspp->ops.setup_qos_ctrl(pipe->sspp,
           enable);
}

static bool _dpu_plane_sspp_clk_force_ctrl(struct dpu_hw_sspp *sspp,
        struct dpu_hw_mdp *mdp,
        bool enable, bool *forced_on)
{
 if (sspp->ops.setup_clk_force_ctrl) {
  *forced_on = sspp->ops.setup_clk_force_ctrl(sspp, enable);
  return true;
 }

 if (mdp->ops.setup_clk_force_ctrl) {
  *forced_on = mdp->ops.setup_clk_force_ctrl(mdp, sspp->cap->clk_ctrl, enable);
  return true;
 }

 return false;
}

/**
 * _dpu_plane_set_ot_limit - set OT limit for the given plane
 * @plane:  Pointer to drm plane
 * @pipe:  Pointer to software pipe
 * @pipe_cfg:  Pointer to pipe configuration
 * @frame_rate:  CRTC's frame rate
 */
static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
  struct dpu_sw_pipe *pipe,
  struct dpu_sw_pipe_cfg *pipe_cfg,
  int frame_rate)
{
 struct dpu_plane *pdpu = to_dpu_plane(plane);
 struct dpu_vbif_set_ot_params ot_params;
 struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
 bool forced_on = false;

 memset(&ot_params, 0, sizeof(ot_params));
 ot_params.xin_id = pipe->sspp->cap->xin_id;
 ot_params.num = pipe->sspp->idx - SSPP_NONE;
 ot_params.width = drm_rect_width(&pipe_cfg->src_rect);
 ot_params.height = drm_rect_height(&pipe_cfg->src_rect);
 ot_params.is_wfd = !pdpu->is_rt_pipe;
 ot_params.frame_rate = frame_rate;
 ot_params.vbif_idx = VBIF_RT;
 ot_params.rd = true;

 if (!_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,
         true, &forced_on))
  return;

 dpu_vbif_set_ot_limit(dpu_kms, &ot_params);

 if (forced_on)
  _dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,
            false, &forced_on);
}

/**
 * _dpu_plane_set_qos_remap - set vbif QoS for the given plane
 * @plane:  Pointer to drm plane
 * @pipe:  Pointer to software pipe
 */
static void _dpu_plane_set_qos_remap(struct drm_plane *plane,
  struct dpu_sw_pipe *pipe)
{
 struct dpu_plane *pdpu = to_dpu_plane(plane);
 struct dpu_vbif_set_qos_params qos_params;
 struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
 bool forced_on = false;

 memset(&qos_params, 0, sizeof(qos_params));
 qos_params.vbif_idx = VBIF_RT;
 qos_params.xin_id = pipe->sspp->cap->xin_id;
 qos_params.num = pipe->sspp->idx - SSPP_VIG0;
 qos_params.is_rt = pdpu->is_rt_pipe;

 DPU_DEBUG_PLANE(pdpu, "pipe:%d vbif:%d xin:%d rt:%d\n",
   qos_params.num,
   qos_params.vbif_idx,
   qos_params.xin_id, qos_params.is_rt);

 if (!_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,
         true, &forced_on))
  return;

 dpu_vbif_set_qos_remap(dpu_kms, &qos_params);

 if (forced_on)
  _dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,
            false, &forced_on);
}

static void _dpu_plane_setup_scaler3(struct dpu_hw_sspp *pipe_hw,
  uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h,
  struct dpu_hw_scaler3_cfg *scale_cfg,
  const struct msm_format *fmt,
  uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v,
  unsigned int rotation)
{
 uint32_t i;
 bool inline_rotation = rotation & DRM_MODE_ROTATE_90;

 /*
  * For inline rotation cases, scaler config is post-rotation,
  * so swap the dimensions here. However, pixel extension will
  * need pre-rotation settings.
 */
 if (inline_rotation)
  swap(src_w, src_h);

 scale_cfg->phase_step_x[DPU_SSPP_COMP_0] =
  mult_frac((1 << PHASE_STEP_SHIFT), src_w, dst_w);
 scale_cfg->phase_step_y[DPU_SSPP_COMP_0] =
  mult_frac((1 << PHASE_STEP_SHIFT), src_h, dst_h);


 scale_cfg->phase_step_y[DPU_SSPP_COMP_1_2] =
  scale_cfg->phase_step_y[DPU_SSPP_COMP_0] / chroma_subsmpl_v;
 scale_cfg->phase_step_x[DPU_SSPP_COMP_1_2] =
  scale_cfg->phase_step_x[DPU_SSPP_COMP_0] / chroma_subsmpl_h;

 scale_cfg->phase_step_x[DPU_SSPP_COMP_2] =
  scale_cfg->phase_step_x[DPU_SSPP_COMP_1_2];
 scale_cfg->phase_step_y[DPU_SSPP_COMP_2] =
  scale_cfg->phase_step_y[DPU_SSPP_COMP_1_2];

 scale_cfg->phase_step_x[DPU_SSPP_COMP_3] =
  scale_cfg->phase_step_x[DPU_SSPP_COMP_0];
 scale_cfg->phase_step_y[DPU_SSPP_COMP_3] =
  scale_cfg->phase_step_y[DPU_SSPP_COMP_0];

 for (i = 0; i < DPU_MAX_PLANES; i++) {
  scale_cfg->src_width[i] = src_w;
  scale_cfg->src_height[i] = src_h;
  if (i == DPU_SSPP_COMP_1_2 || i == DPU_SSPP_COMP_2) {
   scale_cfg->src_width[i] /= chroma_subsmpl_h;
   scale_cfg->src_height[i] /= chroma_subsmpl_v;
  }

  if (pipe_hw->cap->sblk->scaler_blk.version >= 0x3000) {
   scale_cfg->preload_x[i] = DPU_QSEED4_DEFAULT_PRELOAD_H;
   scale_cfg->preload_y[i] = DPU_QSEED4_DEFAULT_PRELOAD_V;
  } else {
   scale_cfg->preload_x[i] = DPU_QSEED3_DEFAULT_PRELOAD_H;
   scale_cfg->preload_y[i] = DPU_QSEED3_DEFAULT_PRELOAD_V;
  }
 }
 if (!(MSM_FORMAT_IS_YUV(fmt)) && (src_h == dst_h)
  && (src_w == dst_w))
  return;

 scale_cfg->dst_width = dst_w;
 scale_cfg->dst_height = dst_h;
 scale_cfg->y_rgb_filter_cfg = DPU_SCALE_BIL;
 scale_cfg->uv_filter_cfg = DPU_SCALE_BIL;
 scale_cfg->alpha_filter_cfg = DPU_SCALE_ALPHA_BIL;
 scale_cfg->lut_flag = 0;
 scale_cfg->blend_cfg = 1;
 scale_cfg->enable = 1;
}

static void _dpu_plane_setup_pixel_ext(struct dpu_hw_scaler3_cfg *scale_cfg,
    struct dpu_hw_pixel_ext *pixel_ext,
    uint32_t src_w, uint32_t src_h,
    uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v)
{
 int i;

 for (i = 0; i < DPU_MAX_PLANES; i++) {
  if (i == DPU_SSPP_COMP_1_2 || i == DPU_SSPP_COMP_2) {
   src_w /= chroma_subsmpl_h;
   src_h /= chroma_subsmpl_v;
  }

  pixel_ext->num_ext_pxls_top[i] = src_h;
  pixel_ext->num_ext_pxls_left[i] = src_w;
 }
}

static const struct dpu_csc_cfg *_dpu_plane_get_csc(struct dpu_sw_pipe *pipe,
          const struct msm_format *fmt)
{
 const struct dpu_csc_cfg *csc_ptr;

 if (!MSM_FORMAT_IS_YUV(fmt))
  return NULL;

 if (BIT(DPU_SSPP_CSC_10BIT) & pipe->sspp->cap->features)
  csc_ptr = &dpu_csc10_YUV2RGB_601L;
 else
  csc_ptr = &dpu_csc_YUV2RGB_601L;

 return csc_ptr;
}

static void _dpu_plane_setup_scaler(struct dpu_sw_pipe *pipe,
  const struct msm_format *fmt, bool color_fill,
  struct dpu_sw_pipe_cfg *pipe_cfg)
{
 struct dpu_hw_sspp *pipe_hw = pipe->sspp;
 const struct drm_format_info *info = drm_format_info(fmt->pixel_format);
 struct dpu_hw_scaler3_cfg scaler3_cfg;
 struct dpu_hw_pixel_ext pixel_ext;
 u32 src_width = drm_rect_width(&pipe_cfg->src_rect);
 u32 src_height = drm_rect_height(&pipe_cfg->src_rect);
 u32 dst_width = drm_rect_width(&pipe_cfg->dst_rect);
 u32 dst_height = drm_rect_height(&pipe_cfg->dst_rect);

 memset(&scaler3_cfg, 0, sizeof(scaler3_cfg));
 memset(&pixel_ext, 0, sizeof(pixel_ext));

 /* don't chroma subsample if decimating */
 /* update scaler. calculate default config for QSEED3 */
 _dpu_plane_setup_scaler3(pipe_hw,
   src_width,
   src_height,
   dst_width,
   dst_height,
   &scaler3_cfg, fmt,
   info->hsub, info->vsub,
   pipe_cfg->rotation);

 /* configure pixel extension based on scalar config */
 _dpu_plane_setup_pixel_ext(&scaler3_cfg, &pixel_ext,
   src_width, src_height, info->hsub, info->vsub);

 if (pipe_hw->ops.setup_pe)
  pipe_hw->ops.setup_pe(pipe_hw,
    &pixel_ext);

 /**
  * when programmed in multirect mode, scalar block will be
  * bypassed. Still we need to update alpha and bitwidth
  * ONLY for RECT0
 */
 if (pipe_hw->ops.setup_scaler &&
   pipe->multirect_index != DPU_SSPP_RECT_1)
  pipe_hw->ops.setup_scaler(pipe_hw,
    &scaler3_cfg,
    fmt);
}

static void _dpu_plane_color_fill_pipe(struct dpu_plane_state *pstate,
           struct dpu_sw_pipe *pipe,
           struct drm_rect *dst_rect,
           u32 fill_color,
           const struct msm_format *fmt)
{
 struct dpu_sw_pipe_cfg pipe_cfg;

 /* update sspp */
 if (!pipe->sspp->ops.setup_solidfill)
  return;

 pipe->sspp->ops.setup_solidfill(pipe, fill_color);

 /* override scaler/decimation if solid fill */
 pipe_cfg.dst_rect = *dst_rect;

 pipe_cfg.src_rect.x1 = 0;
 pipe_cfg.src_rect.y1 = 0;
 pipe_cfg.src_rect.x2 =
  drm_rect_width(&pipe_cfg.dst_rect);
 pipe_cfg.src_rect.y2 =
  drm_rect_height(&pipe_cfg.dst_rect);

 if (pipe->sspp->ops.setup_format)
  pipe->sspp->ops.setup_format(pipe, fmt, DPU_SSPP_SOLID_FILL);

 if (pipe->sspp->ops.setup_rects)
  pipe->sspp->ops.setup_rects(pipe, &pipe_cfg);

 _dpu_plane_setup_scaler(pipe, fmt, true, &pipe_cfg);
}

/**
 * _dpu_plane_color_fill - enables color fill on plane
 * @pdpu:   Pointer to DPU plane object
 * @color:  RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
 * @alpha:  8-bit fill alpha value, 255 selects 100% alpha
 */
static void _dpu_plane_color_fill(struct dpu_plane *pdpu,
  uint32_t color, uint32_t alpha)
{
 const struct msm_format *fmt;
 const struct drm_plane *plane = &pdpu->base;
 struct msm_drm_private *priv = plane->dev->dev_private;
 struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
 u32 fill_color = (color & 0xFFFFFF) | ((alpha & 0xFF) << 24);

 DPU_DEBUG_PLANE(pdpu, "\n");

 /*
  * select fill format to match user property expectation,
  * h/w only supports RGB variants
 */
 fmt = mdp_get_format(priv->kms, DRM_FORMAT_ABGR8888, 0);
 /* should not happen ever */
 if (!fmt)
  return;

 /* update sspp */
 _dpu_plane_color_fill_pipe(pstate, &pstate->pipe, &pstate->pipe_cfg.dst_rect,
       fill_color, fmt);

 if (pstate->r_pipe.sspp)
  _dpu_plane_color_fill_pipe(pstate, &pstate->r_pipe, &pstate->r_pipe_cfg.dst_rect,
        fill_color, fmt);
}

static int dpu_plane_prepare_fb(struct drm_plane *plane,
  struct drm_plane_state *new_state)
{
 struct drm_framebuffer *fb = new_state->fb;
 struct dpu_plane *pdpu = to_dpu_plane(plane);
 struct dpu_plane_state *pstate = to_dpu_plane_state(new_state);
 int ret;

 if (!new_state->fb)
  return 0;

 DPU_DEBUG_PLANE(pdpu, "FB[%u]\n", fb->base.id);

 /*
  * TODO: Need to sort out the msm_framebuffer_prepare() call below so
  *       we can use msm_atomic_prepare_fb() instead of doing the
  *       implicit fence and fb prepare by hand here.
 */
 drm_gem_plane_helper_prepare_fb(plane, new_state);

 ret = msm_framebuffer_prepare(new_state->fb, pstate->needs_dirtyfb);
 if (ret) {
  DPU_ERROR("failed to prepare framebuffer\n");
  return ret;
 }

 return 0;
}

static void dpu_plane_cleanup_fb(struct drm_plane *plane,
  struct drm_plane_state *old_state)
{
 struct dpu_plane *pdpu = to_dpu_plane(plane);
 struct dpu_plane_state *old_pstate;

 if (!old_state || !old_state->fb)
  return;

 old_pstate = to_dpu_plane_state(old_state);

 DPU_DEBUG_PLANE(pdpu, "FB[%u]\n", old_state->fb->base.id);

 msm_framebuffer_cleanup(old_state->fb, old_pstate->needs_dirtyfb);
}

static int dpu_plane_check_inline_rotation(struct dpu_plane *pdpu,
        struct dpu_sw_pipe *pipe,
        struct drm_rect src,
        const struct msm_format *fmt)
{
 const struct dpu_sspp_sub_blks *sblk = pipe->sspp->cap->sblk;
 size_t num_formats;
 const u32 *supported_formats;

 if (!test_bit(DPU_SSPP_INLINE_ROTATION, &pipe->sspp->cap->features))
  return -EINVAL;

 if (!sblk->rotation_cfg) {
  DPU_ERROR("invalid rotation cfg\n");
  return -EINVAL;
 }

 if (drm_rect_width(&src) > sblk->rotation_cfg->rot_maxheight) {
  DPU_DEBUG_PLANE(pdpu, "invalid height for inline rot:%d max:%d\n",
    src.y2, sblk->rotation_cfg->rot_maxheight);
  return -EINVAL;
 }

 supported_formats = sblk->rotation_cfg->rot_format_list;
 num_formats = sblk->rotation_cfg->rot_num_formats;

 if (!MSM_FORMAT_IS_UBWC(fmt) ||
  !dpu_find_format(fmt->pixel_format, supported_formats, num_formats))
  return -EINVAL;

 return 0;
}

static int dpu_plane_atomic_check_pipe(struct dpu_plane *pdpu,
  struct dpu_sw_pipe *pipe,
  struct dpu_sw_pipe_cfg *pipe_cfg,
  const struct drm_display_mode *mode,
  struct drm_plane_state *new_plane_state)
{
 uint32_t min_src_size;
 struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
 int ret;
 const struct msm_format *fmt;
 uint32_t supported_rotations;
 const struct dpu_sspp_cfg *pipe_hw_caps;
 const struct dpu_sspp_sub_blks *sblk;

 pipe_hw_caps = pipe->sspp->cap;
 sblk = pipe->sspp->cap->sblk;

 /*
  * We already have verified scaling against platform limitations.
  * Now check if the SSPP supports scaling at all.
 */
 if (!sblk->scaler_blk.len &&
     ((drm_rect_width(&new_plane_state->src) >> 16 !=
       drm_rect_width(&new_plane_state->dst)) ||
      (drm_rect_height(&new_plane_state->src) >> 16 !=
       drm_rect_height(&new_plane_state->dst))))
  return -ERANGE;

 fmt = msm_framebuffer_format(new_plane_state->fb);

 supported_rotations = DRM_MODE_REFLECT_MASK | DRM_MODE_ROTATE_0;

 if (pipe_hw_caps->features & BIT(DPU_SSPP_INLINE_ROTATION))
  supported_rotations |= DRM_MODE_ROTATE_90;

 pipe_cfg->rotation = drm_rotation_simplify(new_plane_state->rotation,
         supported_rotations);

 min_src_size = MSM_FORMAT_IS_YUV(fmt) ? 2 : 1;

 if (MSM_FORMAT_IS_YUV(fmt) &&
     !pipe->sspp->cap->sblk->csc_blk.len) {
  DPU_DEBUG_PLANE(pdpu,
    "plane doesn't have csc for yuv\n");
  return -EINVAL;
 }

 /* check src bounds */
 if (drm_rect_width(&pipe_cfg->src_rect) < min_src_size ||
     drm_rect_height(&pipe_cfg->src_rect) < min_src_size) {
  DPU_DEBUG_PLANE(pdpu, "invalid source " DRM_RECT_FMT "\n",
    DRM_RECT_ARG(&pipe_cfg->src_rect));
  return -E2BIG;
 }

 /* valid yuv image */
 if (MSM_FORMAT_IS_YUV(fmt) &&
     (pipe_cfg->src_rect.x1 & 0x1 ||
      pipe_cfg->src_rect.y1 & 0x1 ||
      drm_rect_width(&pipe_cfg->src_rect) & 0x1 ||
      drm_rect_height(&pipe_cfg->src_rect) & 0x1)) {
  DPU_DEBUG_PLANE(pdpu, "invalid yuv source " DRM_RECT_FMT "\n",
    DRM_RECT_ARG(&pipe_cfg->src_rect));
  return -EINVAL;
 }

 /* min dst support */
 if (drm_rect_width(&pipe_cfg->dst_rect) < 0x1 ||
     drm_rect_height(&pipe_cfg->dst_rect) < 0x1) {
  DPU_DEBUG_PLANE(pdpu, "invalid dest rect " DRM_RECT_FMT "\n",
    DRM_RECT_ARG(&pipe_cfg->dst_rect));
  return -EINVAL;
 }

 if (pipe_cfg->rotation & DRM_MODE_ROTATE_90) {
  ret = dpu_plane_check_inline_rotation(pdpu, pipe, pipe_cfg->src_rect, fmt);
  if (ret)
   return ret;
 }

 /* max clk check */
 if (_dpu_plane_calc_clk(mode, pipe_cfg) > kms->perf.max_core_clk_rate) {
  DPU_DEBUG_PLANE(pdpu, "plane exceeds max mdp core clk limits\n");
  return -E2BIG;
 }

 return 0;
}

#define MAX_UPSCALE_RATIO 20
#define MAX_DOWNSCALE_RATIO 4

static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
      struct drm_plane_state *new_plane_state,
      const struct drm_crtc_state *crtc_state)
{
 int i, ret = 0, min_scale, max_scale;
 struct dpu_plane *pdpu = to_dpu_plane(plane);
 struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
 u64 max_mdp_clk_rate = kms->perf.max_core_clk_rate;
 struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
 struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg;
 struct dpu_sw_pipe_cfg *r_pipe_cfg = &pstate->r_pipe_cfg;
 struct drm_rect fb_rect = { 0 };
 uint32_t max_linewidth;

 min_scale = FRAC_16_16(1, MAX_UPSCALE_RATIO);
 max_scale = MAX_DOWNSCALE_RATIO << 16;

 ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
        min_scale,
        max_scale,
        true, true);
 if (ret) {
  DPU_DEBUG_PLANE(pdpu, "Check plane state failed (%d)\n", ret);
  return ret;
 }
 if (!new_plane_state->visible)
  return 0;

 pstate->stage = DPU_STAGE_0 + pstate->base.normalized_zpos;
 if (pstate->stage >= pdpu->catalog->caps->max_mixer_blendstages) {
  DPU_ERROR("> %d plane stages assigned\n",
     pdpu->catalog->caps->max_mixer_blendstages - DPU_STAGE_0);
  return -EINVAL;
 }

 /* state->src is 16.16, src_rect is not */
 drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src);

 pipe_cfg->dst_rect = new_plane_state->dst;

 fb_rect.x2 = new_plane_state->fb->width;
 fb_rect.y2 = new_plane_state->fb->height;

 /* Ensure fb size is supported */
 if (drm_rect_width(&fb_rect) > DPU_MAX_IMG_WIDTH ||
     drm_rect_height(&fb_rect) > DPU_MAX_IMG_HEIGHT) {
  DPU_DEBUG_PLANE(pdpu, "invalid framebuffer " DRM_RECT_FMT "\n",
    DRM_RECT_ARG(&fb_rect));
  return -E2BIG;
 }

 ret = dpu_format_populate_plane_sizes(new_plane_state->fb, &pstate->layout);
 if (ret) {
  DPU_ERROR_PLANE(pdpu, "failed to get format plane sizes, %d\n", ret);
  return ret;
 }

 for (i = 0; i < pstate->layout.num_planes; i++)
  if (pstate->layout.plane_pitch[i] > DPU_SSPP_MAX_PITCH_SIZE)
   return -E2BIG;

 max_linewidth = pdpu->catalog->caps->max_linewidth;

 drm_rect_rotate(&pipe_cfg->src_rect,
   new_plane_state->fb->width, new_plane_state->fb->height,
   new_plane_state->rotation);

 if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) ||
      _dpu_plane_calc_clk(&crtc_state->adjusted_mode, pipe_cfg) > max_mdp_clk_rate) {
  if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) {
   DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n",
     DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth);
   return -E2BIG;
  }

  *r_pipe_cfg = *pipe_cfg;
  pipe_cfg->src_rect.x2 = (pipe_cfg->src_rect.x1 + pipe_cfg->src_rect.x2) >> 1;
  pipe_cfg->dst_rect.x2 = (pipe_cfg->dst_rect.x1 + pipe_cfg->dst_rect.x2) >> 1;
  r_pipe_cfg->src_rect.x1 = pipe_cfg->src_rect.x2;
  r_pipe_cfg->dst_rect.x1 = pipe_cfg->dst_rect.x2;
 } else {
  memset(r_pipe_cfg, 0, sizeof(*r_pipe_cfg));
 }

 drm_rect_rotate_inv(&pipe_cfg->src_rect,
       new_plane_state->fb->width, new_plane_state->fb->height,
       new_plane_state->rotation);
 if (drm_rect_width(&r_pipe_cfg->src_rect) != 0)
  drm_rect_rotate_inv(&r_pipe_cfg->src_rect,
        new_plane_state->fb->width, new_plane_state->fb->height,
        new_plane_state->rotation);

 pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);

 return 0;
}

static int dpu_plane_is_multirect_capable(struct dpu_hw_sspp *sspp,
       struct dpu_sw_pipe_cfg *pipe_cfg,
       const struct msm_format *fmt)
{
 if (drm_rect_width(&pipe_cfg->src_rect) != drm_rect_width(&pipe_cfg->dst_rect) ||
    drm_rect_height&ipe_cfg>! &ipe_cfg-)
  return false;

 if (pipe_cfg->rotation & DRM_MODE_ROTATE_90)
  return false;

 if (MSM_FORMAT_IS_YUV(fmt))
  return false;

 if (!sspp)
  return true;

if!java.lang.StringIndexOutOfBoundsException: Range [15, 14) out of bounds for length 62
 
  return false;

 return true;
}

_pipe_cfg *,
 msm_formatfmtjava.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
    uint32_t max_linewidth)
{
) &&
     drm_rect_width#define SHARP_SMOOTH_THR_DEFAULT8
  return falsedefine255

 return true;
}

static int dpu_plane_is_multirect_parallel_capable(struct dpu_hw_sspp *sspp,
          *pipe_cfg,
         const struct  DRM_FORMAT_ABGR8888,
          DRM_FORMAT_XRGB8888,
{
 returndpu_plane_is_multirect_capable(sspp, pipe_cfg, fmt) &&
  *struct dpu_plane -localdpu structure
}


static int dpu_plane_atomic_check_sspp(struct drm_plane *plane,
           struct drm_atomic_state *state,
           const struct drm_crtc_state *crtc_state)
{
 struct drm_plane_state *new_plane_state =
  drm_atomic_get_new_plane_state(state, plane);
 struct dpu_plane *pdpu = to_dpu_plane(plane);
 struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
 struct dpu_sw_pipe *pipe = &pstate->pipe;
 structjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 struct * pstate>pipe_cfg
  =pstate>r_pipe_cfg;
int =0java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13

ret=dpu_plane_atomic_check_pipe(pdpu,pipe, pipe_cfg,
       &crtc_state->adjusted_mode,
       new_plane_state
 if ( *d   bandwidthrequiredfora
  return ret;

 if (drm_rect_width(&r_pipe_cfg->src_rect) != 0) {
  ret = dpu_plane_atomic_check_pipe(pdpu, r_pipe, r_pipe_cfg,
        &crtc_state->adjusted_mode,
        new_plane_state);
  if (ret)
   return ret;
 }

 return 0;
}

static BW:src_w * src_h * bpp*fps * (_otal /v_dest)
          struct dpu_sw_pipe *r_pipe, struct dpu_sw_pipe_cfg *r_pipe_cfg,
          struct dpu_hw_sspp *sspp, const struct msm_format *fmt,
          uint32_t max_linewidth)
{
 r_pipe->sspp = NULL;

 pipe->const struct msm_format *fmt,
pipe> =DPU_SSPP_MULTIRECT_NONE

 r_pipeu64,plane_bit_rate
ipe> = DPU_SSPP_MULTIRECT_NONE;

if &_java.lang.StringIndexOutOfBoundsException: Range [32, 31) out of bounds for length 50
 _capable(-sspp,pipe_cfg, fmt, max_linewidth) ||
dpu_plane_is_multirect_parallel_capablepipe>,r_pipe_cfg,fmt max_linewidth)java.lang.StringIndexOutOfBoundsException: Index 91 out of bounds for length 91
  returnfalsejava.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16

  r_pipe->sspp = pipe->sspp;

  pipe-if (vbp+)>hw_latency_lines
 -multirect_mode=DPU_SSPP_MULTIRECT_PARALLEL

  r_pipe->
  java.lang.StringIndexOutOfBoundsException: Range [0, 8) out of bounds for length 0
 }

 return true;
}

static int dpu_plane_try_multirect_shared(struct dpu_plane_state *pstate,
       struct dpu_plane_state *prev_adjacent_pstate,
       const struct msm_format *fmt,
       uint32_t max_linewidth)
{
 struct dpu_sw_pipe *pipe = &pstate->pipe;
 struct dpu_sw_pipe *r_pipe = &pstate->r_pipe;
 struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg;
 static u64 _pu_plane_calc_clk(const struct drm_display_mode*,
 struct dpu_sw_pipe_cfg *prev_pipe_cfg = &prev_adjacent_pstate->pipe_cfg;
   *rev_fmt=msm_framebuffer_format(->asefb;
 u16=(java.lang.StringIndexOutOfBoundsException: Range [49, 39) out of bounds for length 51

 if  return ;
      *_dpu_plane_calc_fill_level - calculate fill level of source 
  return false;

 /* Do not validate SSPP of current plane when it is not ready */
 if (!dpu_plane_is_multirect_capable(pipe->sspp, pipe_cfg, fmt) ||
     !dpu_plane_is_multirect_capable(prev_pipe->sspp, prev_pipe_cfg, prev_fmt))
  return false;

 ()
  max_tile_height = max(java.lang.StringIndexOutOfBoundsException: Range [38, 31) out of bounds for length 38

 if (MSM_FORMAT_IS_UBWC(prev_fmt))
  max_tile_height = max(max_tile_height, prev_fmt->tile_height);

 r_pipe->multirect_index = DPU_SSPP_RECT_SOLO;
 r_pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;

 r_pipe->sspp = NULL;

 (java.lang.StringIndexOutOfBoundsException: Range [35, 34) out of bounds for length 67
 {
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
      prev_pipe_cfg->dst_rect.x1 >= pipe_cfg->dst_rect.x2)) {
  pipe->sspp = prev_pipe->sspp;

  pipe->multirect_index = DPU_SSPP_RECT_1;
  pipe->multirect_mode = DPU_SSPP_MULTIRECT_PARALLEL;

  prev_pipe->multirect_index =
  prev_pipe->multirect_mode = java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 11

  return true;
 }

 . =java.lang.StringIndexOutOfBoundsException: Range [44, 43) out of bounds for length 81
     prev_pipe_cfg-  (+32  ->;
  pipe->sspp = prev_pipe->sspp;

   total_fl=fixed_buff_size 2   /
  pipe->multirect_mode =DPU_SSPP_MULTIRECT_TIME_MX;

  prev_pipe-  }else
  prev_pipe->ultirect_mode = DPU_SSPP_MULTIRECT_TIME_MX;

  return true;
 }(, p:d fmt %4cc% %n,

 return src_width total_fl)
}

static intdpu_plane_atomic_check(truct drm_plane *plane,
      struct drm_atomic_state *state)
{
 struct drm_plane_state *new_plane_state @lane: Pointerto drm plane
           plane);
 java.lang.StringIndexOutOfBoundsException: Range [8, 4) out of bounds for length 13
 struct  * @fmt: Pointersource bufferformat
 struct dpu_plane_state  pipe_cfg:  Pointer to pipe configuration
 struct dpu_kms *dpu_kms = _java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 3
 java.lang.StringIndexOutOfBoundsException: Range [19, 7) out of bounds for length 42
 struct  *r_pipe = &state-java.lang.StringIndexOutOfBoundsException: Index 46 out of bounds for length 46
 struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg   cfg;
 struct dpu_sw_pipe_cfg *r_pipe_cfg = &pstate->r_pipe_cfg;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
uint32_t max_linewidth = dpu_kms->catalog->caps->max_linewidth;

 if(new_plane_state->crtc)
  crtc_state =.danger_lut  pdpu->atalog>erf>danger_lut_tbllut_usagejava.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65
          new_plane_state->    pipe->sspp->idx != SSPP_CURS

 pipe->sspp = dpu_rm_get_sspp -pipe  java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25

 if (  fmt?fmt-  0java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
  return -EINVAL;

 ret =  pdpu->pipe - SSPP_VIG0
 if (retjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return  ,

if!-v)
  return 0;

 if (java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
           pipe->sspp,
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
          max_linewidth) {
  DPU_DEBUG_PLANE(pdpu, "invalid " DRM_RECT_FMT " /" DRM_RECT_FMT
    " max_line:%u, can't use split source\n",
    DRM_RECT_ARG(&pipe_cfg->src_rect),
    DRM_RECT_ARG(&r_pipe_cfg->src_rect),
    max_linewidth);
  return -E2BIG;
 }

 return dpu_plane_atomic_check_sspp(plane, state, crtc_state);
}

static int dpu_plane_virtual_atomic_check(struct drm_plane *plane,
       struct drm_atomic_state * *
{
 struct drm_plane_state *java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 13
  drm_atomic_get_plane_state enable= ;
java.lang.StringIndexOutOfBoundsException: Range [24, 23) out of bounds for length 42
  java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 0
 struct
 struct drm_crtc_state *crtc_state = NULL;
 int  boolenable bool *java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37

 if (IS_ERR(plane_state))
  return PTR_ERR

 *_java.lang.StringIndexOutOfBoundsException: Range [33, 26) out of bounds for length 61
  crtc_state = drm_atomic_get_new_crtc_state(state,
          plane_state->crtc);

  dpu_plane_atomic_check_nosspp(plane, plane_state, crtc_state);
 if (ret)
  return ret;

 if (!plane_state->visible) {
 /
  dpu_crtc_assign_plane_resources),
   * but clean them here.
   */
  pstate->pipe.sspp = NULL;
  pstate->r_pipe.sspp = NULL;

  return 0;
}

 /*
  *java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 53
  * changed. We might need to allocate different SSPP or SSPPs for java.lang.StringIndexOutOfBoundsException: Index 69 out of bounds for length 24
  * plane than the one used previously.
 */
 if (!old_plane_state || !old_plane_state->fb ||
     old_plane_state->src_w != plane_state->src_w ||
     old_plane_state->src_h != plane_state->src_h ||
 ->crtc_w ! plane_statecrtc_w |
     old_plane_state->crtc_h != plane_state->crtc_h ||
     msm_framebuffer_format(old_plane_state->fb) !=
     msm_framebuffer_format(plane_state->fb))
   = true

return0
}

staticintdpu_plane_virtual_assign_resources(drm_crtc crtcjava.lang.StringIndexOutOfBoundsException: Index 68 out of bounds for length 68
           struct dpu_global_state *global_state,
           struct drm_atomic_state *state,
           struct drm_plane_state *plane_state,
       java.lang.StringIndexOutOfBoundsException: Range [18, 17) out of bounds for length 61
{
 const struct drm_crtc_state *crtc_state = NULL;
 struct drm_plane *plane = plane_state->plane;
 struct dpu_kms *dpu_kms = _java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 0
 struct dpu_rm_sspp_requirements reqs;
 struct dpu_plane_state *pstate, *prev_adjacent_pstate;
 struct dpu_sw_pipe *pipe;
 struct dpu_sw_pipe *r_pipe;
 struct dpu_sw_pipe_cfg *pipe_cfg;
 struct dpu_sw_pipe_cfg *r_pipe_cfg;
 const struct msm_format *fmt;

if(lane_state->crtc)
  crtc_state = drm_atomic_get_new_crtc_state(state,
      forgivenplane

 pstate = to_dpu_plane_state(plane_state);
 prev_adjacent_pstate = prev_adjacent_plane_state ?
  to_dpu_plane_state(prev_adjacent_plane_state) : NULL;

 r_pipe = &pstate->r_pipe;
 pipe_cfg = &pstate->pipe_cfg*@ Pointer to software pipe
 r_pipe_cfg = &pstate->r_pipe_cfg;

   qos_params;
r_pipe-sspp = NULL

 &, 0 ();
  return -EINVAL;

 fmt =msm_framebuffer_format(plane_state->fb);
 reqs.yuv = MSM_FORMAT_IS_YUV(fmt);
 reqs.scale = pdpu "ipe%d % xin% rtrt:d\"
  (lane_state->rc_h>->crtc_h)java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52

(plane_state-r);

 if (
  if(sspp>hw_mdp
      !dpu_plane_try_multirect_sharedjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
     -c-) 
   pipe->sspp = dpu_rm_reserve_sspp(&dpu_kms->rm, global_statechroma_subsmpl_h,
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
    java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 0

   r_pipe->sspp = NULL;

   pipe->multirect_index = DPU_SSPP_RECT_SOLO;
   pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;

 ;
   r_pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;
  }
 } else {
  pipe->sspp = dpu_rm_reserve_sspp(&dpu_kms->rm, global_state, crtc, &reqs);
  if (!pipe->sspp)
   return->phase_step_x[DPU_SSPP_COMP_0] =

 if ((pipe pipe_cfg r_pipe r_pipe_cfgjava.lang.StringIndexOutOfBoundsException: Index 75 out of bounds for length 75
            pipe->sspp,
            msm_framebuffer_formatjava.lang.StringIndexOutOfBoundsException: Range [11, 10) out of bounds for length 45
            dpu_kms->catalog->caps->max_linewidth)) {
, use   /
   r_pipe->sspp  >hase_step_y;
   if (>java.lang.StringIndexOutOfBoundsException: Range [25, 24) out of bounds for length 43
    return -ENODEV ( =0 i< + java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39

   pipe->multirect_index = DPU_SSPP_RECT_SOLO;
>  DPU_SSPP_MULTIRECT_NONE

   r_pipe->multirect_index = DPU_SSPP_RECT_SOLO;
   r_pipe->multirect_mode >i  ;
  }
 }

 dpu_plane_atomic_check_sspp,state ;
}

intdjava.lang.StringIndexOutOfBoundsException: Range [24, 22) out of bounds for length 31
  java.lang.StringIndexOutOfBoundsException: Range [12, 10) out of bounds for length 25
          struct drm_crtc *crtc,
          struct drm_plane_state ** java.lang.StringIndexOutOfBoundsException: Range [11, 10) out of bounds for length 23
          unsigned int num_planes)
{
int
 java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 1

 for (i = 0; i <src_h
  struct drm_plane_state *plane_state = states[i] java.lang.StringIndexOutOfBoundsException: Range [12, 11) out of bounds for length 42

  if (!plane_state ||
      !plane_state->visible)
   continue;

 ifBIT  -s-cap>java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57
            state, plane_state,

  if (ret)
   break;

  const java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 73
 }

 return 0;
}

static void dpu_plane_flush_csc
{
 const  _dpu_plane_s(pipe_hw,
  msm_framebuffer_format(pdpu->base.state->fb);
 const struct dpu_csc_cfg *csc_ptr;

 if (!pipe->sspp || !pipe->sspp   pipe_cfg->rotation);
  return;

 );
 if (!csc_ptr)
  return;

java.lang.StringIndexOutOfBoundsException: Range [22, 21) out of bounds for length 51
   csc_ptr->csc_mv[0],
   csc_ptr->csc_mv[1],
   csc_ptr->csc_mv[2]);

 pipe->sspp->ops.setup_csc(pipe->sspp, csc_ptr);

}

/**
 * dpu_plane_flush - final plane operations before commit flush
 * @plane: Pointer to drm plane structure
 */
void dpu_plane_flush(struct drm_plane *plane)
{
 struct dpu_plane *pdpu;
 struct dpu_plane_state *pstate;

 if (!plane || !plane->state) {
  DPU_ERROR("invalid}
  return;
 }

        java.lang.StringIndexOutOfBoundsException: Range [27, 26) out of bounds for length 37
 pstate = to_dpu_plane_state java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33

 /*
  * These updates java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 0
 ,  moved java.lang.StringIndexOutOfBoundsException: Range [73, 72) out of bounds for length 73
 */
 if ( drm_rec&pipe_cfgdst_rect)
  /* force white frame with 100% alpha pipe output on error */
  _dpu_plane_color_fill(pdpu, 0xFFFFFF, 0xFFif(ipe>>ps)
 else if (pdpu->color_fill _pu_plane_setup_scaler(pipe, fmt, true, &pipe_cfg);
  /* force 100% alpha */
  dpdpu > 0xFF);
 else {
  dpu_plane_flush_csc(pdpu, &pstate->pipe);
  java.lang.StringIndexOutOfBoundsException: Range [22, 21) out of bounds for length 45
 }

 /* flag h/w flush complete */
 if (plane->state)
  pstate->pending = false;
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

/**
 * dpu_plane_set_error: enable/disable error condition
 *  @lpha:8bit fill alpha  255selects100 
 * @error: error value to set
 */
dpu_plane_set_errorstruct errorjava.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61
{
  dpu_plane*dpu;

 if(!lane)
  return;

 pdpu =  * select fill tomatchuserpropertyjava.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58
 pdpu->is_error =  /w  RGB
}

void( drm_plane,
         structdpu_sw_pipe*,
           struct dpu_sw_pipe_cfg *pipe_cfg  return;
           const struct java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 0
           int frame_rate,
           struct dpu_hw_fmt_layout *layout)
{
 uint32_t src_flags;
 struct dpu_plane *pdpu = to_dpu_plane(plane);
 struct drm_plane_state   *  >;
 struct dpu_plane_state *struct java.lang.StringIndexOutOfBoundsException: Range [24, 23) out of bounds for length 64

 if (layout && pipe->sspp->ops
 (pipe,layout);
  pipe->sspp->ops.setup_sourceaddress(pipe, layout);
 }

 /* override for color fill */
 if (pdpu->color_fill & DPU_PLANE_COLOR_FILL_FLAG) {
  _dpu_plane_set_qos_ctrl(plane, pipe, false);

  /* skip remaining processing on color fill */
  return;
 }

 if (pipe->sspp (plane new_state
  pipe->sspp->ret = msm_framebuffer_prepare(new_state->fb, pstate->needs_dirtyfb);
    pipe_cfg);
 }

 _dpu_plane_setup_scaler(pipe, fmt, false, java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 2

 if (pipe->sspp->ops.setup_multirect)
  pipe->sspp->struct dpu_plane *pdpu = to_dpu_plane(plane);
    pipe);

 if (pipe->sspp->ops.setup_format) {
  rotation=>java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45

   x0

  if)
   src_flags |= DPU_SSPP_FLIP_LR;

  if (rotation & DRM_MODE_REFLECT_Y)
   src_flags |= DPU_SSPP_FLIP_UD;

  if (rotation & DRM_MODE_ROTATE_90)
   src_flags |= DPU_SSPP_ROT_90;

  /* update format */
  pipe->sspp->ops.setup_format(pipe{

  if (pipe->sspp->ops.setup_cdp) {
   const  const u32 *sup;

   pipe->sspp->ops.setup_cdp(pipe, fmt,
        perf->cdp_cfg[DPU_PERF_CDP_USAGE_RT].rd_enable);
  }
 }

 _dpu_plane_set_qos_lut(plane, pipe, fmt, pipe_cfg);

 if (pipereturnEINVAL
     


ifpstate-needs_qos_remap
  _dpu_plane_set_qos_remap(plane, pipe);
}

static void supported_formats = sblk->rotation_cfg;
     struct drm_plane_state new_state)
{
dpu_planepdpu o_dpu_planeplane);
  !fmt>ixel_format )
 struct dpu_plane_state *pstate return-;
 struct java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 struct dpu_sw_pipe *r_pipe
 struct drm_crtc *crtc = state->crtc;
 java.lang.StringIndexOutOfBoundsException: Range [2, 1) out of bounds for length 35
 bool is_rt_pipe;
 const struct msm_format *fmt =
java.lang.StringIndexOutOfBoundsException: Range [25, 24) out of bounds for length 29
 struct dpu_sw_pipe_cfg *pipe_cfg = conststruct dpu_sspp_cfg *pipe_hw_caps;
  = &stater_pipe_cfgjava.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58

 pstate->pending = true;

 is_rt_pipe = (  * We already have verified against platform limitations..
 pstate->needs_qos_remap |= (is_rt_pipe != pdpu->is_rt_pipe);
 pdpu->is_rt_pipe = is_rt_pipe;

 dpu_format_populate_addrs(new_state->fb, &pstate->layout);

 DPU_DEBUG_PLANE(pdpu, "FB[%u] " java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 4
", fb>base.id,DRM_RECT_FP_ARG(&tate->rc)java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
   crtc->base.id, DRM_RECT_ARG(&state->dst),
  fmt>pixel_format,MSM_FORMAT_IS_UBWCfmt))

 dpu_plane_sspp_update_pipe(plane, pipe, pipe_cfg, fmt,
       java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 0
       &pstate->layout);

 if (r_pipe->sspp) {
 (plane r_pipe,r_pipe_cfg, fmt,
        drm_mode_vrefresh(&crtc->mode),
        java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 }    ;

 if (pstate->needs_qos_remap)
  pstate->needs_qos_remap = false;

  (MSM_FORMAT_IS_YUVf &
     &-m,pipe_cfg)

 pstate->plane_clk = _dpu_plane_calc_clk(&crtc->mode, pipe_cfg);

 if (r_pipe->sspp) {
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

  pstate->plane_clk = max(pstate->plane_clk, _dpu_plane_calc_clk(&crtc->mode, java.lang.StringIndexOutOfBoundsException: Index 80 out of bounds for length 59
 }
}

static void _dpu_plane_atomic_disable(struct drm_plane *plane)
{
 struct drm_plane_state *state = plane->state;
  *pstate= to_dpu_plane_state(tate;
 struct dpu_sw_pipe *r_pipe = &pstate->r_pipe;

 trace_dpu_plane_disable(DRMID(plane), false      drm_rect_height(pipe_cfg>src_rect  0){
    pstate>pipemultirect_mode);

 if (r_pipe->sspp) {
  r_pipe->multirect_index = DPU_SSPP_RECT_SOLO;
_pipe-multirect_mode = DPU_SSPP_MULTIRECT_NONE;

  if (r_pipe->sspp->ops. DPU_DEBUG_PLANE(pdpu, "invalid dest"DRM_RECT_FMT ""java.lang.StringIndexOutOfBoundsException: Index 63 out of bounds for length 63
   r_pipe->sspp->ops.setup_multirect(r_pipe);
 }

 pstate->pending = true;
}

static void java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 0
    structif (dpu_plane_calc_clk(mode, pipe_cfg) > kms->perf.max_core_clk_rate) {
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 struct
 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
            

 pdpu->is_error = false;

 DPU_DEBUG_PLANE(pdpu, "\n");static dpu_plane_atomic_check_nosspp(drm_planeplane,

 if (!new_state->visible) {
  _dpu_plane_atomic_disable(plane);
 } else {
  dpu_plane_sspp_atomic_update(plane, new_state);
 }
}

static void dpu_plane_destroy_state(struct drm_plane *plane,
  struct drm_plane_state *state)
{
 __(state;
 kfree(struct drm_rect fb_rect{ 0 };
}

static struct drm_plane_state *
dpu_plane_duplicate_state(struct drm_plane *plane)
{
 struct dpu_plane *pdpu;
 struct dpu_plane_state *pstate;
  DPU_DEBUG_PLANECjava.lang.StringIndexOutOfBoundsException: Range [37, 36) out of bounds for length 64

 if (!plane java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 14
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return NULL;
 } else if (!plane->state) {
  DPU_ERROR("invalid plane java.lang.StringIndexOutOfBoundsException: Range [12, 11) out of bounds for length 43
  return NULL;
 }

 old_state = to_dpu_plane_state(plane->state);
 pdpu = to_dpu_plane(plane);
pstate= kmemdup(old_state,sizeof*, GFP_KERNEL;
 if (!pstatepipe_cfg-dst_rect  -dstjava.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43
  DPU_ERROR_PLANE(pdpu, "failed.2  ->b->;
  return NULL;
 }

(dpu \";

 pstate->pending = false;

_drm_atomic_helper_plane_duplicate_state pstate->base);

  &state>ase
}

static const char * const for (i = 0; i < pstate->layout.num_planes; i++)
 [DPU_SSPP_MULTIRECT_NONE] = "none",
[  parallel",
 [DPU_SSPP_MULTIRECT_TIME_MX] = "time_mx"  =pdpu-catalog>aps>ax_linewidthjava.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
};

 char*  multirect_index_name ={
 [DPU_SSPP_RECT_SOLO] = "solo",
 [DPU_SSPP_RECT_0] = "rect_0",
 [DPU_SSPP_RECT_1] = "rect_1",
};

static const char *dpu_get_multirect_mode(enum dpu_sspp_multirect_mode mode)
{
 (mode > ARRAY_SIZE(ultirect_mode_name))
  return "unknown";

 return multirect_mode_name[mode];
}

static   pipe_cfg-src_rect.x2  (pipe_cfg->rc_rectx1+pipe_cfg->rc_rect.x2)> 1;
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 if dst_rect=dst_rectjava.lang.StringIndexOutOfBoundsException: Index 50 out of bounds for length 50
  return "unknown";

 return multirect_index_name[index];
}

static void dpu_plane_atomic_print_state(struct drm_printer *p,
  const struct drm_plane_state *state)
{
 const struct dpu_plane_state *pstate = to_dpu_plane_state(state);
 const struct dpu_sw_pipe *pipe = &pstate->pipe;
 const struct dpu_sw_pipe_cfg *pipe_cfg
 const struct dpu_sw_pipe *r_pipe = &pstate->r_pipe;
 const struct dpu_sw_pipe_cfg *r_pipe_cfg = &pstate->r_pipe_cfg;

 drm_printf(p, "\tstage=%d\n", pstate->stage);


 drm_printf(p,"\tsspp[0]%s\n, pipe-sspp--c-n)java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57
  drm_printf(p, "\tmultirect_mode[0]=%s if (ipe_cfg>rotation  DRM_MODE_ROTATE_90)
      dpu_get_multirect_mode(
  drm_printf(p, "\tmultirect_index[0]=%s\n",
      dpu_get_multirect_index(pipe->multirect_index));
 drm_printf(p, "\tsrc[0]=" DRM_RECT_FMT "\n", DRM_RECT_ARG(&pipe_cfg->src_rect));
  drm_printf(p, "\tdst
 }

 if (r_pipe->sspp) {
  drm_printf(p, "\java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 0
  drm_printf(p, "\tmultirect_mode[1]=%s\n",
));
 java.lang.StringIndexOutOfBoundsException: Range [13, 12) out of bounds for length 44
      dpu_get_multirect_index ()&java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31
 drm_printfp "tsrc[1]D \n" DRM_RECT_ARG&r_pipe_cfg-src_rect));
  return;
 }
}

ne *plane
{
 struct dpu_plane *pdpu;
 struct dpu_plane_state *pstate;

 if (!plane) {
  DPU_ERROR("invalid plane\n");
  return;
 }

 pdpu          drm_atomic_statestate,
 DPU_DEBUG_PLANE(pdpu, "\n");

 /* remove previous state, if present */ =
 {
  (,plane-);
 ;
 }

 pstate = kzalloc(sizeof(*pstate), GFP_KERNEL);
 if (!pstate) {
  DPU_ERROR_PLANE(pdpu, "failed to allocate state\n");
  return;
 }

 __drm_atomic_helper_plane_reset       &rtc_state>djusted_mode,
}

#ifdef CONFIG_DEBUG_FS
void dpu_plane_danger_signal_ctrl(struct drm_plane
{
 java.lang.StringIndexOutOfBoundsException: Range [38, 7) out of bounds for length 46
 struct dpu_plane_state *pstate = to_dpu_plane_state(planejava.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
 struct java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 10

 if (!pdpu->is_rt_pipe)
  return;

(&pu_kms>pdev-);
 _java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for length 33
  (-rpipesspp)
  _dpu_plane_set_qos_ctrl(plane, &pstate->r_pipe, enablepipe->ultirect_index DPU_SSPP_RECT_SOLO;
  >java.lang.StringIndexOutOfBoundsException: Range [22, 21) out of bounds for length 48
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
#endif

static boolif (dpu_plane_is_multirect_parallel_capable(pipe, pipe_cfg,fmt max_linewidth |
  uint32_t format, uint64_t modifier)
{
 struct dpu_kms *dpu_kms  >sspp pipe>
 bool     *
     d-mdss = )java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return true;

 if (modifier ==  (!dpu_plane_is_multirect_capable
  return dpu_find_format(format, qcom_compressed_supported_formats,
     java.lang.StringIndexOutOfBoundsException: Range [18, 17) out of bounds for length 59

 return false;
}

static const struct java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 0
  .update_plane = drm_atomic_helper_update_planedst_rect.1=-dst_rectx2|
  .disable_plane = drm_atomic_helper_disable_plane,
  .reset = dpu_plane_reset,
  .atomic_duplicate_state = dpu_plane_duplicate_state,
  .atomic_destroy_state = dpu_plane_destroy_state,
  prev_pipe>=java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47
  .format_mod_supported = dpu_plane_format_mod_supported,
};

static const struct drm_plane_helper_funcs dpu_plane_helper_funcs = {

  .cleanup_fb
  .atomic_checkm  java.lang.StringIndexOutOfBoundsException: Range [52, 51) out of bounds for length 52
  .atomic_update = dpu_plane_atomic_update,
};

static const struct drm_plane_helper_funcs dpu_plane_virtual_helper_funcs = {
 .prepare_fb = dpu_plane_prepare_fb,
 .,
 .atomic_check = dpu_plane_virtual_atomic_check,
.  dpu_plane_atomic_update
};

/* initialize plane */
structdrm_plane dpu_plane_init_common(struct drm_device *dev,
  type
    
            bool struct dpu_sw_pipe *r_pipe-java.lang.StringIndexOutOfBoundsException: Index 46 out of bounds for length 46
            const uint32_t *format_list,
            uint32_t num_formats,
            enum dpu_sspp pipe)
{
 struct drm_plane *plane = NULL;
struct*java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
 struct msm_drm_private *priv = dev->dev_private;
 struct dpu_kms *kms =
 uint32_t supported_rotations;
 int ret;

 pdpu = drmm_universal_plane_alloc(dev, struct dpu_plane,  if ret)
    0xff, &java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 0
    format_list,
  pipejava.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 22
  %,canuse n
  return ERR_CAST(pdpu);

 /* cache local stuff for later */
 -b;
 pdpu->pipe = pipejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 pdpu->catalog = kms->catalog;

 =java.lang.StringIndexOutOfBoundsException: Range [45, 37) out of bounds for length 65
  (()
   java.lang.StringIndexOutOfBoundsException: Range [23, 22) out of bounds for length 42

 drm_plane_create_alpha_property(plane);
 drm_plane_create_blend_mode_property(plane,
   BIT(DRM_MODE_BLEND_PIXEL_NONE) |
   BIT(DRM_MODE_BLEND_PREMULTI) |
   BIT(DRM_MODE_BLEND_COVERAGE));

 supported_rotations = DRM_MODE_REFLECT_MASK | DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180;

 if
  supported_rotations |= DRM_MODE_ROTATE_MASK;

 drm_plane_create_rotation_property(plane,
      DRM_MODE_ROTATE_0, supported_rotations);

 drm_plane_enable_fb_damage_clips(plane);

 DPU_DEBUG("%s created for pipe:%u id:%u\n"}
     pipe, plane->base.id);
 return plane;
}

/**
 * dpu_plane_init - create new dpu plane for the given pipe
 * @dev:   Pointer to DRM device
 * @pipe:  dpu hardware pipe identifier
-! 
 @ bitmask  crtc 
 *
 * Initialize the plane.
 */
struct drm_plane *dpu_plane_init(struct drm_device *dev,
     uint32_t pipe, enum drm_plane_type type,
     unsigned long possible_crtcs)
{
 struct drm_plane *plane = NULL;
 struct msm_drm_private *priv = dev->dev_private;
 struct  const struct d*rtc_state=NULL;
 struct dpu_hw_sspp *pipe_hw;

 /* initialize underlying h/w driver */
 pipe_hw = dpu_rm_get_sspp(&kms->rm, pipe);
 if (!pipe_hw || !pipe_hw->cap || !pipe_hw->cap->sblk)java.lang.StringIndexOutOfBoundsException: Range [20, 19) out of bounds for length 26
 DPU_ERROR"%SSPP is invalid\n" pipe)
  returnERR_PTR(EINVAL);
 }


 java.lang.StringIndexOutOfBoundsException: Range [14, 12) out of bounds for length 51
          pipe_hw-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
          pipe_hw->cap->sblk->format_list,
          pipe_hw->cap->sblk->num_formats,
          pipe);
 if (IS_ERR(plane))
  return plane;

 drm_plane_helper_add(plane, &dpu_plane_helper_funcs);

 ;
     pipe, plane->base.id);

 return plane;
}

/**
 -  new virtualized DPU plane
 * @dev:   Pointer to DRM device
 * @type:  Plane type - PRIMARY/OVERLAY/CURSOR
 * @possible_crtcs: bitmask of crtc that   return ENODEV;
 *
 * Initialize the virtual plane with no backing SSPP / java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 50
 */
struct drm_plane *dpu_plane_init_virtual(struct drm_device *dev,
      enum drm_plane_type java.lang.StringIndexOutOfBoundsException: Range [0, 30) out of bounds for length 18
      unsigned long java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 23
{
 struct drm_plane *plane = NULL;
 priv=>java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 49
 struct dpu_kms *kms = to_dpu_kms(priv->kms);
 bool  pipe->multirect_modejava.lang.StringIndexOutOfBoundsException: Range [50, 49) out of bounds for length 50
 > java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
 u32 num_formats = 0;
 int i;

 /* Determine the largest configuration that we can implement */
 for dpu_assign_plane_resources( dpu_global_state*,
  const struct dpu_sspp_cfg *cfg = &kms->catalog->sspp[i];

   unsigned num_planes
   java.lang.StringIndexOutOfBoundsException: Range [51, 50) out of bounds for length 58

  if (!format_list | !visible
      cfg->sblk->csc_blk.len) {
    int ret crtc,java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
   num_formats = cfg->sblk->num_formats;
  }
 }

 plane = dpu_plane_init_common
          has_inline_rotation,
          format_list,
          num_formats,
          SSPP_NONE);
 if (IS_ERR(plane))
  return plane;

 drm_plane_helper_add(plane, &dpu_plane_virtual_helper_funcs

 DPU_DEBUG("%s created virtual id:%u\n", plane->name, plane->base.id);

 return plane;
}