/** * @fw_mm_node: Node representing mapping in FW address space. @pvr_obj->lock must * be held when writing.
*/ struct drm_mm_node fw_mm_node;
/** * @fw_addr_offset: Virtual address offset of firmware mapping. Only * valid if @flags has %PVR_GEM_OBJECT_FLAGS_FW_MAPPED * set.
*/
u32 fw_addr_offset;
/** * @init: Initialisation callback. Will be called on object creation and FW hard reset. * Object will have been zeroed before this is called.
*/ void (*init)(void *cpu_ptr, void *priv);
/** @init_priv: Private data for initialisation callback. */ void *init_priv;
/** * struct pvr_fw_defs - FW processor function table and static definitions
*/ struct pvr_fw_defs { /** * @init: * * FW processor specific initialisation. * @pvr_dev: Target PowerVR device. * * This function must call pvr_fw_heap_calculate() to initialise the firmware heap for this * FW processor. * * This function is mandatory. * * Returns: * * 0 on success, or * * Any appropriate error on failure.
*/ int (*init)(struct pvr_device *pvr_dev);
/** * @fini: * * FW processor specific finalisation. * @pvr_dev: Target PowerVR device. * * This function is optional.
*/ void (*fini)(struct pvr_device *pvr_dev);
/** * @fw_process: * * Load and process firmware image. * @pvr_dev: Target PowerVR device. * @fw: Pointer to firmware image. * @fw_code_ptr: Pointer to firmware code section. * @fw_data_ptr: Pointer to firmware data section. * @fw_core_code_ptr: Pointer to firmware core code section. May be %NULL. * @fw_core_data_ptr: Pointer to firmware core data section. May be %NULL. * @core_code_alloc_size: Total allocation size of core code section. * * This function is mandatory. * * Returns: * * 0 on success, or * * Any appropriate error on failure.
*/ int (*fw_process)(struct pvr_device *pvr_dev, const u8 *fw,
u8 *fw_code_ptr, u8 *fw_data_ptr, u8 *fw_core_code_ptr,
u8 *fw_core_data_ptr, u32 core_code_alloc_size);
/** * @vm_map: * * Map FW object into FW processor address space. * @pvr_dev: Target PowerVR device. * @fw_obj: FW object to map. * * This function is mandatory. * * Returns: * * 0 on success, or * * Any appropriate error on failure.
*/ int (*vm_map)(struct pvr_device *pvr_dev, struct pvr_fw_object *fw_obj);
/** * @vm_unmap: * * Unmap FW object from FW processor address space. * @pvr_dev: Target PowerVR device. * @fw_obj: FW object to map. * * This function is mandatory.
*/ void (*vm_unmap)(struct pvr_device *pvr_dev, struct pvr_fw_object *fw_obj);
/** * @get_fw_addr_with_offset: * * Called to get address of object in firmware address space, with offset. * @fw_obj: Pointer to object. * @offset: Desired offset from start of object. * * This function is mandatory. * * Returns: * * Address in firmware address space.
*/
u32 (*get_fw_addr_with_offset)(struct pvr_fw_object *fw_obj, u32 offset);
/** * @wrapper_init: * * Called to initialise FW wrapper. * @pvr_dev: Target PowerVR device. * * This function is mandatory. * * Returns: * * 0 on success. * * Any appropriate error on failure.
*/ int (*wrapper_init)(struct pvr_device *pvr_dev);
/** * @irq_pending: Check interrupt status register for pending interrupts. * * @pvr_dev: Target PowerVR device. * * This function is mandatory.
*/ bool (*irq_pending)(struct pvr_device *pvr_dev);
/** * @irq_clear: Clear pending interrupts. * * @pvr_dev: Target PowerVR device. * * This function is mandatory.
*/ void (*irq_clear)(struct pvr_device *pvr_dev);
/** * @has_fixed_data_addr: Specify whether the firmware fixed data must be loaded at the * address given by the firmware layout table. * * This value is mandatory.
*/ bool has_fixed_data_addr;
};
/** * @core_code_obj: Object representing firmware core code. May be * %NULL if firmware does not contain this section.
*/ struct pvr_fw_object *core_code_obj;
/** * @core_data_obj: Object representing firmware core data. May be * %NULL if firmware does not contain this section.
*/ struct pvr_fw_object *core_data_obj;
/** @code: Driver-side copy of firmware code. */
u8 *code;
/** @data: Driver-side copy of firmware data. */
u8 *data;
/** * @core_code: Driver-side copy of firmware core code. May be %NULL if firmware does not * contain this section.
*/
u8 *core_code;
/** * @core_data: Driver-side copy of firmware core data. May be %NULL if firmware does not * contain this section.
*/
u8 *core_data;
/** @booted: %true if the firmware has been booted, %false otherwise. */ bool booted;
/** * @processor_type: FW processor type for this device. Must be one of * %PVR_FW_PROCESSOR_TYPE_*.
*/
u16 processor_type;
/** @funcs: Function table for the FW processor used by this device. */ conststruct pvr_fw_defs *defs;
/** @processor_data: Pointer to data specific to FW processor. */ union { /** @mips_data: Pointer to MIPS-specific data. */ struct pvr_fw_mips_data *mips_data;
} processor_data;
/** @fw_heap_info: Firmware heap information. */ struct { /** @gpu_addr: Base address of firmware heap in GPU address space. */
u64 gpu_addr;
/** @size: Size of main area of heap. */
u32 size;
/** @offset_mask: Mask for offsets within FW heap. */
u32 offset_mask;
/** @raw_size: Raw size of heap, including reserved areas. */
u32 raw_size;
/** @log2_size: Log2 of raw size of heap. */
u32 log2_size;
/** @config_offset: Offset of config area within heap. */
u32 config_offset;
/** @reserved_size: Size of reserved area in heap. */
u32 reserved_size;
} fw_heap_info;
/** @fw_mm: Firmware address space allocator. */ struct drm_mm fw_mm;
/** @fw_mm_lock: Lock protecting access to &fw_mm. */
spinlock_t fw_mm_lock;
/** @fw_mm_base: Base address of address space managed by @fw_mm. */
u64 fw_mm_base;
/** * @fwif_connection_ctl: Pointer to CPU mapping of FWIF connection * control structure.
*/ struct rogue_fwif_connection_ctl *fwif_connection_ctl;
/** @fwif_sysinit: Pointer to CPU mapping of FW SYSINIT structure. */ struct rogue_fwif_sysinit *fwif_sysinit;
/** @fwif_sysdata: Pointer to CPU mapping of FW SYSDATA structure. */ struct rogue_fwif_sysdata *fwif_sysdata;
/** @fwif_osinit: Pointer to CPU mapping of FW OSINIT structure. */ struct rogue_fwif_osinit *fwif_osinit;
/** @fwif_osdata: Pointer to CPU mapping of FW OSDATA structure. */ struct rogue_fwif_osdata *fwif_osdata;
/** @power_sync: Pointer to CPU mapping of power sync state. */
u32 *power_sync;
/** @hwrinfobuf: Pointer to CPU mapping of FW HWR info buffer. */ struct rogue_fwif_hwrinfobuf *hwrinfobuf;
/** * pvr_fw_object_get_dma_addr() - Get DMA address for given offset in firmware * object. * @fw_obj: Pointer to object to lookup address in. * @offset: Offset within object to lookup address at. * @dma_addr_out: Pointer to location to store DMA address. * * Returns: * * 0 on success, or * * -%EINVAL if object is not currently backed, or if @offset is out of valid * range for this object.
*/ static __always_inline int
pvr_fw_object_get_dma_addr(struct pvr_fw_object *fw_obj, u32 offset, dma_addr_t *dma_addr_out)
{ return pvr_gem_get_dma_addr(fw_obj->gem, offset, dma_addr_out);
}
/* Util functions defined in pvr_fw_util.c. These are intended for use in pvr_fw_<arch>.c files. */ int
pvr_fw_process_elf_command_stream(struct pvr_device *pvr_dev, const u8 *fw, u8 *fw_code_ptr,
u8 *fw_data_ptr, u8 *fw_core_code_ptr, u8 *fw_core_data_ptr);
#endif/* PVR_FW_H */
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