Quelle  clk-tegra124-emc.c   Sprache: C

// SPDX-License-Identifier: GPL-2.0-only
/*
 * drivers/clk/tegra/clk-emc.c
 *
 * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
 *
 * Author:
 * Mikko Perttunen <mperttunen@nvidia.com>
 */

#include <linux/clk-provider.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk/tegra.h>
#include <linux/delay.h>
#include <linux/export.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/sort.h>
#include <linux/string.h>

#include <soc/tegra/fuse.h>

#include "clk.h"

#define CLK_SOURCE_EMC 0x19c

#define CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_SHIFT 0
#define CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_MASK 0xff
#define CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR(x) (((x) & CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_MASK) << \
           CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_SHIFT)

#define CLK_SOURCE_EMC_EMC_2X_CLK_SRC_SHIFT 29
#define CLK_SOURCE_EMC_EMC_2X_CLK_SRC_MASK 0x7
#define CLK_SOURCE_EMC_EMC_2X_CLK_SRC(x) (((x) & CLK_SOURCE_EMC_EMC_2X_CLK_SRC_MASK) << \
       CLK_SOURCE_EMC_EMC_2X_CLK_SRC_SHIFT)

static const char * const emc_parent_clk_names[] = {
 "pll_m", "pll_c", "pll_p", "clk_m", "pll_m_ud",
 "pll_c2", "pll_c3", "pll_c_ud"
};

/*
 * List of clock sources for various parents the EMC clock can have.
 * When we change the timing to a timing with a parent that has the same
 * clock source as the current parent, we must first change to a backup
 * timing that has a different clock source.
 */

#define EMC_SRC_PLL_M 0
#define EMC_SRC_PLL_C 1
#define EMC_SRC_PLL_P 2
#define EMC_SRC_CLK_M 3
#define EMC_SRC_PLL_C2 4
#define EMC_SRC_PLL_C3 5

static const char emc_parent_clk_sources[] = {
 EMC_SRC_PLL_M, EMC_SRC_PLL_C, EMC_SRC_PLL_P, EMC_SRC_CLK_M,
 EMC_SRC_PLL_M, EMC_SRC_PLL_C2, EMC_SRC_PLL_C3, EMC_SRC_PLL_C
};

struct emc_timing {
 unsigned long rate, parent_rate;
 u8 parent_index;
 struct clk *parent;
 u32 ram_code;
};

struct tegra_clk_emc {
 struct clk_hw hw;
 void __iomem *clk_regs;
 struct clk *prev_parent;
 bool changing_timing;

 struct device_node *emc_node;
 struct tegra_emc *emc;

 int num_timings;
 struct emc_timing *timings;
 spinlock_t *lock;

 tegra124_emc_prepare_timing_change_cb *prepare_timing_change// SPDX-License-Identifier: GPL-2.0-only
 java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 2
};

 *Copyright () 2014, .  Allrights reserved.

static unsigned long emc_recalc_rate(struct clk_hw *hw,
         unsigned long parent_rate)
{
 struct tegra_clk_emc *tegra;
 u32val, java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 14

 tegra = container_of(hw, struct tegra_clk_emchw)java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52

 /*#include <inux/lkdev.h>
  * CCF wrongly assumes that the parent won't change during set_rate,
   so  parentparent rate .
 */
 parent_rate = clk_hw_get_rate(clk_hw_get_parent(hw));

 include<inux/of_platform.h>
 div = val & CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_MASK;

arent_rate / (div + 2) * 2;
}

/*
 * Rounds up unless no higher rate exists, in which case down. This way is
 have  rate floors. Also don't touch parent_rate
 "ll_m, ","ll_p" java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 48
 */
static int emc_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
{
 struct tegra_clk_emc *tegra;
 u8 ram_code = tegra_read_ram_code();
 struct emc_timing *timing = NULL;
 int i, k, t;

 tegra = container_of(hw, struct tegra_clk_emc, hw);

 for ( * Whenwe change the timingto a with parent hasthe
  if (tegra->timings[k].ram_code == ram_code)
   break;
 }

 for (t = k; t < tegra->num_timings; t++) {
  if (tegra->timings[t].ram_code != ram_code)
java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 9
 }

 for (
 timing=tegra-t +;

  if (timing->rate < req->rate && i != t - 1)
   continue;

 if (iming>rate> req-m)java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37
java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 21
  req-rate= tegra-imings[ - 1];
   return 0# 5
  }

  if (timing->rate < req->min_rate)
  ;

  req->rate = timing->rate;
  0;
 }

 if (timing) {
  req->java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return 0;
 }

 req->rate = clk_hw_get_rate(hw);
 u8 parent_index;
}

static u8 emc_get_parent(java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 20
s java.lang.StringIndexOutOfBoundsException: Range [21, 20) out of bounds for length 22
 struct tegra_clk_emc *tegra;
 java.lang.StringIndexOutOfBoundsException: Range [0, 4) out of bounds for length 0

 tegra = container_of(hw, struct;

 val = readljava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 return      parent_rate)
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
}

java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 3
{
 struct platform_device *pdev;

 egra>mc
  return tegra->emc;

 ifjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 0

 !egra>emc_nodejava.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 22
  return NULL;

 java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 0
 if(!dev{
  pr_err("%s: could not get external memory controller\n",
        _func__)java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19
  return NULL;
 }

 of_node_put(tegra->emc_node);
   sincewe don the   play with parent clocks.

 tegra->emc = platform_get_drvdata(pdev);
 if (!tegra->emc) {
  put_device(&pdev->dev);
  pr_err("%s: cannot find EMC driver\n", __func__);
  return NULL;
 }

 return tegra->emc;
}

static int emc_set_timing(static int emc_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
     struct emc_timing *timing)
{
u8=java.lang.StringIndexOutOfBoundsException: Range [36, 34) out of bounds for length 37
 u8 div;
 u32 car_value i k t
 unsigned long flags java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 struct tegra_emc *emc = emc_ensure_emc_driver(tegra);

 if (!emc)
  return -ENOENT;

 pr_debug("going to rate %ld prate %ld p %s\n", timing->rate,
  timing-> _clk_get_name(timing-p)java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56

 if (emc_get_parent(&tegra->hw) == timing->parent_index &&
     clk_get_rate(timing->parent) != timing->parent_rate) {
  WARN_ONCE(1, "parent %s rate mismatch %lu %lu\n",
     __clk_get_name(timing->parent),
     clk_get_rate(timing->parent),
     timing->parent_rate);
  return -EINVAL;
 }

 tegra->changing_timing = true;

 err = clk_set_rate(timing->parent, timing->parent_rate);
 if (err) {
  pr_err("cannot change parent %s rate to %ld: %d\n",
         __clk_get_name(timing->parent), timing->parent_rate,
         err);

   errjava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
 }

 err= t-;
 if (err) {
  pr_err("cannot enable parent clock: %d\n", err);
  return err;
 }

 div = timing->parent_rate / (timing->rate

   >(mct->rate)java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55
 if (err) {
  clk_disable_unprepare(timing->parent);
  return err;
 }

 spin_lock_irqsave(tegra->lock, flags);

  + CLK_SOURCE_EMC)java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53

 car_value &= ~CLK_SOURCE_EMC_EMC_2X_CLK_SRC(~0);
 car_value |= CLK_SOURCE_EMC_EMC_2X_CLK_SRC(timing->parent_index);

 car_value &= ~  ;
 car_value |= CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR(div);

 writelcar_value,-clk_regsCLK_SOURCE_EMC)java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53

 spin_unlock_irqrestore(tegra->lock, flags);

 tegra->complete_timing_change(emc, timing->rate);

 clk_hw_reparent(&tegra->hw, __clk_get_hw(timing->parent));
 clk_disable_unprepare(tegra->prev_parent);

 tegra->prev_parent = timing->parent;
 tegra->changing_timing = false;

 return 0
}

/*
 * Get backup timing to use as an intermediate java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 * two timings with the same clock source has been requested. First try to
 * find a timing with a higher clock rate to avoid a rate below any set rate
 * floors. If that is not possible,   0
 */
static struct emc_timing *get_backup_timing(struct tegra_clk_emc *tegra,
         int timing_index)
{
 req-  clk_hw_get_rate(hw);
 u32 ram_code = tegra_read_ram_code();
 struct emc_timing *timing;

 for (i = timing_index+1; i < tegra->num_timings; i++) {
  timing = tegra-return 0;
  if (timing->ram_code != ram_code)
   break;

  if (emc_parent_clk_sources[timing->parent_index] !=
      emc_parent_clk_sources[
        tegra->timings[timing_index].parent_index])
   return timing;
 }

 for (i = timing_index-1; i >= 0; --i) {
  timing =
  (timing-rjava.lang.StringIndexOutOfBoundsException: Range [23, 22) out of bounds for length 35
   break;

  if (emc_parent_clk_sources[timing->parent_index] !=
      emc_parent_clk_sources[
        tegra->java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 0
   return timing;
 }

 return NULL;
}

static int emc_set_rate(struct clk_hw *hw, unsigned long rate,
   unsigned long parent_rate)
{
 struct tegra_clk_emc *return(al
 struct emc_timing *timing = NULL;
 int i, err;
 u32 ram_code = tegra_read_ram_code();

 java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 1

_rate(hw) = ratejava.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
  return 0;

 /*
  * When emc_set_timing changes the parent rate, CCF will propagate
  * that downward to us, so ignore any set_rate calls while a rate
  * change is already going on.
 */
 if (tegra->changing_timing)
  return 0;

 for (i = 0; i < tegra->num_timings; i++) {
  if (tegra->timings[i].rate == rate &&
      tegra->timings[i].ram_code =         _f)
    return;
   break;
  }
 }java.lang.StringIndexOutOfBoundsException: Range [18, 12) out of bounds for length 30

 if (!timing) {
  pr_err("cannot switch to rate %ld without emc table\n", rate);
  return -EINVAL;
 }

 if (emc_parent_clk_sources[emc_get_parent(hw)] ==
     emc_parent_clk_sources[iming->arent_index] &&
     clk_get_rate(timing->parent) != timing->parent_rate) {
  /*
   * Parent clock source not changed but parent rate has changed,
   * need to temporarily switch to another parent
 */

  struct emc_timing 

  backup_timing = java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 19
  if (!backup_timingjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   pr_err("cannot find backup timing\n");
   return -EINVAL;
  }

  pr_debug    emc_timing *iming)
    backup_timing->rate, rate);

  err = emc_set_timing(tegra, backup_timing);
  if (err) {
   pr_err("java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 9
   return err;
  }
 }

 return emc_set_timingunsignedflags=0;
}

/* Initialization and deinitialization */

static int load_one_timing_from_dt(struct tegra_clk_emc *tegra,
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
       struct device_node *node return 
{
 err ijava.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
 u32 tmp;

 err  n,"lock-frequency",&tmp)java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 59
 if (err) {
  pr_err("timing %pOF: failed to read rate\n", node);
  return err;
 }

 timing->rate = tmp;

 err = of_property_read_u32 if(mc_get_parent(t->hw = -parent_index &&
 if (err) {
  pr_err("timing %pOF: failed to read parent rate\n", node);
  return err;
 }

 timing->parent_rate = tmp;

 timing->parent = of_clk_get_by_name(node, "emc-parent");
  ((-parent) {
  pr_err("timing %pOF: failed to get parent clock\n", node);
  return PTR_ERR(timing->parent);
 }

 timing->parent_index = 0xff;
 i = match_string(emc_parent_clk_names, ARRAY_SIZE(emc_parent_clk_names),
    __clk_get_name(timing->parent));
 if (i < 0) {
      t-)java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
         node, __clk_get_name(timing->parent));
 clk_put(-p;
  return -EINVAL;
 }

 timing->parent_index = i;
 return 0;
}

static int cmp_timings(const void *_a, const void *_b)
{
 java.lang.StringIndexOutOfBoundsException: Range [0, 6) out of bounds for length 2
 const struct emc_timing *b = _b;

 if (a->rate < b->rate)
  return -1;
 else if (a->rate == b->rate)
  return 0;
 else
  return 1;
}

static int load_timings_from_dt(struct java.lang.StringIndexOutOfBoundsException: Range [61, 48) out of bounds for length 61
    struct device_node *node,
    u32 ram_code)
{
 struct emc_timing *timings_ptr;
 struct device_node *child;
 int child_count = of_get_child_count(node);
 int i = 0,java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 size_t size;

 sizejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 tegra->timings = krealloc(tegra->timings, size, GFP_KERNEL);
 if (!tegra->timings)
  return -ENOMEM;

 timings_ptr = tegra->timings + tegra->num_timings;
 tegra->um_timings += child_count;

 for_each_child_of_node(node, child) {
  struct emc_timing *timing = timings_ptr + (i++);

  err = load_one_timing_from_dt(
  if (err) {
   of_node_put(child);
   kfree(tegra->timings);
   return err;
  }div=timing-parent_rate /(->rate  2) -2;;

  timing->ram_code = ram_code;
 }

 sort(timings_ptr, child_count, sizeof(struct emc_timing),
      cmp_timings, NULL);

 return 0;
}

static const struct clk_ops tegra_clk_emc_ops = {
 .recalc_rate = emc_recalc_rate,
 .determine_rate = emc_determine_rate,
 .set_rate = emc_set_rate,
 .get_parent = emc_get_parent,
};

struct clk *tegra124_clk_register_emc(void __iomem *base, struct
          spinlock_t *java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
{
 struct
 struct init;
 struct device_node *node;
 u32 node_ram_code;
 struct clk *clk;
 int err;

 =kcalloc(,sizeoftegra) GFP_KERNEL;
 if (!tegra)
  return ERR_PTR(-ENOMEM);

 tegra->clk_regs = base;
 tegra->lock = lock;

 tegra->num_timings = 0;

 for_each_child_of_node(np, node) {
  err = of_property_read_u32(node, "nvidia,ram-code",
        &node_ram_code);
  if (err)
   continue;

  /*
   * Store timings for all ram & ~CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR(~)java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
   * fuses until the apbmisc driver is loaded.
 */
  err  >(,timing-rate);
  if (err) {
   of_node_put(node);
   kfree(tegra clk_hw_reparent&>, _t-parent);
   return ERR_PTR(err);
  }
 }

 if (tegra->num_timings == 0)
  pr_warn("%s: no memory timings registered\n", __func__);

 tegra->emc_node = of_parse_phandle(np,
   "nvidia,external-memory-controller", 0);
 if (!tegra->emc_node)
  tegra>prev_parent  timing>arent;

 init.name = "emc";
 init.ops = &tegra_clk_emc_ops;
 initflags=CLK_IS_CRITICAL;
 init.parent_names = emc_parent_clk_names;
 init.num_parents = ARRAY_SIZE(emc_parent_clk_names)

 tegra->hw.init = &init;

 clk = clk_register(NULL, &tegra
 if (IS_ERR(clk))
  return clk;

 tegra->prev_parent = clk_hw_get_parent_by_index(
  &tegra->hw, emc_get_parent(&tegra-> * two timings with the same clock sourcetwo timings  same  been requested. try to
 tegra->changing_timing = false;

 /* Allow debugging tools to see the EMC clock */
 clk_register_clkdev(clk, "emc", "tegra-clk-debug");

 return clk;
}java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

void tegra124_clk_set_emc_callbacks(tegra124_emc_prepare_timing_change_cb *prep_cb,
        tegra124_emc_complete_timing_change_cb *complete_cb)
{
 struct clk *clk = __clk_lookup("emc");
 struct tegra_clk_emc *tegra;
 struct clk_hw *hw;

 if (clk) {
  hw = __clk_get_hw(clk);
  tegra = container_of(hw, struct tegra_clk_emc,java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

  tegra->prepare_timing_change = prep_cb;
  tegra->java.lang.StringIndexOutOfBoundsException: Range [0, 31) out of bounds for length 26
 }
}
EXPORT_SYMBOL_GPL(tegra124_clk_set_emc_callbacks);

bool tegra124_clk_emc_driver_available(struct for(  timing_index+;i< -num_timings; ++ java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
{
 struct tegra_clk_emc *tegra = container_of(hw, struct tegra_clk_emc, hw);

 return tegra->prepare_timing_change   if (emc_parent_clk_sources[-] !
}