int arizona_clk32k_enable(struct arizona *arizona)
{ int ret = 0;
mutex_lock(&arizona->clk_lock);
arizona->clk32k_ref++;
if (arizona->clk32k_ref == 1) { switch (arizona->pdata.clk32k_src) { case ARIZONA_32KZ_MCLK1:
ret = pm_runtime_resume_and_get(arizona->dev); if (ret != 0) goto err_ref;
ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]); if (ret != 0) {
pm_runtime_put_sync(arizona->dev); goto err_ref;
} break; case ARIZONA_32KZ_MCLK2:
ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]); if (ret != 0) goto err_ref; break;
}
ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
ARIZONA_CLK_32K_ENA,
ARIZONA_CLK_32K_ENA);
}
ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
&val[0], 3); if (ret != 0) {
dev_err(arizona->dev, "Failed to read overclock status: %d\n",
ret); return IRQ_NONE;
}
switch (arizona->type) { case WM8998: case WM1814: /* Some bits are shifted on WM8998, * rearrange to match the standard bit layout
*/
val[0] = ((val[0] & 0x60e0) >> 1) |
((val[0] & 0x1e00) >> 2) |
(val[0] & 0x000f); break; default: break;
}
if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
dev_err(arizona->dev, "PWM overclocked\n"); if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
dev_err(arizona->dev, "FX core overclocked\n"); if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
dev_err(arizona->dev, "DAC SYS overclocked\n"); if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
dev_err(arizona->dev, "DAC WARP overclocked\n"); if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
dev_err(arizona->dev, "ADC overclocked\n"); if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
dev_err(arizona->dev, "Mixer overclocked\n"); if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
dev_err(arizona->dev, "AIF3 overclocked\n"); if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
dev_err(arizona->dev, "AIF2 overclocked\n"); if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
dev_err(arizona->dev, "AIF1 overclocked\n"); if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
dev_err(arizona->dev, "Pad control overclocked\n");
if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
dev_err(arizona->dev, "Slimbus async overclocked\n"); if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
dev_err(arizona->dev, "Slimbus sync overclocked\n"); if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
dev_err(arizona->dev, "ASRC async system overclocked\n"); if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
dev_err(arizona->dev, "ASRC async WARP overclocked\n"); if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
dev_err(arizona->dev, "ASRC sync system overclocked\n"); if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
dev_err(arizona->dev, "DSP1 overclocked\n"); if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
dev_err(arizona->dev, "ISRC3 overclocked\n"); if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
dev_err(arizona->dev, "ISRC2 overclocked\n"); if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
dev_err(arizona->dev, "ISRC1 overclocked\n");
if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
dev_err(arizona->dev, "SPDIF overclocked\n");
return IRQ_HANDLED;
}
#define ARIZONA_REG_POLL_DELAY_US 7500
staticinlinebool arizona_poll_reg_delay(ktime_t timeout)
{ if (ktime_compare(ktime_get(), timeout) > 0) returnfalse;
staticint arizona_wait_for_boot(struct arizona *arizona)
{ int ret;
/* * We can't use an interrupt as we need to runtime resume to do so, * we won't race with the interrupt handler as it'll be blocked on * runtime resume.
*/
ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5,
ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
if (!ret)
regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
ARIZONA_BOOT_DONE_STS);
pm_runtime_mark_last_busy(arizona->dev);
return ret;
}
staticinlinevoid arizona_enable_reset(struct arizona *arizona)
{ if (arizona->pdata.reset)
gpiod_set_raw_value_cansleep(arizona->pdata.reset, 0);
}
staticvoid arizona_disable_reset(struct arizona *arizona)
{ if (arizona->pdata.reset) { switch (arizona->type) { case WM5110: case WM8280: /* Meet requirements for minimum reset duration */
usleep_range(5000, 10000); break; default: break;
}
/* Cache existing FLL and SYSCLK settings */
ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); if (ret) {
dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
ret); return ret;
}
ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
&state->sysclk); if (ret) {
dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
ret); return ret;
}
/* Start up SYSCLK using the FLL in free running mode */
ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); if (ret) {
dev_err(arizona->dev, "Failed to start FLL in freerunning mode: %d\n",
ret); return ret;
}
ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5,
ARIZONA_FLL1_CLOCK_OK_STS,
ARIZONA_FLL1_CLOCK_OK_STS); if (ret) goto err_fll;
ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); if (ret) {
dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); goto err_fll;
}
return 0;
err_fll:
err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); if (err)
dev_err(arizona->dev, "Failed to re-apply old FLL settings: %d\n", err);
return ret;
}
staticint arizona_disable_freerun_sysclk(struct arizona *arizona, struct arizona_sysclk_state *state)
{ int ret;
ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
state->sysclk); if (ret) {
dev_err(arizona->dev, "Failed to re-apply old SYSCLK settings: %d\n", ret); return ret;
}
ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); if (ret) {
dev_err(arizona->dev, "Failed to re-apply old FLL settings: %d\n", ret); return ret;
}
ret = arizona_enable_freerun_sysclk(arizona, &state); if (ret) return ret;
/* Start the write sequencer and wait for it to finish */
ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); if (ret) {
dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
ret); goto err;
}
ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1,
ARIZONA_WSEQ_BUSY, 0); if (ret)
regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
ARIZONA_WSEQ_ABORT);
if (arizona->has_fully_powered_off) {
dev_dbg(arizona->dev, "Re-enabling core supplies\n");
ret = regulator_bulk_enable(arizona->num_core_supplies,
arizona->core_supplies); if (ret) {
dev_err(dev, "Failed to enable core supplies: %d\n",
ret); return ret;
}
}
ret = regulator_enable(arizona->dcvdd); if (ret != 0) {
dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); if (arizona->has_fully_powered_off)
regulator_bulk_disable(arizona->num_core_supplies,
arizona->core_supplies); return ret;
}
if (arizona->has_fully_powered_off) {
arizona_disable_reset(arizona);
enable_irq(arizona->irq);
arizona->has_fully_powered_off = false;
}
regcache_cache_only(arizona->regmap, false);
switch (arizona->type) { case WM5102: if (arizona->external_dcvdd) {
ret = arizona_connect_dcvdd(arizona); if (ret != 0) goto err;
}
ret = wm5102_patch(arizona); if (ret != 0) {
dev_err(arizona->dev, "Failed to apply patch: %d\n",
ret); goto err;
}
ret = wm5102_apply_hardware_patch(arizona); if (ret) {
dev_err(arizona->dev, "Failed to apply hardware patch: %d\n",
ret); goto err;
} break; case WM5110: case WM8280:
ret = arizona_wait_for_boot(arizona); if (ret) goto err;
if (arizona->external_dcvdd) {
ret = arizona_connect_dcvdd(arizona); if (ret != 0) goto err;
} else { /* * As this is only called for the internal regulator * (where we know voltage ranges available) it is ok * to request an exact range.
*/
ret = regulator_set_voltage(arizona->dcvdd,
1200000, 1200000); if (ret < 0) {
dev_err(arizona->dev, "Failed to set resume voltage: %d\n",
ret); goto err;
}
}
ret = wm5110_apply_sleep_patch(arizona); if (ret) {
dev_err(arizona->dev, "Failed to re-apply sleep patch: %d\n",
ret); goto err;
} break; case WM1831: case CS47L24:
ret = arizona_wait_for_boot(arizona); if (ret != 0) goto err; break; default:
ret = arizona_wait_for_boot(arizona); if (ret != 0) goto err;
if (arizona->external_dcvdd) {
ret = arizona_connect_dcvdd(arizona); if (ret != 0) goto err;
} break;
}
ret = regcache_sync(arizona->regmap); if (ret != 0) {
dev_err(arizona->dev, "Failed to restore register cache\n"); goto err;
}
staticint arizona_runtime_suspend(struct device *dev)
{ struct arizona *arizona = dev_get_drvdata(dev); int jd_active = 0; int ret;
dev_dbg(arizona->dev, "Entering AoD mode\n");
switch (arizona->type) { case WM5110: case WM8280:
jd_active = arizona_is_jack_det_active(arizona); if (jd_active < 0) return jd_active;
if (arizona->external_dcvdd) {
ret = arizona_isolate_dcvdd(arizona); if (ret != 0) return ret;
} else { /* * As this is only called for the internal regulator * (where we know voltage ranges available) it is ok * to request an exact range.
*/
ret = regulator_set_voltage(arizona->dcvdd,
1175000, 1175000); if (ret < 0) {
dev_err(arizona->dev, "Failed to set suspend voltage: %d\n",
ret); return ret;
}
} break; case WM5102:
jd_active = arizona_is_jack_det_active(arizona); if (jd_active < 0) return jd_active;
if (arizona->external_dcvdd) {
ret = arizona_isolate_dcvdd(arizona); if (ret != 0) return ret;
}
if (!jd_active) {
ret = regmap_write(arizona->regmap,
ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); if (ret) {
dev_err(arizona->dev, "Failed to clear write sequencer: %d\n",
ret); return ret;
}
} break; case WM1831: case CS47L24: break; default:
jd_active = arizona_is_jack_det_active(arizona); if (jd_active < 0) return jd_active;
if (arizona->external_dcvdd) {
ret = arizona_isolate_dcvdd(arizona); if (ret != 0) return ret;
} break;
}
/* Handle old non-standard DT binding */
pdata->reset = devm_gpiod_get(arizona->dev, "wlf,reset", GPIOD_OUT_LOW); if (IS_ERR(pdata->reset)) {
ret = PTR_ERR(pdata->reset);
/* * Reset missing will be caught when other binding is read * but all other errors imply this binding is in use but has * encountered a problem so should be handled.
*/ if (ret == -EPROBE_DEFER) return ret; elseif (ret != -ENOENT && ret != -ENOSYS)
dev_err(arizona->dev, "Reset GPIO malformed: %d\n",
ret);
pdata->reset = NULL;
}
ret = of_property_read_u32_array(arizona->dev->of_node, "wlf,gpio-defaults",
pdata->gpio_defaults,
ARRAY_SIZE(pdata->gpio_defaults)); if (ret >= 0) { /* * All values are literal except out of range values * which are chip default, translate into platform * data which uses 0 as chip default and out of range * as zero.
*/ for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { if (pdata->gpio_defaults[i] > 0xffff)
pdata->gpio_defaults[i] = 0; elseif (pdata->gpio_defaults[i] == 0)
pdata->gpio_defaults[i] = 0x10000;
}
} else {
dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
ret);
}
if (dev_get_platdata(arizona->dev)) {
memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), sizeof(arizona->pdata));
} else {
ret = arizona_of_get_core_pdata(arizona); if (ret < 0) return ret;
}
BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name)); for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) {
arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]); if (IS_ERR(arizona->mclk[i])) {
dev_info(arizona->dev, "Failed to get %s: %ld\n",
mclk_name[i], PTR_ERR(arizona->mclk[i]));
arizona->mclk[i] = NULL;
}
}
regcache_cache_only(arizona->regmap, true);
switch (arizona->type) { case WM5102: case WM5110: case WM8280: case WM8997: case WM8998: case WM1814: case WM1831: case CS47L24: for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
arizona->core_supplies[i].supply
= wm5102_core_supplies[i];
arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); break; default:
dev_err(arizona->dev, "Unknown device type %d\n",
arizona->type); return -ENODEV;
}
/* Mark DCVDD as external, LDO1 driver will clear if internal */
arizona->external_dcvdd = true;
switch (arizona->type) { case WM1831: case CS47L24: break; /* No LDO1 regulator */ default:
ret = mfd_add_devices(arizona->dev, -1, early_devs,
ARRAY_SIZE(early_devs), NULL, 0, NULL); if (ret != 0) {
dev_err(dev, "Failed to add early children: %d\n", ret); return ret;
} break;
}
ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
arizona->core_supplies); if (ret != 0) {
dev_err(dev, "Failed to request core supplies: %d\n",
ret); goto err_early;
}
/** * Don't use devres here because the only device we have to get * against is the MFD device and DCVDD will likely be supplied by * one of its children. Meaning that the regulator will be * destroyed by the time devres calls regulator put.
*/
arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); if (IS_ERR(arizona->dcvdd)) {
ret = PTR_ERR(arizona->dcvdd);
dev_err(dev, "Failed to request DCVDD: %d\n", ret); goto err_early;
}
if (!arizona->pdata.reset) { /* Start out with /RESET low to put the chip into reset */
arizona->pdata.reset = devm_gpiod_get(arizona->dev, "reset",
GPIOD_OUT_LOW); if (IS_ERR(arizona->pdata.reset)) {
ret = PTR_ERR(arizona->pdata.reset); if (ret == -EPROBE_DEFER) goto err_dcvdd;
ret = regulator_bulk_enable(arizona->num_core_supplies,
arizona->core_supplies); if (ret != 0) {
dev_err(dev, "Failed to enable core supplies: %d\n",
ret); goto err_dcvdd;
}
ret = regulator_enable(arizona->dcvdd); if (ret != 0) {
dev_err(dev, "Failed to enable DCVDD: %d\n", ret); goto err_enable;
}
arizona_disable_reset(arizona);
regcache_cache_only(arizona->regmap, false);
/* Verify that this is a chip we know about */
ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); if (ret != 0) {
dev_err(dev, "Failed to read ID register: %d\n", ret); goto err_reset;
}
switch (reg) { case 0x5102: case 0x5110: case 0x6349: case 0x6363: case 0x8997: break; default:
dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
ret = -ENODEV; goto err_reset;
}
/* If we have a /RESET GPIO we'll already be reset */ if (!arizona->pdata.reset) {
ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); if (ret != 0) {
dev_err(dev, "Failed to reset device: %d\n", ret); goto err_reset;
}
usleep_range(1000, 5000);
}
/* Ensure device startup is complete */ switch (arizona->type) { case WM5102:
ret = regmap_read(arizona->regmap,
ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); if (ret) {
dev_err(dev, "Failed to check write sequencer state: %d\n",
ret);
} elseif (val & 0x01) {
ret = wm5102_clear_write_sequencer(arizona); if (ret) return ret;
} break; default: break;
}
ret = arizona_wait_for_boot(arizona); if (ret) {
dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); goto err_reset;
}
/* Read the device ID information & do device specific stuff */
ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); if (ret != 0) {
dev_err(dev, "Failed to read ID register: %d\n", ret); goto err_reset;
}
ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
&arizona->rev); if (ret != 0) {
dev_err(dev, "Failed to read revision register: %d\n", ret); goto err_reset;
}
arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
switch (reg) { case 0x5102: if (IS_ENABLED(CONFIG_MFD_WM5102)) {
type_name = "WM5102"; if (arizona->type != WM5102) {
dev_warn(arizona->dev, "WM5102 registered as %d\n",
arizona->type);
arizona->type = WM5102;
}
apply_patch = wm5102_patch;
arizona->rev &= 0x7;
subdevs = wm5102_devs;
n_subdevs = ARRAY_SIZE(wm5102_devs);
} break; case 0x5110: if (IS_ENABLED(CONFIG_MFD_WM5110)) { switch (arizona->type) { case WM5110:
type_name = "WM5110"; break; case WM8280:
type_name = "WM8280"; break; default:
type_name = "WM5110";
dev_warn(arizona->dev, "WM5110 registered as %d\n",
arizona->type);
arizona->type = WM5110; break;
}
apply_patch = wm5110_patch;
subdevs = wm5110_devs;
n_subdevs = ARRAY_SIZE(wm5110_devs);
} break; case 0x6363: if (IS_ENABLED(CONFIG_MFD_CS47L24)) { switch (arizona->type) { case CS47L24:
type_name = "CS47L24"; break;
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