enum fm10k_ring_state_t {
__FM10K_TX_DETECT_HANG,
__FM10K_HANG_CHECK_ARMED,
__FM10K_TX_XPS_INIT_DONE, /* This must be last and is used to calculate BITMAP size */
__FM10K_TX_STATE_SIZE__,
};
struct fm10k_ring { struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */ struct net_device *netdev; /* netdev ring belongs to */ struct device *dev; /* device for DMA mapping */ struct fm10k_l2_accel __rcu *l2_accel; /* L2 acceleration list */ void *desc; /* descriptor ring memory */ union { struct fm10k_tx_buffer *tx_buffer; struct fm10k_rx_buffer *rx_buffer;
};
u32 __iomem *tail;
DECLARE_BITMAP(state, __FM10K_TX_STATE_SIZE__);
dma_addr_t dma; /* phys. address of descriptor ring */ unsignedint size; /* length in bytes */
u8 queue_index; /* needed for queue management */
u8 reg_idx; /* holds the special value that gets * the hardware register offset * associated with this ring, which is * different for DCB and RSS modes
*/
u8 qos_pc; /* priority class of queue */
u16 vid; /* default VLAN ID of queue */
u16 count; /* amount of descriptors */
struct fm10k_ring_container { struct fm10k_ring *ring; /* pointer to linked list of rings */ unsignedint total_bytes; /* total bytes processed this int */ unsignedint total_packets; /* total packets processed this int */
u16 work_limit; /* total work allowed per interrupt */
u16 itr; /* interrupt throttle rate value */
u8 itr_scale; /* ITR adjustment based on PCI speed */
u8 count; /* total number of rings in vector */
};
#define FM10K_ITR_MAX 0x0FFF /* maximum value for ITR */ #define FM10K_ITR_10K 100 /* 100us */ #define FM10K_ITR_20K 50 /* 50us */ #define FM10K_ITR_40K 25 /* 25us */ #define FM10K_ITR_ADAPTIVE 0x8000 /* adaptive interrupt moderation flag */
/* iterator for handling rings in ring container */ #define fm10k_for_each_ring(pos, head) \ for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
/* for dynamic allocation of rings associated with this q_vector */ struct fm10k_ring ring[] ____cacheline_internodealigned_in_smp;
};
enum fm10k_ring_f_enum {
RING_F_RSS,
RING_F_QOS,
RING_F_ARRAY_SIZE /* must be last in enum set */
};
struct fm10k_ring_feature {
u16 limit; /* upper limit on feature indices */
u16 indices; /* current value of indices */
u16 mask; /* Mask used for feature to ring mapping */
u16 offset; /* offset to start of feature */
};
/* one work queue for entire driver */ externstruct workqueue_struct *fm10k_workqueue;
/* The following enumeration contains flags which indicate or enable modified * driver behaviors. To avoid race conditions, the flags are stored in * a BITMAP in the fm10k_intfc structure. The BITMAP should be accessed using * atomic *_bit() operations.
*/ enum fm10k_flags_t {
FM10K_FLAG_RESET_REQUESTED,
FM10K_FLAG_RSS_FIELD_IPV4_UDP,
FM10K_FLAG_RSS_FIELD_IPV6_UDP,
FM10K_FLAG_SWPRI_CONFIG, /* __FM10K_FLAGS_SIZE__ is used to calculate the size of * interface->flags and must be the last value in this * enumeration.
*/
__FM10K_FLAGS_SIZE__
};
enum fm10k_state_t {
__FM10K_RESETTING,
__FM10K_RESET_DETACHED,
__FM10K_RESET_SUSPENDED,
__FM10K_DOWN,
__FM10K_SERVICE_SCHED,
__FM10K_SERVICE_REQUEST,
__FM10K_SERVICE_DISABLE,
__FM10K_MACVLAN_SCHED,
__FM10K_MACVLAN_REQUEST,
__FM10K_MACVLAN_DISABLE,
__FM10K_LINK_DOWN,
__FM10K_UPDATING_STATS, /* This value must be last and determines the BITMAP size */
__FM10K_STATE_SIZE__,
};
/* Queueing vectors */ struct fm10k_q_vector *q_vector[MAX_Q_VECTORS]; struct msix_entry *msix_entries; int num_q_vectors; /* current number of q_vectors for device */ struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
/* SR-IOV information management structure */ struct fm10k_iov_data *iov_data;
/* This structure is stored as little endian values as that is the native * format of the Rx descriptor. The ordering of these fields is reversed * from the actual ftag header to allow for a single bswap to take care * of placing all of the values in network order
*/ union fm10k_ftag_info {
__le64 ftag; struct { /* dglort and sglort combined into a single 32bit desc read */
__le32 glort; /* upper 16 bits of VLAN are reserved 0 for swpri_type_user */
__le32 vlan;
} d; struct {
__le16 dglort;
__le16 sglort;
__le16 vlan;
__le16 swpri_type_user;
} w;
};
struct fm10k_cb { union {
__le64 tstamp; unsignedlong ts_tx_timeout;
}; union fm10k_ftag_info fi;
};
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