val = mt76_rr(dev, base + MT_EFUSE_CTRL);
val &= ~(MT_EFUSE_CTRL_AIN | MT_EFUSE_CTRL_MODE);
val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf);
val |= MT_EFUSE_CTRL_KICK;
mt76_wr(dev, base + MT_EFUSE_CTRL, val);
if (!mt76_poll(dev, base + MT_EFUSE_CTRL, MT_EFUSE_CTRL_KICK, 0, 1000)) return -ETIMEDOUT;
udelay(2);
val = mt76_rr(dev, base + MT_EFUSE_CTRL); if ((val & MT_EFUSE_CTRL_AOUT) == MT_EFUSE_CTRL_AOUT ||
WARN_ON_ONCE(!(val & MT_EFUSE_CTRL_VALID))) {
memset(data, 0x0, 16); return 0;
}
for (i = 0; i < 4; i++) {
val = mt76_rr(dev, base + MT_EFUSE_RDATA(i));
put_unaligned_le32(val, data + 4 * i);
}
return 0;
}
staticint mt7615_efuse_init(struct mt7615_dev *dev, u32 base)
{ int i, len = MT7615_EEPROM_SIZE; void *buf;
u32 val;
if (is_mt7663(&dev->mt76))
len = MT7663_EEPROM_SIZE;
val = mt76_rr(dev, base + MT_EFUSE_BASE_CTRL); if (val & MT_EFUSE_BASE_CTRL_EMPTY) return 0;
if (chan->band == NL80211_BAND_2GHZ) return MT7663_EE_TX0_2G_TARGET_POWER + (chain_idx << 4);
group = mt7615_get_channel_group(chan->hw_value); if (chain_idx == 1)
index = MT7663_EE_TX1_5G_G0_TARGET_POWER; else
index = MT7663_EE_TX0_5G_G0_TARGET_POWER;
return index + group * 3;
}
int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev, struct ieee80211_channel *chan,
u8 chain_idx)
{ int index;
if (is_mt7663(&dev->mt76)) return mt7663_eeprom_get_target_power_index(dev, chan,
chain_idx);
if (chain_idx > 3) return -EINVAL;
/* TSSI disabled */ if (mt7615_ext_pa_enabled(dev, chan->band)) { if (chan->band == NL80211_BAND_2GHZ) return MT_EE_EXT_PA_2G_TARGET_POWER; else return MT_EE_EXT_PA_5G_TARGET_POWER;
}
/* TSSI enabled */ if (chan->band == NL80211_BAND_2GHZ) {
index = MT_EE_TX0_2G_TARGET_POWER + chain_idx * 6;
} else { int group = mt7615_get_channel_group(chan->hw_value);
switch (chain_idx) { case 1:
index = MT_EE_TX1_5G_G0_TARGET_POWER; break; case 2:
index = MT_EE_TX2_5G_G0_TARGET_POWER; break; case 3:
index = MT_EE_TX3_5G_G0_TARGET_POWER; break; case 0: default:
index = MT_EE_TX0_5G_G0_TARGET_POWER; break;
}
index += 5 * group;
}
return index;
}
int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev, enum nl80211_band band)
{ /* assume the first rate has the highest power offset */ if (is_mt7663(&dev->mt76)) { if (band == NL80211_BAND_2GHZ) return MT_EE_TX0_5G_G0_TARGET_POWER; else return MT7663_EE_5G_RATE_POWER;
}
if (band == NL80211_BAND_2GHZ) return MT_EE_2G_RATE_POWER; else return MT_EE_5G_RATE_POWER;
}
if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp")) return;
switch (mt76_chip(&dev->mt76)) { case 0x7622:
mt7622_apply_cal_free_data(dev); break; case 0x7615: case 0x7611:
mt7615_apply_cal_free_data(dev); break;
}
}
int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr)
{ int ret;
ret = mt7615_eeprom_load(dev, addr); if (ret < 0) return ret;
ret = mt7615_check_eeprom(&dev->mt76); if (ret && dev->mt76.otp.data) {
memcpy(dev->mt76.eeprom.data, dev->mt76.otp.data,
dev->mt76.otp.size);
} else {
dev->flash_eeprom = true;
mt7615_cal_free_data(dev);
}
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