/* The chip reads 16bits of data at time and place them directly into (little endian) CPU register. * So, the chip expects bytes order to be "B1 B0 B3 B2" (while LE is "B0 B1 B2 B3" and BE is * "B3 B2 B1 B0") * * A little endian host with bits_per_word == 16 should do the right job natively. The code below to * support big endian host and commonly used SPI 8bits.
*/ staticint wfx_spi_copy_from_io(void *priv, unsignedint addr, void *dst, size_t count)
{ struct wfx_spi_priv *bus = priv;
u16 regaddr = (addr << 12) | (count / 2) | SET_READ; struct spi_message m; struct spi_transfer t_addr = {
.tx_buf = ®addr,
.len = sizeof(regaddr),
}; struct spi_transfer t_msg = {
.rx_buf = dst,
.len = count,
};
u16 *dst16 = dst; int ret, i;
WARN(count % 2, "buffer size must be a multiple of 2");
cpu_to_le16s(®addr); if (bus->need_swab)
swab16s(®addr);
spi_message_init(&m);
spi_message_add_tail(&t_addr, &m);
spi_message_add_tail(&t_msg, &m);
ret = spi_sync(bus->func, &m);
if (bus->need_swab && addr == WFX_REG_CONFIG) for (i = 0; i < count / 2; i++)
swab16s(&dst16[i]); return ret;
}
WARN(count % 2, "buffer size must be a multiple of 2");
WARN(regaddr & SET_READ, "bad addr or size overflow");
cpu_to_le16s(®addr);
/* Register address and CONFIG content always use 16bit big endian * ("BADC" order)
*/ if (bus->need_swab)
swab16s(®addr); if (bus->need_swab && addr == WFX_REG_CONFIG) for (i = 0; i < count / 2; i++)
swab16s(&src16[i]);
spi_message_init(&m);
spi_message_add_tail(&t_addr, &m);
spi_message_add_tail(&t_msg, &m);
ret = spi_sync(bus->func, &m);
if (bus->need_swab && addr == WFX_REG_CONFIG) for (i = 0; i < count / 2; i++)
swab16s(&src16[i]); return ret;
}
if (!func->bits_per_word)
func->bits_per_word = 16;
ret = spi_setup(func); if (ret) return ret;
pdata = (struct wfx_platform_data *)spi_get_device_id(func)->driver_data; if (!pdata) {
dev_err(&func->dev, "unable to retrieve driver data (please report)\n"); return -ENODEV;
}
/* Trace below is also displayed by spi_setup() if compiled with DEBUG */
dev_dbg(&func->dev, "SPI params: CS=%d, mode=%d bits/word=%d speed=%d\n",
spi_get_chipselect(func, 0), func->mode, func->bits_per_word, func->max_speed_hz); if (func->bits_per_word != 16 && func->bits_per_word != 8)
dev_warn(&func->dev, "unusual bits/word value: %d\n", func->bits_per_word); if (func->max_speed_hz > 50000000)
dev_warn(&func->dev, "%dHz is a very high speed\n", func->max_speed_hz);
bus = devm_kzalloc(&func->dev, sizeof(*bus), GFP_KERNEL); if (!bus) return -ENOMEM;
bus->func = func; if (func->bits_per_word == 8 || IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
bus->need_swab = true;
spi_set_drvdata(func, bus);
bus->gpio_reset = devm_gpiod_get_optional(&func->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(bus->gpio_reset)) return PTR_ERR(bus->gpio_reset); if (!bus->gpio_reset) {
dev_warn(&func->dev, "gpio reset is not defined, trying to load firmware anyway\n");
} else {
gpiod_set_consumer_name(bus->gpio_reset, "wfx reset");
gpiod_set_value_cansleep(bus->gpio_reset, 1);
usleep_range(100, 150);
gpiod_set_value_cansleep(bus->gpio_reset, 0);
usleep_range(2000, 2500);
}
bus->core = wfx_init_common(&func->dev, pdata, &wfx_spi_hwbus_ops, bus); if (!bus->core) return -EIO;
/* For dynamic driver binding, kernel does not use OF to match driver. It only * use modalias and modalias is a copy of 'compatible' DT node with vendor * stripped.
*/ staticconststruct spi_device_id wfx_spi_id[] = {
{ "wf200", (kernel_ulong_t)&pdata_wf200 },
{ "brd4001a", (kernel_ulong_t)&pdata_brd4001a },
{ "brd8022a", (kernel_ulong_t)&pdata_brd8022a },
{ "brd8023a", (kernel_ulong_t)&pdata_brd8023a },
{ },
};
MODULE_DEVICE_TABLE(spi, wfx_spi_id);
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