/* * On BD71828 and BD71815 the ALM0 MASK is 14 bytes after the ALM0 * block start
*/ #define BD718XX_ALM_EN_OFFSET 14
/* * We read regs RTC_SEC => RTC_YEAR * this struct is ordered according to chip registers. * Keep it u8 only (or packed) to avoid padding issues.
*/ struct bd70528_rtc_day {
u8 sec;
u8 min;
u8 hour;
} __packed;
staticinlinevoid tm2rtc(struct rtc_time *t, struct bd70528_rtc_data *r)
{
r->day &= ~BD70528_MASK_RTC_DAY;
r->week &= ~BD70528_MASK_RTC_WEEK;
r->month &= ~BD70528_MASK_RTC_MONTH; /* * PM and 24H bits are not used by Wake - thus we clear them * here and not in tmday2rtc() which is also used by wake.
*/
r->time.hour &= ~(BD70528_MASK_RTC_HOUR_PM | BD70528_MASK_RTC_HOUR_24H);
tmday2rtc(t, &r->time); /* * We do always set time in 24H mode.
*/
r->time.hour |= BD70528_MASK_RTC_HOUR_24H;
r->day |= bin2bcd(t->tm_mday);
r->week |= bin2bcd(t->tm_wday);
r->month |= bin2bcd(t->tm_mon + 1);
r->year = bin2bcd(t->tm_year - 100);
}
staticinlinevoid rtc2tm(struct bd70528_rtc_data *r, struct rtc_time *t)
{
t->tm_sec = bcd2bin(r->time.sec & BD70528_MASK_RTC_SEC);
t->tm_min = bcd2bin(r->time.min & BD70528_MASK_RTC_MINUTE);
t->tm_hour = bcd2bin(r->time.hour & BD70528_MASK_RTC_HOUR); /* * If RTC is in 12H mode, then bit BD70528_MASK_RTC_HOUR_PM * is not BCD value but tells whether it is AM or PM
*/ if (!(r->time.hour & BD70528_MASK_RTC_HOUR_24H)) {
t->tm_hour %= 12; if (r->time.hour & BD70528_MASK_RTC_HOUR_PM)
t->tm_hour += 12;
}
t->tm_mday = bcd2bin(r->day & BD70528_MASK_RTC_DAY);
t->tm_mon = bcd2bin(r->month & BD70528_MASK_RTC_MONTH) - 1;
t->tm_year = 100 + bcd2bin(r->year & BD70528_MASK_RTC_YEAR);
t->tm_wday = bcd2bin(r->week & BD70528_MASK_RTC_WEEK);
}
/* read the RTC date and time registers all at once */
ret = regmap_bulk_read(r->regmap, r->reg_time_start, &rtc_data, sizeof(rtc_data)); if (ret) {
dev_err(dev, "Failed to read RTC time (err %d)\n", ret); return ret;
}
switch (chip) { case ROHM_CHIP_TYPE_BD71815:
bd_rtc->reg_time_start = BD71815_REG_RTC_START;
/* * See also BD718XX_ALM_EN_OFFSET: * This works for BD71828 and BD71815 as they have same offset * between ALM0 start and ALM0_MASK. If new ICs are to be * added this requires proper check as ALM0_MASK is not located * at the end of ALM0 block - but after all ALM blocks so if * amount of ALMs differ the offset to enable/disable is likely * to be incorrect and enable/disable must be given as own * reg address here.
*/
bd_rtc->bd718xx_alm_block_start = BD71815_REG_RTC_ALM_START;
hour_reg = BD71815_REG_HOUR; break; case ROHM_CHIP_TYPE_BD71828:
bd_rtc->reg_time_start = BD71828_REG_RTC_START;
bd_rtc->bd718xx_alm_block_start = BD71828_REG_RTC_ALM_START;
hour_reg = BD71828_REG_RTC_HOUR; break; default:
dev_err(&pdev->dev, "Unknown chip\n"); return -ENOENT;
}
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