for (i = 0; i < ARRAY_SIZE(asv->subsys); i++) { if (of_device_is_compatible(cpu->of_node,
asv->subsys[i].cpu_dt_compat)) {
subsys = &asv->subsys[i]; break;
}
} if (!subsys) return -EINVAL;
for (i = 0; i < subsys->table.num_rows; i++) { unsignedint new_volt, volt; int ret;
opp_table = dev_pm_opp_get_opp_table(cpu); if (IS_ERR(opp_table)) continue;
if (!last_opp_table || opp_table != last_opp_table) {
last_opp_table = opp_table;
ret = exynos_asv_update_cpu_opps(asv, cpu); if (!ret) { /* *UpdateEMpowervaluessinceOPP *voltagevaluesmayhavechanged.
*/
em_dev_update_chip_binning(cpu);
} else {
dev_err(asv->dev, "Couldn't udate OPPs for cpu%d\n",
cpuid);
}
}
dev_pm_opp_put_opp_table(opp_table);
}
return0;
}
int exynos_asv_init(struct device *dev, struct regmap *regmap)
{ int (*probe_func)(struct exynos_asv *asv); struct exynos_asv *asv; struct device *cpu_dev;
u32 product_id = 0; int ret, i;
asv = devm_kzalloc(dev, sizeof(*asv), GFP_KERNEL); if (!asv) return -ENOMEM;
asv->chipid_regmap = regmap;
asv->dev = dev;
ret = regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_PRO_ID,
&product_id); if (ret < 0) {
dev_err(dev, "Cannot read revision from ChipID: %d\n", ret); return -ENODEV;
}
switch (product_id & EXYNOS_MASK) { case0xE5422000:
probe_func = exynos5422_asv_init; break; default:
dev_dbg(dev, "No ASV support for this SoC\n");
devm_kfree(dev, asv); return0;
}
cpu_dev = get_cpu_device(0);
ret = dev_pm_opp_get_opp_count(cpu_dev); if (ret < 0) return -EPROBE_DEFER;
ret = of_property_read_u32(dev->of_node, "samsung,asv-bin",
&asv->of_bin); if (ret < 0)
asv->of_bin = -EINVAL;
for (i = 0; i < ARRAY_SIZE(asv->subsys); i++)
asv->subsys[i].asv = asv;
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