/* * CSRs definitions (base address offsets + width) * * The definitions below are true for LiteX SoC configured for 8-bit CSR Bus, * 32-bit aligned. * * Supporting other configurations might require new definitions or a more * generic way of indexing the LiteX CSRs. * * For more details on how CSRs are defined and handled in LiteX, see comments * in the LiteX SoC Driver: drivers/soc/litex/litex_soc_ctrl.c
*/ #define OFF_RXTX 0x00 #define OFF_TXFULL 0x04 #define OFF_RXEMPTY 0x08 #define OFF_EV_STATUS 0x0c #define OFF_EV_PENDING 0x10 #define OFF_EV_ENABLE 0x14
/* * if polling, the context would be "in_serving_softirq", so use * irq[save|restore] spin_lock variants to cover all possibilities
*/
uart_port_lock_irqsave(port, &flags);
isr = litex_read8(port->membase + OFF_EV_PENDING) & uart->irq_reg; if (isr & EV_RX)
liteuart_rx_chars(port); if (isr & EV_TX)
liteuart_tx_chars(port);
uart_port_unlock_irqrestore(port, flags);
staticunsignedint liteuart_tx_empty(struct uart_port *port)
{ /* not really tx empty, just checking if tx is not full */ if (!litex_read8(port->membase + OFF_TXFULL)) return TIOCSER_TEMT;
return 0;
}
staticvoid liteuart_set_mctrl(struct uart_port *port, unsignedint mctrl)
{ /* modem control register is not present in LiteUART */
}
staticvoid liteuart_config_port(struct uart_port *port, int flags)
{ /* * Driver core for serial ports forces a non-zero value for port type. * Write an arbitrary value here to accommodate the serial core driver, * as ID part of UAPI is redundant.
*/
port->type = 1;
}
uart = devm_kzalloc(&pdev->dev, sizeof(struct liteuart_port), GFP_KERNEL); if (!uart) return -ENOMEM;
port = &uart->port;
/* get membase */
port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); if (IS_ERR(port->membase)) return PTR_ERR(port->membase);
ret = platform_get_irq_optional(pdev, 0); if (ret < 0 && ret != -ENXIO) return ret; if (ret > 0)
port->irq = ret;
/* look for aliases; auto-enumerate for free index if not found */
dev_id = of_alias_get_id(pdev->dev.of_node, "serial"); if (dev_id < 0)
limit = XA_LIMIT(0, CONFIG_SERIAL_LITEUART_MAX_PORTS); else
limit = XA_LIMIT(dev_id, dev_id);
ret = xa_alloc(&liteuart_array, &dev_id, uart, limit, GFP_KERNEL); if (ret) return ret;
/* values not from device tree */
port->dev = &pdev->dev;
port->iotype = UPIO_MEM;
port->flags = UPF_BOOT_AUTOCONF;
port->ops = &liteuart_ops;
port->fifosize = 16;
port->type = PORT_UNKNOWN;
port->line = dev_id;
spin_lock_init(&port->lock);
platform_set_drvdata(pdev, port);
ret = uart_add_one_port(&liteuart_driver, &uart->port); if (ret) goto err_erase_id;
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