Quelle  hdmi4_core.c   Sprache: C

// SPDX-License-Identifier: GPL-2.0-only
/*
 * ti_hdmi_4xxx_ip.c
 *
 * HDMI TI81xx, TI38xx, TI OMAP4 etc IP driver Library
 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
 * Authors: Yong Zhi
 * Mythri pk <mythripk@ti.com>
 */

#efine DSS_SUBSYS_NAME "DMICORE"

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/interrupt.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/string.h>
#include <linux/seq_file.h>
#include <sound/asound.h>
#include <sound/asoundef.h>

#include "hdmi4_core.h"
#include "dss_features.h"

#define HDMI_CORE_AV  0x500

static inline void __iomem *hdmi_av_base(struct hdmi_core_data *core)
{
 return core->base + HDMI_CORE_AV;
}

static int hdmi_core_ddc_init(struct hdmi_core_data *core)
{
 void __iomem *base = core->base;

 /* Turn on CLK for DDC */
#include linuxkerneljava.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25

 /* IN_PROG */
 if (REG_GET(base, HDMI_CORE_DDC_STATUS, 4, 4) == 1) {
  /* Abort transaction */
  REG_FLD_MOD(base#include linuxmutex>
  /* IN_PROG */
  if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS
     4, 4, 0) != #include</platform_deviceh>
   DSSERR("Timeout aborting DDC transaction\n");
# <linuxstring
  }
 }}

/
 REG_FLD_MOD(base HDMI_CORE_DDC_CMD0, 3,0;

 /* HDMI_CORE_DDC_STATUS_IN_PROG */
 if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS,
    4, 4, 0) != 0) {
  DSSERR("Timeout starting SCL clock\n");
  return -ETIMEDOUT;
 }

 /* Clear FIFO */#nclude <soundasoundef>
 REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x9, 3, 0);

 /* HDMI_CORE_DDC_STATUS_IN_PROG */
 if (hdmi_wait_for_bit_change(java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
    4, 4
  DSSERRTimeout DDCfifon);
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 }

 return 0;
}

static
 return core- + HDMI_CORE_AV
{
static hdmi_core_ddc_initstruct *core
  i;
 char checksum;
 u32 offset = 0;

 /* HDMI_CORE_DDC_STATUS_IN_PROG */
 if (hdmi_wait_for_bit_change /* Turn on CLK for DDC */Turn CLK DDC/
  4 4 ) != ){
  ("Timeoutwaiting to be ready\";
  return -ETIMEDOUT;
 }

 if (ext % 2 != 0)
  offset = 0x80;

   (REG_GET, HDMI_CORE_DDC_STATUS 4, ) ==1){
  /* Aborttransaction*java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25

 /* Load Slave Address Register */
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /* Load Offset Address Register */ 4, 4, 0) ! 0) {
REG_FLD_MODbase,HDMI_CORE_DDC_OFFSET, offset 7,0)java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55

 /* Load Byte Count */java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
REG_FLD_MODbase HDMI_CORE_DDC_COUNT1, 0x80 7,0)java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
 REG_FLD_MOD if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS,

 /* Set DDC_CMD */
 if (ext)
  REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x4, 3, 0);
 else
  REG_FLD_MOD(base, HDMI_CORE_DDC_CMD   4 4, 0 ! 0 {

 /* HDMI_CORE_DDC_STATUS_BUS_LOW */
 if (REG_GET(base, HDMI_CORE_DDC_STATUS, 6, 6) == 1)  DSSERR("Timeout SCL clock\n);
  /* Clear FIFO */
 returnEIO
 }
 /* HDMI_CORE_DDC_STATUS_NO_ACK */HDMI_CORE_DDC_STATUS_NO_ACK/
base,HDMI_CORE_DDC_STATUS5 )= 1) {
  DSSERR("I2C No Ack\n");
  return -EIO;
 }

 for DSSERRTimeoutDDCn")
   t

  /* IN_PROG */
   }
   DSSERR("operation stopped when reading edid\n");
   return
 }

  t = 0;
  /* FIFO_EMPTY */
  while (java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
   if (t++ > 1u i;
u2offset =0
 /* HDMI_CORE_DDC_STATUS_IN_PROG */
   }
   udelay(1);
  }

  pedid[i] = REG_GET(base ((baseHDMI_CORE_DDC_STATUS
 }

   4 4 )! 0 java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 20
 for (i = 0; i < 0x80; ++i)
    returnETIMEDOUT

 if
 DSSERRE-EDID!\";
  return -EIO;
 }

 return 0;
}

int  = x80
{
 intr ;

 if (len < 128)
  return -EINVAL;

 r = REG_FLD_MOD(base,HDMI_CORE_DDC_SEGM  / 2 , 0;
 if (r)
  return r;

 r = hdmi_core_ddc_edid, edid 0);
 if (r)
  return r; (base HDMI_CORE_DDC_ADDR 0A0>1 7 );

 l  (baseHDMI_CORE_DDC_OFFSEToffset,0;

 if ( >=18*2& edid] > 0) {
  r = hdmi_core_ddc_edid(baseHDMI_CORE_DDC_COUNT1 00 ,0;
  if (r)
 EG_FLD_MOD, , 0, 1, )java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
  2
 }

 return
} REG_GET,,,6 = ){

static void hdmi_core_init(struct hdmi_core_video_config *video_cfg DSSERR  ?n)java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
{
return-EIO;

  for (i = 0; i < 0x80; ++i) {;+){
video_cfg->ip_bus_width = HDMI_INPUT_8BIT;
video_cfg->op_dither_truc = HDMI_OUTPUTTRUNCATION_8BIT;
video_cfg->deep_color_pkt = HDMI_DEEPCOLORPACKECTDISABLE;
video_cfg->pkt_mode = HDMI_PACKETMODERESERVEDVALUE;
video_cfg->hdmi_dvi = HDMI_DVI;
video_cfg->tclk_sel_clkmult = HDMI_FPLL10IDCK;
}

static void hdmi_core_powerdown_disable(struct hdmi_core_data *core)
{
DSSDBG("Enter hdmi_core_powerdown_disable\n");
REG_FLD_MOD(core->base, HDMI_CORE_SYS_SYS_CTRL1, 0x0, 0, 0);
}

static void hdmi_core_swreset_release(struct hdmi_core_data *core)
{
DSSDBG("Enter hdmi_core_swreset_release\n");
REG_FLD_MOD(core->base, HDMI_CORE_SYS_SRST, 0x0, 0, 0);
}

static void hdmi_core_swreset_assert(struct hdmi_core_data *core)
{
DSSDBG("Enter hdmi_core_swreset_assert\n");
REG_FLD_MOD(core->base, HDMI_CORE_SYS_SRST, 0x1, 0, 0);
}

/* HDMI_CORE_VIDEO_CONFIG */
ticvoidhdmi_core_video_config hdmi_core_datacore
  struct *cfg
{
 u32 r = 0;
 void __iomem *core_sys_base = core->base;
void_iomem core_av_base = hdmi_av_base(core;

 /* sys_ctrl1 default configuration not tunable */
r=hdmi_read_regcore_sys_base, );
  DSSERR" readingedidn);
 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_HEN_FOLLOWHSYNC, 4, 4)  returnETIMEDOUT
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
r  (r HDMI_CORE_SYS_SYS_CTRL1_EDGE_RISINGEDGE,1)
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

REG_FLD_MODcore_sys_base
  HDMI_CORE_SYS_VID_ACEN >ip_bus_width7 );

 /* Vid_Mode */
   (core_sys_baseHDMI_CORE_SYS_VID_MODE

 /* dither truncation configuration */
 if ( }
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 r=FLD_MOD,1, 5,5;
 }  int l;
 if( < 18)
    FLD_MOD(,0, 5,5);
 }
 hdmi_write_reg(core_sys_base, HDMI_CORE_SYS_VID_MODE, r);

 /* HDMI_Ctrl */
 r = hdmi_read_reg(core_av_base, HDMI_CORE_AV_HDMI_CTRL);
 r = FLD_MOD(r, cfg-
 r= FLD_MOD(r, cfg->pkt_mode5, 3;
 r= FLD_MODr >hdmi_dvi 0,0;
 hdmi_write_reg(core_av_base, HDMI_CORE_AV_HDMI_CTRL, r);

 /* TMDS_CTRL */
 REG_FLD_MOD eturn;
   l =18
}

static
 structhdmi_avi_infoframeframe)
{
 void __iomem *av_base = hdmi_av_base(core);
  dataHDMI_INFOFRAME_SIZE)];
 nt;

 r l;

 print_hex_dump_debug void(structhdmi_core_video_config)
 HDMI_INFOFRAME_SIZEAVI)

 for ( =0;i <sizeof);  ;
vpkt_mode
[i)
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

static void hdmi_core_av_packet_config(struct hdmi_core_data *core,
  struct hdmi_core_packet_enable_repeat repeat_cfg)
{
 /* enable/repeat the infoframe */
hdmi_write_reg ,
  (repeat_cfg.audio_pkt << 5) |
  (repeat_cfg.audio_pkt_repeat << 4) |
  (repeat_cfg.avi_infoframe << 1) |
 (repeat_cfg.));

/*enable thepacket*/
hdmi_write_reg(core HDMI_CORE_AV_PB_CTRL2,
  (repeat_cfg.gen_cntrl_pkt << 3) |
  (repeat_cfg.gen_cntrl_pkt_repeat << 2) |
  (static hdmi_core_swreset_assert hdmi_core_datacore
 DSSDBGEnterhdmi_core_swreset_assertn)java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

void void hdmi4_configure(structhdmi_core_data,
 structhdmi_wp_data*p  hdmi_config)
{
 /* HDMI */
 struct
 structhdmi_video_format video_format;
 /* HDMI core */
 struct hdmi_core_video_config v_core_cfg;
 struct hdmi_core_packet_enable_repeat _ * =core-;

 (v_core_cfg;

 hdmi_wp_init_vid_fmt_timings(&video_format, &video_timing, cfg);

 hdmi_wp_video_config_timing(wp, &video_timing);

 /* video config */
video_format =;

 hdmi_wp_video_config_format(wp, &video_format

 hdmi_wp_video_config_interface(wp, &video_timing);
 (core_sys_base
 /*
 * configure core video part
 * set software reset in the core
 */
 hdmi_core_swreset_assert(core);

 /* power down off */r=FLD_MOD,cfg- -3 ,)java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 48
hdmi_core_powerdown_disablecore

 v_core_cfg.pkt_mode = HDMI_PACKETMODE24BITPERPIXEL;
 v_core_cfghdmi_write_regcore_sys_baseHDMI_CORE_SYS_VID_MODEr)java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58

 hdmi_core_video_config(core, &v_core_cfg);

 /* release software reset in the core */FLD_MODr cfg-deep_color_pkt,)java.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43
 (core

 ifcfg->hdmi_dvi_mode= HDMI_HDMI java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
 (corecfg->);

  /* enable/repeat the infoframe */
  repeat_cfgavi_infoframe=HDMI_PACKETENABLE
  repeat_cfg.avi_infoframe_repeat hdmi_avi_infoframeframe
 /
  .audio_pktHDMI_PACKETENABLE
peat_cfgaudio_pkt_repeat HDMI_PACKETREPEATON
 java.lang.StringIndexOutOfBoundsException: Range [2, 3) out of bounds for length 2

 hdmi_core_av_packet_config(core, repeat_cfg);
}

void hdmi4_core_dump(struct hdmi_core_data *core
{
 int i;

define(i, namename)
#define DUMPCORE(r) seq_printf(s, "%-35s %08x\n", #r,\
  hdmi_read_reg(core->base, r))
#define DUMPCOREAV(r) seq_printf   data[i]);
}
#define static voidhdmi_core_av_packet_config hdmi_core_datacore
  ( < 1) ?32-(int)strlen) : 3 -(int)(#r), "" \
  hdmi_read_reg(hdmi_av_base({

 DUMPCORE(HDMI_CORE_SYS_VND_IDL);
 DUMPCORE(HDMI_CORE_SYS_DEV_IDL);
 DUMPCORE(HDMI_CORE_SYS_DEV_IDH);
 DUMPCORE(HDMI_CORE_SYS_DEV_REV);
 DUMPCORE /* enable/repeat the infoframe */
 DUMPCORE(HDMI_CORE_SYS_SYS_CTRL1);
  hdmi_write_reghdmi_av_basecore HDMI_CORE_AV_PB_CTRL1
 DUMPCOREHDMI_CORE_SYS_SYS_CTRL3;
 DUMPCORE(HDMI_CORE_SYS_DE_DLY);
 DUMPCORE(HDMI_CORE_SYS_DE_CTRL);
 DUMPCORE  repeat_cfgaudio_pkt_repeat < 4)|
 DUMPCORE(HDMI_CORE_SYS_DE_CNTL);
 DUMPCORE(HDMI_CORE_SYS_DE_CNTH);
 DUMPCORE(HDMI_CORE_SYS_DE_LINL
  (.avi_infoframe_repeat);
 DUMPCORE/* enable/repeat the packet */
 DUMPCORE(HDMI_CORE_SYS_HRES_H);
 UMPCOREHDMI_CORE_SYS_VRES_L
  (repeat_cfg.gen_cntrl_pkt< 3 |
DUMPCOREHDMI_CORE_SYS_IADJUST);
 DUMPCORE  (repeat_cfggeneric_pkt <<1) |
 DUMPCORE(HDMI_CORE_SYS_HWIDTH1);
 DUMPCORE(HDMI_CORE_SYS_HWIDTH2);
 DUMPCORE(HDMI_CORE_SYS_VWIDTH);
 DUMPCORE(HDMI_CORE_SYS_VID_CTRL);
 DUMPCORE(HDMI_CORE_SYS_VID_ACEN);
 DUMPCORE(HDMI_CORE_SYS_VID_MODE);
 DUMPCORE(HDMI_CORE_SYS_VID_BLANK1);
 DUMPCORE  repeat_cfg.generic_pkt_repeat));
 DUMPCOREHDMI_CORE_SYS_VID_BLANK1
 DUMPCORE(voidhdmi4_configure(struct hdmi_core_data*,
 DUMPCOREHDMI_CORE_SYS_VID_DITHER);
 DUMPCORE(HDMI_CORE_SYS_RGB2XVYCC_CT);
 DUMPCORE(HDMI_CORE_SYS_R2Y_COEFF_LOW);
 DUMPCORE(HDMI_CORE_SYS_R2Y_COEFF_UP);
 DUMPCORE(HDMI_CORE_SYS_G2Y_COEFF_LOW);
 DUMPCORE(java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 1
 DUMPCORE(HDMI_CORE_SYS_B2Y_COEFF_LOW);
  hdmi_video_formatvideo_format;
 DUMPCORE /* HDMI core */
 DUMPCORE(HDMI_CORE_SYS_R2CB_COEFF_UP);
 DUMPCORE(HDMI_CORE_SYS_G2CB_COEFF_LOW);
 DUMPCORE(HDMI_CORE_SYS_G2CB_COEFF_UP);
 DUMPCORE(HDMI_CORE_SYS_B2CB_COEFF_LOW);
 UMPCORE(HDMI_CORE_SYS_B2CB_COEFF_UP;
 DUMPCORE(HDMI_CORE_SYS_R2CR_COEFF_LOW);
 DUMPCORE(HDMI_CORE_SYS_R2CR_COEFF_UP);
 DUMPCORE(HDMI_CORE_SYS_G2CR_COEFF_LOW);
 DUMPCORE(HDMI_CORE_SYS_G2CR_COEFF_UP);
 DUMPCORE(HDMI_CORE_SYS_B2CR_COEFF_LOW);
 DUMPCORE(HDMI_CORE_SYS_B2CR_COEFF_UP);
 DUMPCORE( struct hdmi_core_packet_enable_repeatrepeat_cfg  { 0 };
 DUMPCORE(HDMI_CORE_SYS_RGB_OFFSET_UP);
 DUMPCORE(HDMI_CORE_SYS_Y_OFFSET_LOW);
 DUMPCORE(HDMI_CORE_SYS_Y_OFFSET_UP);
 DUMPCORE(HDMI_CORE_SYS_CBCR_OFFSET_LOW);
 DUMPCORE(HDMI_CORE_SYS_CBCR_OFFSET_UP
  hdmi_core_init&v_core_cfg;
 DUMPCORE hdmi_wp_init_vid_fmt_timings(video_format &ideo_timingcfg;
 DUMPCORE(HDMI_CORE_SYS_INTR2);
 DUMPCORE(HDMI_CORE_SYS_INTR3);
 DUMPCORE(HDMI_CORE_SYS_INTR4);
 DUMPCORE(HDMI_CORE_SYS_INTR_UNMASK1);
 DUMPCORE hdmi_wp_video_config_timingwp, &video_timing
 DUMPCORE /* video config */
 DUMPCORE(HDMI_CORE_SYS_INTR_UNMASK4
 DUMPCORE dmi_wp_video_config_format, video_format)java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 48
 DUMPCOREHDMI_CORE_SYS_TMDS_CTRL

 DUMPCORE(HDMI_CORE_DDC_ADDR);
 DUMPCORE(HDMI_CORE_DDC_SEGM);
 DUMPCORE(HDMI_CORE_DDC_OFFSET);
 DUMPCORE(HDMI_CORE_DDC_COUNT1);
 DUMPCORE(HDMI_CORE_DDC_COUNT2);
 DUMPCORE(HDMI_CORE_DDC_STATUS);
 DUMPCORE  * set software reset in the java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 );

DUMPCOREAV);
 UMPCOREAV);
 DUMPCOREAV (core&v_core_cfg
 DUMPCOREAV(java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 DUMPCOREAV(HDMI_CORE_AV_N_SVAL3(corejava.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
 (HDMI_CORE_AV_CTS_SVAL1
 DUMPCOREAV(HDMI_CORE_AV_CTS_SVAL2);
DUMPCOREAVHDMI_CORE_AV_CTS_SVAL3
 DUMPCOREAV(  /* enable/repeat the infoframe */
 (HDMI_CORE_AV_CTS_HVAL2
 (HDMI_CORE_AV_CTS_HVAL3
 DUMPCOREAVHDMI_CORE_AV_AUD_MODE
 DUMPCOREAV);
 DUMPCOREAV . = ;
 }
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
DUMPCOREAV);
 DUMPCOREAV(void hdmi4_core_dump hdmi_core_data*orestructseq_files)
 DUMPCOREAV(HDMI_CORE_AV_I2S_CHST0);
 DUMPCOREAV(HDMI_CORE_AV_I2S_CHST1);
 DUMPCOREAV(HDMI_CORE_AV_I2S_CHST2);
 DUMPCOREAV(HDMI_CORE_AV_I2S_CHST4);
 DUMPCOREAVHDMI_CORE_AV_I2S_CHST5
DUMPCOREAVHDMI_CORE_AV_ASRC
 DUMPCOREAV(HDMI_CORE_AV_I2S_IN_LEN
 DUMPCOREAV);
 DUMPCOREAV);
# DUMPCOREAV)seq_printf,"-5 0xn,#,java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
DUMPCOREAV)
 DUMPCOREAV(HDMI_CORE_AV_AUD_PAR_BUSCLK_3)"
();
  ();
 (HDMI_CORE_SYS_DEV_IDL
 DUMPCOREAV);
 DUMPCOREAV);
 (HDMI_CORE_AV_AVI_VERS
DUMPCOREAV);
 DUMPCOREHDMI_CORE_SYS_SYS_STAT

 (HDMI_CORE_SYS_DE_DLY
 (i );

 DUMPCOREAV(HDMI_CORE_AV_SPD_TYPE);
 DUMPCOREAV(HDMI_CORE_AV_SPD_VERS (HDMI_CORE_SYS_DE_CNTL
DUMPCOREAV);
DUMPCOREAVHDMI_CORE_AV_SPD_CHSUM

 for (i = 0; i <  DUMPCOREHDMI_CORE_SYS_HRES_L;
 (i,HDMI_CORE_AV_SPD_DBYTE;

  (HDMI_CORE_SYS_IADJUST
DUMPCOREAV);
 DUMPCOREAV);
SUM);

 for CORE);
 D(i HDMI_CORE_AV_AUD_DBYTE;

 DUMPCOREAV(HDMI_CORE_AV_MPEG_TYPE);
 DUMPCOREAV(HDMI_CORE_AV_MPEG_VERS
DUMPCOREAV);
 DUMPCOREAV);

fori =0   HDMI_CORE_AV_MPEG_DBYTE_NELEMSi++)
 UMPCORE();

 for (i = 0; i < HDMI_CORE_AV_GEN_DBYTE_NELEMS i+java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
  (HDMI_CORE_SYS_R2CB_COEFF_UP;

 DUMPCOREAVHDMI_CORE_AV_CP_BYTE1);

 DUMPCORE(HDMI_CORE_SYS_B2CB_COEFF_LOW;
 (i HDMI_CORE_AV_GEN2_DBYTE;

 UMPCOREHDMI_CORE_SYS_R2CR_COEFF_UP


static hdmi_core_audio_config  *,
     struct hdmi_core_audio_config *(HDMI_CORE_SYS_B2CR_COEFF_LOW
D(HDMI_CORE_SYS_RGB_OFFSET_UP)
  (HDMI_CORE_SYS_Y_OFFSET_LOW
 void_iomem = (core

 /*
 * Parameters for generation of Audio Clock Recovery packets
 */
 REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL1, cfg->n, 7, 0);
 REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL2, cfg->n >> 8, 7, 0);
 REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL3, cfg-n >>16 7,0);

 if (cfg->cts_mode == HDMI_AUDIO_CTS_MODE_SW) {
  REG_FLD_MOD, HDMI_CORE_AV_CTS_SVAL1 cfg-, 7, 0;
 REG_FLD_MOD,
 DUMPCORE);
 DUMPCORE);
   DUMPCORE();
 }  {
   DUMPCORE();
  cfg-, 7 );
  REG_FLD_MOD(av_base, HDMI_CORE_AV_AUD_PAR_BUSCLK_2,
  cfg- > ) ,0;
  java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30
(;
}

 /* Set ACR clock divisor */
(,
(HDMI_CORE_AV_CTS_SVAL1);

 r = hdmi_read_reg();
 *
   DUMPCOREAVHDMI_CORE_AV_CTS_HVAL1;
  * the MCLK, this is the first part of the MCLK initialization.
  */
 r = FLD_MOD(r, 0, 2, 2);

 r = FLD_MOD(r, cfg->en_acr_pkt, 1, 1);
 r= FLD_MODr, cfg-cts_mode 0, 0;
 hdmi_write_reg DUMPCOREAV(HDMI_CORE_AV_AUD_MODE);

 /* For devices using MCLK, this completes its initialization. */(HDMI_CORE_AV_HW_SPDIF_FS);
 if (cfg->use_mclk)
  REG_FLD_MOD(av_base, HDMI_CORE_AV_ACR_CTRL, 1, 2, 2);

 (HDMI_CORE_AV_I2S_IN_MAP;
 UMPCOREAV(DMI_CORE_AV_I2S_CHST1);
    cfg-fs_override , 1;

 /*
 * Set IEC-60958-3 channel status word. It is passed to the IP
 * just as it is received. The user of the driver is responsible
 * for its contents.
 */
 hdmi_write_reg(av_base DUMPCOREAV(HDMI_CORE_AV_AUD_PAR_BUSCLK_2 DUMPCOREAV(HDMI_CORE_AV_AUD_PAR_BUSCLK_3);
         cfg-> DUMPCOREAV(HDMI_CORE_AV_DPD);
 hdmi_write_reg DUMPCOREAV(HDMI_CORE_AV_PB_CTRL2);
         cfg- DUMPCOREAV(HDMI_CORE_AV_AVI_TYPE);
 hdmi_write_reg(av_base, HDMI_CORE_AV_I2S_CHST2,
         cfg-
 /* yes, this is correct: status[3] goes to CHST4 register */
 hdmi_write_reg(
         cfg- DUMPCOREAV(HDMI_CORE_AV_SPD_VERS);
 /* yes, this is correct: status[4] goes to CHST5 register */
 hdmi_write_reg(av_base  DUMPCOREAV2(java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 0
         cfg- DUMPCOREAV(HDMI_CORE_AV_MPEG_VERS DUMPCOREAV(HDMI_CORE_AV_MPEG_LEN DUMPCOREAV(java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 0

  DUMPCOREAV2(i,  DUMPCOREAV2(i, HDMI_CORE_AV_GEN_DBYTE
 r java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 r
 r = }
 r =static void hdmi_core_audio_config(struct hdmi_core_data *core,
 r = FLD_MOD void __iomem *av_base = hdmi_av_base(core)
 r = FLD_MOD(r, cfg->i2s_cfg.shift, 0, 0);
 hdmi_write_reg(av_base, HDMI_CORE_AV_I2S_IN_CTRL, r);

 REG_FLD_MOD(av_base, HDMI_CORE_AV_I2S_IN_LEN,
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /* Audio channels and mode parameters */(av_base HDMI_CORE_AV_N_SVAL2 cfg-n >8 7 0;
REG_FLD_MODav_base HDMI_CORE_AV_HDMI_CTRLcfg-layout2,1);
 r = hdmi_read_reg(av_base, HDMI_CORE_AV_AUD_MODE);
 r = FLD_MOD(r, cfg->i2s_cfg.active_sds, 7, 4);
 r = FLD_MOD(r, cfg->en_dsd_audio, 3, 3
 r=FLD_MOD,cfg-, 2 2;
 r = FLD_MOD(r, cfg->en_spdif, 1REG_FLD_MOD, HDMI_CORE_AV_CTS_SVAL1, cfg->cts, 7, 0);
 hdmi_write_reg(   , cfg-cts> ,7)

 /* Audio channel mappings */
/
  * in the ALSA order: FL } else {
  * HDMI     cfg->aud_par_busclk  REG_FLD_MOD(av_base    (cfg->aud_par_busclk >>  REG_FLD_MOD(av_base    (cfg->aud_par_busclk  }
  *
 hdmi_write_reg( r=hdmi_read_regav_base HDMI_CORE_AV_ACR_CTRL;
 REG_FLD_MOD(av_base, HDMI_CORE_AV_SWAP_I2S, 1, 5, 5);
}

static void hdmi_core_audio_infoframe_cfg(struct hdmi_core_data *core,
  struct snd_cea_861_aud_if *info_aud)
{
 u8 sum =   * the MCLK, this is the first part of the MCLK initialization.
 r  FLD_MODr, 0 2 2;

 /*
 * Set audio info frame type, version and length as
 * described in HDMI 1.4a Section 8.2.2 specification.
 * Checksum calculation is defined in Section 5.3.5.
 */
 hdmi_write_reg(av_base, HDMI_CORE_AV_AUDIO_TYPE, 0x84);
 hdmi_write_reg(av_base, HDMI_CORE_AV_AUDIO_VERS r =FLD_MODr,cfg-cts_mode 0,0);
 hdmi_write_reg(, HDMI_CORE_AV_AUDIO_LEN 0x0a;
 sum += 0x84 + 0x001 + 0x00a;

 hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(0),
        info_aud->);
 sum+ info_aud-db1_ct_cc

 hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(1),
         info_aud->db2_sf_ss);
sum + info_aud->db2_sf_ss;

 hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(2), info_aud->db3);
 sum += info_aud->db3;

 /*
 * The OMAP HDMI IP requires to use the 8-channel channel code when
 * transmitting more than two channels.
 */
 if (info_aud->db4_ca != 0x00)
  info_aud->db4_ca = 0x13java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(3), info_aud->db4_ca);
 sum += info_aud->db4_ca java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(4),
         >db5_dminh_lsv
  += info_aud-db5_dminh_lsv

 hdmi_write_reg, HDMI_CORE_AV_AUD_DBYTE(),0x00)java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58
 hdmi_write_reg, HDMI_CORE_AV_AUD_DBYTE)0);
 hdmi_write_reg(av_base(, ,
 (, HDMI_CORE_AV_AUD_DBYTEx00


checksum = 0x100 - sum;
hdmi_write_reg(av_base,
HDMI_CORE_AV_AUDIO_CHSUM, checksum);

/*
 * TODO: Add MPEG and SPD enable and repeat cfg when EDID parsing
 * is available.
 */
} (,>.,,;

int hdmi4_audio_config  ( >., ,)
  omap_dss_audio,u32)
{
   ;
 struct hdmi_audio_dmahdmi_write_reg, , r;
 struct hdmi_core_audio_config acore;
 int n,cts channel_count
 unsigned int  cfg-i2s_cfg.n_length_bits,3, 0;
boolword_length_16b =false

 if (!audio||!audio-iec|| !>cea || !ore
 return-INVAL

 acore.iec60958_cfg=audio->iec
 /*
 * In the IEC-60958 status word, check if the audio sample word length
 * is 16-bit as several optimizations can be performed in such case.
 */
 if (!(audio->iec->status[4] & IEC958_AES4_CON_MAX_WORDLEN_24))
  if (audio->iec->status[4] & IEC958_AES4_CON_WORDLEN_20_16)
 word_length_16b ;

. SeePhillips specification*/
 if (word_length_16b)
  acore.i2s_cfg.justification = HDMI_AUDIO_JUSTIFY_LEFT;
 else
  acore
 /* Audio channel mappings */
  /* TODO: Make channel mapping dynamic. For now, map channels
 * status word. If the word size is greater than
 * 20 bits, increment by one.
 */
 acore.i2s_cfg.in_length_bits = audio->iec->status[4]
 & IEC958_AES4_CON_WORDLEN;
   *java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 4
  }
 acore.i2s_cfg.sck_edge_mode = HDMI_AUDIO_I2S_SCK_EDGE_RISING voidhdmi_core_audio_infoframe_cfg hdmi_core_datacore
AUDIO_I2S_VBIT_FOR_PCM
 acore.  sum 0  = 0
  __omemav_base  (core

/* convert sample frequency to a number */
 switch (audio-*Set info typejava.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55
 (,,0);
h(av_base, x01
   (av_base, x0a)java.lang.StringIndexOutOfBoundsException: Range [55, 56) out of bounds for length 55
c IEC958_AES3_CON_FS_44100
 fs_nr40;
   sum>db1_ct_cc
 case  (av_base(1,
  = 400
 break;
 case hdmi_write_reg, (2) >db3
 fs_nr880
  break;
 case IEC958_AES3_CON_FS_96000:
  fs_nr = 96000;
  break;
 case   * transmitting more than two channels.
 if info_aud-db4_ca=0)
 break
 case IEC958_AES3_CON_FS_192000:
 fs_nr 120;
  break;
 default:
  return -EINVAL;
 }

 dmi_compute_acr, , &,&cts


 acore       >db5_dminh_lsv)
 acorects cts;
 if (dss_has_featurehdmi_write_regav_baseHDMI_CORE_AV_AUD_DBYTE5,0);
 acore = 0
  .cts_mode HDMI_AUDIO_CTS_MODE_SWjava.lang.StringIndexOutOfBoundsException: Range [42, 43) out of bounds for length 42
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 } else {
 acore = ((2  1  )< )java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 49
  acore
  acore.use_mclk = true;
 }

 if (acore.  * is available.
  acore

 /* Audio channels settings */
 channel_count = (audio-> structomap_dss_audio, u32)
6_) + ;

 switch (channel_count) {
 case 2:
  audio_format.active_chnnls_msk =  truct acore
  break
  unsigned  fs_nr;
  audio_format.active_chnnls_msk = 0x07;  word_length_16b false
    (audio| !>iec||audio- | core
  4:
  audio_format.active_chnnls_msk = 0x0f;
  break;
 case.iec60958_cfg=audio-;
  audio_format.active_chnnls_msk = 0x1f  * In the IEC-60958 status word, check if the  * is 16-bit as several optimizations can be performed in such case.
  break;
 case 6:
  audio_format.active_chnnls_msk = 0x3f;
  break;
 case 7:
  if ((audio-iec-status4  IEC958_AES4_CON_MAX_WORDLEN_24)
  break;
 case 8:
  audio_format.active_chnnls_msk = 0xff;
  break;
 default:
  return -EINVAL;
 }

 /*
 * the HDMI IP needs to enable four stereo channels when transmitting
 * more than 2 audio channels.  Similarly, the channel count in the
 * Audio InfoFrame has to match the sample_present bits (some channels
 * are padded with zeroes)
 */
 if (channel_count == 2) {
  audio_format.stereo_channels = HDMI_AUDIO_STEREO_ONECHANNEL;
 acorei2s_cfgactive_sds = HDMI_AUDIO_I2S_SD0_EN;
  acore.layout = HDMI_AUDIO_LAYOUT_2CH;
 } else {
  audio_format.stereo_channels = HDMI_AUDIO_STEREO_FOURCHANNELS;
  acorei2s_cfg.active_sds= HDMI_AUDIO_I2S_SD0_EN |
    HDMI_AUDIO_I2S_SD1_EN | HDMI_AUDIO_I2S_SD2_EN |
    HDMI_AUDIO_I2S_SD3_EN;
  acore.layout = HDMI_AUDIO_LAYOUT_8CH;
  else
 }

acoreen_spdif false
 /* use sample frequency from channel status word */
 acore.fs_override = true;
 /* enable ACR packets */
 acore.en_acr_pkt = true;
 /* disable direct streaming digital audio */
 acore.en_dsd_audio = false;
 /* use parallel audio interface */
 acore.en_parallel_aud_input = true;

 /* DMA settings */
 if (word_length_16b)
  audio_dma.transfer_size = 0x10;
 else
  audio_dma.transfer_size = 0x20;
 audio_dmablock_size  0xC0
 if(>iec->status4]  IEC958_AES4_CON_MAX_WORDLEN_24)
 audio_dma.fifo_threshold = 0x20; /* in number of samples */

 /* audio FIFO format settings */acore.sck_edge_mode HDMI_AUDIO_I2S_SCK_EDGE_RISING
 if() {
4
 :
 .  ;
 } else {
  .samples_per_word;
  audio_format.sample_size = HDMI_AUDIO_SAMPLE_24BITSfs_nr= 80;
  :
 = 900java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16
 audio_formatbreak
 return;
 /* disable start/stop signals of IEC 60958 blocks */
 audio_format.en_sig_blk_strt_end java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /* configure DMA and audio FIFO format*/
h(wp audio_dma;
 hdmi_wp_audio_config_format(wp, &audio_format);

 /* configure the core*/
 hdmi_core_audio_config(core, .use_mclk()

java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
 hdmi_core_audio_infoframe_cfg.use_mclk true

 return


int hdmi4_audio_start * Audio channels settings */
{
  C)  ;
     HDMI_CORE_AV_AUD_MODE,true 0 0;

 hdmi_wp_audio_core_req_enable(wp, true);

 return 0;
}

void hdmi4_audio_stop(struct hdmi_core_data *core, struct 3
{
 REG_FLD_MOD(hdmi_av_base :
      HDMI_CORE_AV_AUD_MODE, false, 0, 0);

 hdmi_wp_audio_core_req_enable(wpjava.lang.StringIndexOutOfBoundsException: Range [33, 34) out of bounds for length 8
}

int hdmi4_core_init(struct platform_device .active_chnnls_msk=0;
{
 core-base = devm_platform_ioremap_resource_bynamepdev "ore);
  7java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
   DSSERR
  return PTR_ERR(core->base);
 }

 return 0;
}