/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016,2017 ARM Limited, All Rights Reserved. * Author: Marc Zyngier <marc.zyngier@arm.com>
*/
/* * Maximum number of ITTs when GITS_TYPER.VMOVP == 0, using the * ITSList mechanism to perform inter-ITS synchronization.
*/ #define GICv4_ITS_LIST_MAX 16
/* Embedded in kvm.arch */ struct its_vm { struct fwnode_handle *fwnode; struct irq_domain *domain; struct page *vprop_page; struct its_vpe **vpes; int nr_vpes;
irq_hw_number_t db_lpi_base; unsignedlong *db_bitmap; int nr_db_lpis; /* * Ensures mutual exclusion between updates to vlpi_count[] * and map/unmap when using the ITSList mechanism. * * The lock order for any sequence involving the ITSList is * vmapp_lock -> vpe_lock ->vmovp_lock.
*/
raw_spinlock_t vmapp_lock;
u32 vlpi_count[GICv4_ITS_LIST_MAX];
};
/* Track the VPE being mapped */
atomic_t vmapp_count;
/* * Ensures mutual exclusion between affinity setting of the * vPE and vLPI operations using vpe->col_idx.
*/
raw_spinlock_t vpe_lock; /* * This collection ID is used to indirect the target * redistributor for this VPE. The ID itself isn't involved in * programming of the ITS.
*/
u16 col_idx; /* Unique (system-wide) VPE identifier */
u16 vpe_id; /* Pending VLPIs on schedule out? */ bool pending_last;
};
/* * struct its_vlpi_map: structure describing the mapping of a * VLPI. Only to be interpreted in the context of a physical interrupt * it complements. To be used as the vcpu_info passed to * irq_set_vcpu_affinity(). * * @vm: Pointer to the GICv4 notion of a VM * @vpe: Pointer to the GICv4 notion of a virtual CPU (VPE) * @vintid: Virtual LPI number * @properties: Priority and enable bits (as written in the prop table) * @db_enabled: Is the VPE doorbell to be generated?
*/ struct its_vlpi_map { struct its_vm *vm; struct its_vpe *vpe;
u32 vintid;
u8 properties; bool db_enabled;
};
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