/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ /* * This file is provided under a dual BSD/GPLv2 license. When using or * redistributing this file, you may do so under either license. * * Copyright(c) 2018 Intel Corporation
*/
/* * DAI_CONFIG flags. The 4 LSB bits are used for the commands, HW_PARAMS, HW_FREE and PAUSE * representing when the IPC is sent. The 4 MSB bits are used to add quirks along with the above * commands.
*/ #define SOF_DAI_CONFIG_FLAGS_CMD_MASK 0xF #define SOF_DAI_CONFIG_FLAGS_NONE 0 /**< DAI_CONFIG sent without stage information */ #define SOF_DAI_CONFIG_FLAGS_HW_PARAMS BIT(0) /**< DAI_CONFIG sent during hw_params stage */ #define SOF_DAI_CONFIG_FLAGS_HW_FREE BIT(1) /**< DAI_CONFIG sent during hw_free stage */ /**< DAI_CONFIG sent during pause trigger. Only available ABI 3.20 onwards */ #define SOF_DAI_CONFIG_FLAGS_PAUSE BIT(2) #define SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT 4 #define SOF_DAI_CONFIG_FLAGS_QUIRK_MASK (0xF << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT) /* * This should be used along with the SOF_DAI_CONFIG_FLAGS_HW_PARAMS to indicate that pipeline * stop/pause and DAI DMA stop/pause should happen in two steps. This change is only available * ABI 3.20 onwards.
*/ #define SOF_DAI_CONFIG_FLAGS_2_STEP_STOP BIT(0)
/* general purpose DAI configuration */ struct sof_ipc_dai_config { struct sof_ipc_cmd_hdr hdr;
uint32_t type; /**< DAI type - enum sof_ipc_dai_type */
uint32_t dai_index; /**< index of this type dai */
/* physical protocol and clocking */
uint16_t format; /**< SOF_DAI_FMT_ */
uint8_t group_id; /**< group ID, 0 means no group (ABI 3.17) */
uint8_t flags; /**< SOF_DAI_CONFIG_FLAGS_ (ABI 3.19) */
/* reserved for future use */
uint32_t reserved[8];
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