/* including cpumask.h leads to cyclic deps hence this Forward declaration */ struct cpumask;
/* * APIs provided by arch SMP code to generic code
*/ externvoid arch_send_call_function_single_ipi(int cpu); externvoid arch_send_call_function_ipi_mask(conststruct cpumask *mask);
/* * APIs provided by arch SMP code to rest of arch code
*/ externvoid __init smp_init_cpus(void); externvoid first_lines_of_secondary(void); externconstchar *arc_platform_smp_cpuinfo(void); externvoid arc_platform_smp_wait_to_boot(int); externvoid start_kernel_secondary(void);
/* * API expected BY platform smp code (FROM arch smp code) * * smp_ipi_irq_setup: * Takes @cpu and @hwirq to which the arch-common ISR is hooked up
*/ externint smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq);
/* * struct plat_smp_ops - SMP callbacks provided by platform to ARC SMP * * @info: SoC SMP specific info for /proc/cpuinfo etc * @init_early_smp: A SMP specific h/w block can init itself * Could be common across platforms so not covered by * mach_desc->init_early() * @init_per_cpu: Called for each core so SMP h/w block driver can do * any needed setup per cpu (e.g. IPI request) * @cpu_kick: For Master to kickstart a cpu (optionally at a PC) * @ipi_send: To send IPI to a @cpu * @ips_clear: To clear IPI received at @irq
*/ struct plat_smp_ops { constchar *info; void (*init_early_smp)(void); void (*init_per_cpu)(int cpu); void (*cpu_kick)(int cpu, unsignedlong pc); void (*ipi_send)(int cpu); void (*ipi_clear)(int irq);
};
/* TBD: stop exporting it for direct population by platform */ externstruct plat_smp_ops plat_smp_ops;
/* * ARC700 doesn't support atomic Read-Modify-Write ops. * Originally Interrupts had to be disabled around code to guarantee atomicity. * The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops * based on retry-if-irq-in-atomic (with hardware assist). * However despite these, we provide the IRQ disabling variant * * (1) These insn were introduced only in 4.10 release. So for older released * support needed. * * (2) In a SMP setup, the LLOCK/SCOND atomicity across CPUs needs to be * guaranteed by the platform (not something which core handles). * Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ * disabling for atomicity. * * However exported spinlock API is not usable due to cyclic hdr deps * (even after system.h disintegration upstream) * asm/bitops.h -> linux/spinlock.h -> linux/preempt.h * -> linux/thread_info.h -> linux/bitops.h -> asm/bitops.h * * So the workaround is to use the lowest level arch spinlock API. * The exported spinlock API is smart enough to be NOP for !CONFIG_SMP, * but same is not true for ARCH backend, hence the need for 2 variants
*/ #ifndef CONFIG_ARC_HAS_LLSC
#include <linux/irqflags.h> #ifdef CONFIG_SMP
#include <asm/spinlock.h>
extern arch_spinlock_t smp_atomic_ops_lock;
#define atomic_ops_lock(flags) do { \
local_irq_save(flags); \
arch_spin_lock(&smp_atomic_ops_lock); \
} while (0)
#define atomic_ops_unlock(flags) do { \
arch_spin_unlock(&smp_atomic_ops_lock); \
local_irq_restore(flags); \
} while (0)
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