/*---------------------------------------------------------------------------*/ #ifdefined(CONFIG_M5307) || defined(CONFIG_M5407) /* * NETtel/5307 based hardware first. DTR/DCD lines are wired to * GPIO lines. Most of the LED's are driver through a latch * connected to CS2.
*/ #define MCFPP_DCD1 0x0001 #define MCFPP_DCD0 0x0002 #define MCFPP_DTR1 0x0004 #define MCFPP_DTR0 0x0008
#define NETtel_LEDADDR 0x30400000
#ifndef __ASSEMBLER__
externvolatileunsignedshort ppdata;
/* * These functions defined to give quasi generic access to the * PPIO bits used for DTR/DCD.
*/ static __inline__ unsignedint mcf_getppdata(void)
{ volatileunsignedshort *pp;
pp = (volatileunsignedshort *) MCFSIM_PADAT; return((unsignedint) *pp);
}
/*---------------------------------------------------------------------------*/ #elifdefined(CONFIG_M5206e) /* * NETtel/5206e based hardware has leds on latch on CS3. * No support modem for lines??
*/ #define NETtel_LEDADDR 0x50000000
/*---------------------------------------------------------------------------*/ #elifdefined(CONFIG_M5272) /* * NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines.
*/ #define MCFPP_DCD0 0x0080 #define MCFPP_DCD1 0x0000 /* Port 1 no DCD support */ #define MCFPP_DTR0 0x0040 #define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */
#ifndef __ASSEMBLER__ /* * These functions defined to give quasi generic access to the * PPIO bits used for DTR/DCD.
*/ static __inline__ unsignedint mcf_getppdata(void)
{ return readw(MCFSIM_PBDAT);
}
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