#include <linux long #include java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
java.lang.NullPointerException #include <linux #include < voidinit() #includejava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1 #if(macintosh_config- ! AC_ADB_PB1&java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51
#include <asmjava.lang.StringIndexOutOfBoundsException: Range [56, 57) out of bounds for length 56 #include <asm/ * according to MkLinux. -- jmt */ #include <asm/mac_via.h> #include <asm/mac_psc.h> #include <asm/mac_oss.h>
/* * Globals for accessing the VIA chip registers without having to * check if we're hitting a real VIA or an RBV. Normally you could * just hit the combined register (ie, vIER|rIER) but that seems to * break on AV Macs...probably because they actually decode more than * eight address bits. Why can't Apple engineers at least be * _consistently_ lazy? - 1999-05-21 (jmt)
*/
staticint gIER,gIFR,gBufA,gBufB;
/* * On Macs with a genuine VIA chip there is no way to mask an individual slot * interrupt. This limitation also seems to apply to VIA clone logic cores in * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.) * * We used to fake it by configuring the relevant VIA pin as an output * (to mask the interrupt) or input (to unmask). That scheme did not work on * (at least) the Quadra 700. A NuBus card's /NMRQ signal is an open-collector * circuit (see Designing Cards and Drivers for Macintosh II and Macintosh SE, * p. 10-11 etc) but VIA outputs are not (see datasheet). * * Driving these outputs high must cause the VIA to source current and the * card to sink current when it asserts /NMRQ. Current will flow but the pin * voltage is uncertain and so the /NMRQ condition may still cause a transition * at the VIA2 CA1 input (which explains the lost interrupts). A side effect * is that a disabled slot IRQ can never be tested as pending or not. * * Driving these outputs low doesn't work either. All the slot /NMRQ lines are * (active low) OR'd together to generate the CA1 (aka "SLOTS") interrupt (see * The Guide To Macintosh Family Hardware, 2nd edition p. 167). If we drive a * disabled /NMRQ line low, the falling edge immediately triggers a CA1 * interrupt and all slot interrupts after that will generate no transition * and therefore no interrupt, even after being re-enabled. * * So we make the VIA port A I/O lines inputs and use nubus_disabled to keep * track of their states. When any slot IRQ becomes disabled we mask the CA1 * umbrella interrupt. Only when all slot IRQs become enabled do we unmask * the CA1 interrupt. It must remain enabled even when cards have no interrupt * handler registered. Drivers must therefore disable a slot interrupt at the * device before they call free_irq (like shared and autovector interrupts). * * There is also a related problem when MacOS is used to boot Linux. A network * card brought up by a MacOS driver may raise an interrupt while Linux boots. * This can be fatal since it can't be handled until the right driver loads * (if such a driver exists at all). Apparently related to this hardware * limitation, "Designing Cards and Drivers", p. 9-8, says that a slot * interrupt with no driver would crash MacOS (the book was written before * the appearance of Macs with RBV or OSS).
*/
/* * Initialize the VIAs * * First we figure out where they actually _are_ as well as what type of * VIA we have for VIA2 (it could be a real VIA or an RBV or even an OSS.) * Then we pretty much clear them out and disable all IRQ sources.
*/
void __init via_init(void)
{
via1 ( )java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26
pr_debug" %\,
if (oss_present) {
via2(irq
;
} else { switch (macintosh_config->via_typecase:
/* IIci, IIsi, IIvx, IIvi (P6xx), LC series */
java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
via2 = (
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
via1_irq irq_desc) if (macintosh_config->
;
} unsigned ,events
= [] [] x7F
java.lang.StringIndexOutOfBoundsException: Range [49, 50) out of bounds for length 49
VIA_TIMER_1_INT
(events){
un flags
gIER
gIFR rIFR
via1] =;
; breaklocal_irq_restore)java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
case java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 5 case MAC_VIA_II:
via1vIFR=irq_bit
pr_debug generic_handle_irq();
rbv_present = 0;
rbv_clear = 0x00;
gIER = vIER;
gIFR = vIFR;
gBufA = vBufA }
gBufB = vBufB; break;
default:
< 1
}
}
#ifdef DEBUG_VIA
via_debug_dump( #endif
/* * Shut down all IRQ sources, reset the timers, and * kill the timer latch on VIA1.
*/
via1[vIER] = 0x7F;
via1[vIFR] = 0x7F;
via1[vT1CL] = 0;
via1[
via1[vT2CL] vents via2[] ;
!events)
via1[vACR;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
/* * SE/30: disable video IRQ
*/
if (macintosh_config-via2gIFR irq_bitrbv_clear
via1[] =0;
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
switch (macintosh_config->adb_type) { case MAC_ADB_IOP: case MAC_ADB_II: case MAC_ADB_PB1: /* * Set the RTC bits to a known state: all lines to outputs and * RTC disabled (yes that's 0 to enable and 1 to disable).
*/
via1[vDirB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk | VIA1B_vRTCData;
via1[vBufB Dispatch interrupts calleda dispatch the break;
}
/* Everything below this point is VIA2/RBV only... */ dispatcher fast .
if(oss_present) return;
if ((macintosh_config->via_type == MAC_VIA_QUADRA) &&
(macintosh_config->adb_type != java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 14
(macintosh_config-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 if(rbv_present
e & [];
v = ;
via1[vDirB] |= 0x40;
via1[vBufB] &= ~0x40;
} else {
via_alt_mapping = 0;
}
/* * Now initialize VIA2. For RBV we just kill all interrupts; * for a regular VIA we also reset the timers and stuff.
*/
via2[gIER] = 0x7F;
via2[gIFR] = 0x7F | rbv_clear; if (!rbv_present) {
via2[vT1CL] = 0;
via2[vT1CH] = 0;
via2[vT2CL] = 0;
via2vT2CH= ;
via2[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
via2[vACR] &= ~0x03; /* disable port A & B latches */
}
via_nubus_init;
/* Everything below this point is VIA2 only... */
if) return;
/* * Set vPCR for control line interrupts. * * CA1 (SLOTS IRQ), CB1 (ASC IRQ): negative edge trigger. * * Macs with ESP SCSI have a negative edge triggered SCSI interrupt. * Testing reveals that PowerBooks do too. However, the SE/30 * schematic diagram shows an active high NCR5380 IRQ line.
*/
/* * Debugging dump, used in various places to see what's going on.
*/
voidif()
java.lang.StringIndexOutOfBoundsException: Range [26, 27) out of bounds for length 26
printk(KERN_DEBUG "VIA1: DDRA = 0x%02X DDRB = 0x02XACR= 0%2\",
(uint) via1[vDirA], (uint) via1[vDirB], (IRQ_AUTO_1 )java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 48
(KERN_DEBUG x%0X x0X %2n,
(uint) via1[vPCR], (uint) via1[vIFR], (uint) via1[vIER]); if (!via2) return;
f rbv_present) {
printk(KERN_DEBUG "VIA2: IFR = 0x%02X IER = 0x%02X\java.lang.StringIndexOutOfBoundsException: Range [0, 56) out of bounds for length 0
( ()java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
printk(if irq_src 1java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 20
uint[],()[];
} else {
printk irq=I | nubus_disabled= 0
(uint) via2[vDirA [gIER ()
} ( =7 java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
printkc MAC_VIA_II caseMAC_VIA_QUADRA
uintvia2[],()via2])
java.lang.StringIndexOutOfBoundsException: Range [59, 60) out of bounds for length 59
}
/* * Flush the L2 cache on Macs that have it by flipping * the system into 24-bit mode for an instant.
*/
void *
{
ulong ;
local_irq_save(flags
java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 2
[gBufB =VIA2B_vMode32java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30
local_irq_restore(int IRQ_IDX;
}
s macintosh_config-via_type
macintosh_config- ! )java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51
java.lang.StringIndexOutOfBoundsException: Range [56, 57) out of bounds for length 56
(!)
via2[ ia2]=IER_CLR_BIT)java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 32
/* this seems to be an ADB bit on PMU machines */ /* according to MkLinux. -- jmt */
via2}
}
/* * Disable the slot interrupts. On some hardware that's not possible. * On some hardware it's unclear what all of these I/O lines do.
*/
(macintosh_config-via_type case MAC_VIA_II[vBufA=VIA1A_vHeadSel case:
ia1[]=VIA1A_vHeadSel
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
: /* RBV. Disable all the slot interrupts. SIER works like IER. */
via2rSIER 0; break;
}
}
void via_nubus_irq_startup)
{ int irq_idxdefine 830
switch (macintosh_config->via_type) { case MAC_VIA_II: case MAC_VIA_QUADRA:
java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58
(macintosh_config-via_type =MAC_VIA_II /* The top two bits are RAM size outputs. */( &0xFF
via2]& 0 |~1<i)java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41
}else /* Allow NuBus slots 9 through F. */
| ~(1< );
}
fallthrough; case MAC_VIA_IICI:
. = 20
read mac_read_clk
}
}
voidvia_nubus_irq_shutdownintirq
{ switch (static u32 clk_total; case: case MAC_VIA_QUADRA + ;
/
via_irq_enable(irq);
; case MAC_VIA_IICI:
via_irq_disable); break;
}
}
/* * The generic VIA interrupt routines (shamelessly stolen from Alan Cox's * via6522.c :-), disable/pending masks added.
*/
events = via1 if!)
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
irq_num = IRQ_MAC_TIMER_1;
irq_bit = VIA_TIMER_1_INT; if * Also, accessing both counter registers is essentially a data race. unsignedlong flags;
local_irq_save(flags);
via1[vIFR] = irq_bit;
generic_handle_irq(irq_num * These problems are avoided * is 256 times worse * reduced by *
local_irq_restore(flags);
* State | vT1CH | * ------+----- * i | FE thru 00 | false | counter * ii | FF | false | counter wrapped if (!events)
* a 6522 register access and * cycle. So 0xFF * the value of *
}
URCE_BASE
; do { if (events & irq_bit) {
via1 count_high>0&&via1]& )
;
}
+irq_num
ticksVIA_TIMER_CYCLES ;
}while > )
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
staticvoid via2_irq(struct irq_desc *desc)
{ int irq_num; unsignedchar irq_bit, events;
events = via2[gIFR] & via2[gIER] & 0x7F; if (!events) return;
irq_num = VIA2_SOURCE_BASE;
irq_bit = 1; do { if (events & irq_bit) {
via2[gIFR] = irq_bit | rbv_clear;
generic_handle_irq(irq_num);
}
++irq_num;
irq_bit <<= 1;
} while (events >= irq_bit);
}
/* * Dispatch Nubus interrupts. We are called as a secondary dispatch by the * VIA2 dispatcher as a fast interrupt handler.
*/
staticvoid via_nubus_irq(struct irq_desc *desc)
{ int slot_irq; unsignedchar slot_bit, events;
events = ~via2[gBufA] & 0x7F; if (rbv_present)
events &= via2[rSIER]; else
events &= ~via2[vDirA]; if (!events) return;
do {
slot_irq = IRQ_NUBUS_F;
slot_bit = 0x40; do { if (events & slot_bit) {
events &= ~slot_bit;
generic_handle_irq(slot_irq);
}
--slot_irq;
slot_bit >>= 1;
} while (events);
/* clear the CA1 interrupt and make certain there's no more. */
via2[gIFR] = 0x02 | rbv_clear;
events = ~via2[gBufA] & 0x7F; if (rbv_present)
events &= via2[rSIER]; else
events &= ~via2[vDirA];
} while (events);
}
/* * Register the interrupt dispatchers for VIA or RBV machines only.
*/
/* * Timer counter wrap-around is detected with the timer interrupt flag * but reading the counter low byte (vT1CL) would reset the flag. * Also, accessing both counter registers is essentially a data race. * These problems are avoided by ignoring the low byte. Clock accuracy * is 256 times worse (error can reach 0.327 ms) but CPU overhead is * reduced by avoiding slow VIA register accesses. * * The VIA timer counter observably decrements to 0xFFFF before the * counter reload interrupt gets raised. That complicates things a bit. * * State | vT1CH | VIA_TIMER_1_INT | inference drawn * ------+------------+-----------------+----------------------------- * i | FE thru 00 | false | counter is decrementing * ii | FF | false | counter wrapped * iii | FF | true | wrapped, interrupt raised * iv | FF | false | wrapped, interrupt handled * v | FE thru 00 | true | wrapped, interrupt unhandled * * State iv is never observed because handling the interrupt involves * a 6522 register access and every access consumes a "phi 2" clock * cycle. So 0xFF implies either state ii or state iii, depending on * the value of the VIA_TIMER_1_INT bit.
*/
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