/* * MAX_PKT_RCV is the max # if packets processed per receive interrupt.
*/ #define MAX_PKT_RECV 64 /* * MAX_PKT_THREAD_RCV is the max # of packets processed before * the qp_wait_list queue is flushed.
*/ #define MAX_PKT_RECV_THREAD (MAX_PKT_RECV * 4) #define EGR_HEAD_UPDATE_THRESHOLD 16
ret = kstrtoul(val, 0, &value); if (ret) {
pr_warn("Invalid module parameter value for 'cap_mask'\n"); goto done;
} /* Get the changed bits (except the locked bit) */
diff = value ^ (cap_mask & ~HFI1_CAP_LOCKED_SMASK);
/* Remove any bits that are not allowed to change after driver load */ if (HFI1_CAP_LOCKED() && (diff & ~write_mask)) {
pr_warn("Ignoring non-writable capability bits %#lx\n",
diff & ~write_mask);
diff &= write_mask;
}
/* Mask off any reserved bits */
diff &= ~HFI1_CAP_RESERVED_MASK; /* Clear any previously set and changing bits */
cap_mask &= ~diff; /* Update the bits with the new capability */
cap_mask |= (value & diff); /* Check for any kernel/user restrictions */
diff = (cap_mask & (HFI1_CAP_MUST_HAVE_KERN << HFI1_CAP_USER_SHIFT)) ^
((cap_mask & HFI1_CAP_MUST_HAVE_KERN) << HFI1_CAP_USER_SHIFT);
cap_mask &= ~diff; /* Set the bitmask to the final set */
*cap_mask_ptr = cap_mask;
done: return ret;
}
/* * Return count of units with at least one port ACTIVE.
*/ int hfi1_count_active_units(void)
{ struct hfi1_devdata *dd; struct hfi1_pportdata *ppd; unsignedlong index, flags; int pidx, nunits_active = 0;
/* * Validate and encode the a given RcvArray Buffer size. * The function will check whether the given size falls within * allowed size ranges for the respective type and, optionally, * return the proper encoding.
*/ int hfi1_rcvbuf_validate(u32 size, u8 type, u16 *encoded)
{ if (unlikely(!PAGE_ALIGNED(size))) return 0; if (unlikely(size < MIN_EAGER_BUFFER)) return 0; if (size >
(type == PT_EAGER ? MAX_EAGER_BUFFER : MAX_EXPECTED_BUFFER)) return 0; if (encoded)
*encoded = ilog2(size / PAGE_SIZE) + 1; return 1;
}
/* We support only two types - 9B and 16B for now */ staticconst hfi1_handle_cnp hfi1_handle_cnp_tbl[2] = {
[HFI1_PKT_TYPE_9B] = &return_cnp,
[HFI1_PKT_TYPE_16B] = &return_cnp_16B
};
/** * hfi1_process_ecn_slowpath - Process FECN or BECN bits * @qp: The packet's destination QP * @pkt: The packet itself. * @prescan: Is the caller the RXQ prescan * * Process the packet's FECN or BECN bits. By now, the packet * has already been evaluated whether processing of those bit should * be done. * The significance of the @prescan argument is that if the caller * is the RXQ prescan, a CNP will be send out instead of waiting for the * normal packet processing to send an ACK with BECN set (or a CNP).
*/ bool hfi1_process_ecn_slowpath(struct rvt_qp *qp, struct hfi1_packet *pkt, bool prescan)
{ struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); struct ib_other_headers *ohdr = pkt->ohdr; struct ib_grh *grh = pkt->grh;
u32 rqpn = 0;
u16 pkey;
u32 rlid, slid, dlid = 0;
u8 hdr_type, sc, svc_type, opcode; bool is_mcast = false, ignore_fecn = false, do_cnp = false,
fecn, becn;
if (get_dma_rtail_setting(rcd)) {
mdata->ps_tail = get_rcvhdrtail(rcd); if (rcd->ctxt == HFI1_CTRL_CTXT)
mdata->ps_seq = hfi1_seq_cnt(rcd); else
mdata->ps_seq = 0; /* not used with DMA_RTAIL */
} else {
mdata->ps_tail = 0; /* used only with DMA_RTAIL*/
mdata->ps_seq = hfi1_seq_cnt(rcd);
}
}
/* Control context must do seq counting */ if (!get_dma_rtail_setting(rcd) ||
rcd->ctxt == HFI1_CTRL_CTXT)
mdata->ps_seq = hfi1_seq_incr_wrap(mdata->ps_seq);
}
/* * prescan_rxq - search through the receive queue looking for packets * containing Excplicit Congestion Notifications (FECNs, or BECNs). * When an ECN is found, process the Congestion Notification, and toggle * it off. * This is declared as a macro to allow quick checking of the port to avoid * the overhead of a function call if not enabled.
*/ #define prescan_rxq(rcd, packet) \ do { \ if (rcd->ppd->cc_prescan) \
__prescan_rxq(packet); \
} while (0) staticvoid __prescan_rxq(struct hfi1_packet *packet)
{ struct hfi1_ctxtdata *rcd = packet->rcd; struct ps_mdata mdata;
/* * Iterate over all QPs waiting to respond. * The list won't change since the IRQ is only run on one CPU.
*/
list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
list_del_init(&qp->rspwait); if (qp->r_flags & RVT_R_RSP_NAK) {
qp->r_flags &= ~RVT_R_RSP_NAK;
packet->qp = qp;
hfi1_send_rc_ack(packet, 0);
} if (qp->r_flags & RVT_R_RSP_SEND) { unsignedlong flags;
static noinline int max_packet_exceeded(struct hfi1_packet *packet, int thread)
{ if (thread) { if ((packet->numpkt & (MAX_PKT_RECV_THREAD - 1)) == 0) /* allow defered processing */
process_rcv_qp_work(packet);
cond_resched(); return RCV_PKT_OK;
} else {
this_cpu_inc(*packet->rcd->dd->rcv_limit); return RCV_PKT_LIMIT;
}
}
staticinlineint check_max_packet(struct hfi1_packet *packet, int thread)
{ int ret = RCV_PKT_OK;
if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0))
ret = max_packet_exceeded(packet, thread); return ret;
}
static noinline int skip_rcv_packet(struct hfi1_packet *packet, int thread)
{ int ret;
packet->rcd->dd->ctx0_seq_drop++; /* Set up for the next packet */
packet->rhqoff += packet->rsize; if (packet->rhqoff >= packet->maxcnt)
packet->rhqoff = 0;
packet->numpkt++;
ret = check_max_packet(packet, thread);
/* total length */
packet->tlen = rhf_pkt_len(packet->rhf); /* in bytes */ /* retrieve eager buffer details */
packet->etail = rhf_egr_index(packet->rhf);
packet->ebuf = get_egrbuf(packet->rcd, packet->rhf,
&packet->updegr); /* * Prefetch the contents of the eager buffer. It is * OK to send a negative length to prefetch_range(). * The +2 is the size of the RHF.
*/
prefetch_range(packet->ebuf,
packet->tlen - ((packet->rcd->rcvhdrqentsize -
(rhf_hdrq_offset(packet->rhf)
+ 2)) * 4));
staticinlineint process_rcv_packet(struct hfi1_packet *packet, int thread)
{ int ret;
packet->etype = rhf_rcv_type(packet->rhf);
/* total length */
packet->tlen = rhf_pkt_len(packet->rhf); /* in bytes */ /* retrieve eager buffer details */
packet->ebuf = NULL; if (rhf_use_egr_bfr(packet->rhf)) {
packet->etail = rhf_egr_index(packet->rhf);
packet->ebuf = get_egrbuf(packet->rcd, packet->rhf,
&packet->updegr); /* * Prefetch the contents of the eager buffer. It is * OK to send a negative length to prefetch_range(). * The +2 is the size of the RHF.
*/
prefetch_range(packet->ebuf,
packet->tlen - ((get_hdrqentsize(packet->rcd) -
(rhf_hdrq_offset(packet->rhf)
+ 2)) * 4));
}
/* * Call a type specific handler for the packet. We * should be able to trust that etype won't be beyond * the range of valid indexes. If so something is really * wrong and we can probably just let things come * crashing down. There is no need to eat another * comparison in this performance critical code.
*/
packet->rcd->rhf_rcv_function_map[packet->etype](packet);
packet->numpkt++;
/* Set up for the next packet */
packet->rhqoff += packet->rsize; if (packet->rhqoff >= packet->maxcnt)
packet->rhqoff = 0;
staticinlinevoid process_rcv_update(int last, struct hfi1_packet *packet)
{ /* * Update head regs etc., every 16 packets, if not last pkt, * to help prevent rcvhdrq overflows, when many packets * are processed and queue is nearly full. * Don't request an interrupt for intermediate updates.
*/ if (!last && !(packet->numpkt & 0xf)) {
update_usrhead(packet->rcd, packet->rhqoff, packet->updegr,
packet->etail, 0, 0);
packet->updegr = 0;
}
packet->grh = NULL;
}
staticinlinevoid finish_packet(struct hfi1_packet *packet)
{ /* * Nothing we need to free for the packet. * * The only thing we need to do is a final update and call for an * interrupt
*/
update_usrhead(packet->rcd, hfi1_rcd_head(packet->rcd), packet->updegr,
packet->etail, rcv_intr_dynamic, packet->numpkt);
}
/* * handle_receive_interrupt_napi_fp - receive a packet * @rcd: the context * @budget: polling budget * * Called from interrupt handler for receive interrupt. * This is the fast path interrupt handler * when executing napi soft irq environment.
*/ int handle_receive_interrupt_napi_fp(struct hfi1_ctxtdata *rcd, int budget)
{ struct hfi1_packet packet;
init_packet(rcd, &packet); if (last_rcv_seq(rcd, rhf_rcv_seq(packet.rhf))) goto bail;
while (packet.numpkt < budget) {
process_rcv_packet_napi(&packet); if (hfi1_seq_incr(rcd, rhf_rcv_seq(packet.rhf))) break;
/* * Handle receive interrupts when using the no dma rtail option.
*/ int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata *rcd, int thread)
{ int last = RCV_PKT_OK; struct hfi1_packet packet;
init_packet(rcd, &packet); if (last_rcv_seq(rcd, rhf_rcv_seq(packet.rhf))) {
last = RCV_PKT_DONE; goto bail;
}
prescan_rxq(rcd, &packet);
while (last == RCV_PKT_OK) {
last = process_rcv_packet(&packet, thread); if (hfi1_seq_incr(rcd, rhf_rcv_seq(packet.rhf)))
last = RCV_PKT_DONE;
process_rcv_update(last, &packet);
}
process_rcv_qp_work(&packet);
hfi1_set_rcd_head(rcd, packet.rhqoff);
bail:
finish_packet(&packet); return last;
}
int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata *rcd, int thread)
{
u32 hdrqtail; int last = RCV_PKT_OK; struct hfi1_packet packet;
init_packet(rcd, &packet);
hdrqtail = get_rcvhdrtail(rcd); if (packet.rhqoff == hdrqtail) {
last = RCV_PKT_DONE; goto bail;
}
smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
prescan_rxq(rcd, &packet);
while (last == RCV_PKT_OK) {
last = process_rcv_packet(&packet, thread); if (packet.rhqoff == hdrqtail)
last = RCV_PKT_DONE;
process_rcv_update(last, &packet);
}
process_rcv_qp_work(&packet);
hfi1_set_rcd_head(rcd, packet.rhqoff);
bail:
finish_packet(&packet); return last;
}
/* HFI1_CTRL_CTXT must always use the slow path interrupt handler */ for (i = HFI1_CTRL_CTXT + 1; i < dd->num_rcv_contexts; i++) {
rcd = hfi1_rcd_get_by_index(dd, i); if (!rcd) continue; if (i < dd->first_dyn_alloc_ctxt || rcd->is_vnic)
rcd->do_interrupt = rcd->slow_handler;
/** * set_armed_to_active - the fast path for armed to active * @packet: the packet structure * * Return true if packet processing needs to bail.
*/ staticbool set_armed_to_active(struct hfi1_packet *packet)
{ if (likely(packet->rcd->ppd->host_link_state != HLS_UP_ARMED)) returnfalse; return __set_armed_to_active(packet);
}
/* * handle_receive_interrupt - receive a packet * @rcd: the context * * Called from interrupt handler for errors or receive interrupt. * This is the slow path interrupt handler.
*/ int handle_receive_interrupt(struct hfi1_ctxtdata *rcd, int thread)
{ struct hfi1_devdata *dd = rcd->dd;
u32 hdrqtail; int needset, last = RCV_PKT_OK; struct hfi1_packet packet; int skip_pkt = 0;
if (!rcd->rcvhdrq) return RCV_PKT_OK; /* Control context will always use the slow path interrupt handler */
needset = (rcd->ctxt == HFI1_CTRL_CTXT) ? 0 : 1;
init_packet(rcd, &packet);
if (!get_dma_rtail_setting(rcd)) { if (last_rcv_seq(rcd, rhf_rcv_seq(packet.rhf))) {
last = RCV_PKT_DONE; goto bail;
}
hdrqtail = 0;
} else {
hdrqtail = get_rcvhdrtail(rcd); if (packet.rhqoff == hdrqtail) {
last = RCV_PKT_DONE; goto bail;
}
smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
/* * Control context can potentially receive an invalid * rhf. Drop such packets.
*/ if (rcd->ctxt == HFI1_CTRL_CTXT) if (last_rcv_seq(rcd, rhf_rcv_seq(packet.rhf)))
skip_pkt = 1;
}
prescan_rxq(rcd, &packet);
while (last == RCV_PKT_OK) { if (hfi1_need_drop(dd)) { /* On to the next packet */
packet.rhqoff += packet.rsize;
packet.rhf_addr = (__le32 *)rcd->rcvhdrq +
packet.rhqoff +
rcd->rhf_offset;
packet.rhf = rhf_to_cpu(packet.rhf_addr);
} elseif (skip_pkt) {
last = skip_rcv_packet(&packet, thread);
skip_pkt = 0;
} else { if (set_armed_to_active(&packet)) goto bail;
last = process_rcv_packet(&packet, thread);
}
if (!get_dma_rtail_setting(rcd)) { if (hfi1_seq_incr(rcd, rhf_rcv_seq(packet.rhf)))
last = RCV_PKT_DONE;
} else { if (packet.rhqoff == hdrqtail)
last = RCV_PKT_DONE; /* * Control context can potentially receive an invalid * rhf. Drop such packets.
*/ if (rcd->ctxt == HFI1_CTRL_CTXT) { bool lseq;
bail: /* * Always write head at end, and setup rcv interrupt, even * if no packets were processed.
*/
finish_packet(&packet); return last;
}
/* * handle_receive_interrupt_napi_sp - receive a packet * @rcd: the context * @budget: polling budget * * Called from interrupt handler for errors or receive interrupt. * This is the slow path interrupt handler * when executing napi soft irq environment.
*/ int handle_receive_interrupt_napi_sp(struct hfi1_ctxtdata *rcd, int budget)
{ struct hfi1_devdata *dd = rcd->dd; int last = RCV_PKT_OK; bool needset = true; struct hfi1_packet packet;
init_packet(rcd, &packet); if (last_rcv_seq(rcd, rhf_rcv_seq(packet.rhf))) goto bail;
while (last != RCV_PKT_DONE && packet.numpkt < budget) { if (hfi1_need_drop(dd)) { /* On to the next packet */
packet.rhqoff += packet.rsize;
packet.rhf_addr = (__le32 *)rcd->rcvhdrq +
packet.rhqoff +
rcd->rhf_offset;
packet.rhf = rhf_to_cpu(packet.rhf_addr);
} else { if (set_armed_to_active(&packet)) goto bail;
process_rcv_packet_napi(&packet);
}
if (hfi1_seq_incr(rcd, rhf_rcv_seq(packet.rhf)))
last = RCV_PKT_DONE;
if (needset) {
needset = false;
set_all_fastpath(dd, rcd);
}
process_rcv_update(last, &packet);
}
hfi1_set_rcd_head(rcd, packet.rhqoff);
bail: /* * Always write head at end, and setup rcv interrupt, even * if no packets were processed.
*/
finish_packet(&packet); return packet.numpkt;
}
/* * We may discover in the interrupt that the hardware link state has * changed from ARMED to ACTIVE (due to the arrival of a non-SC15 packet), * and we need to update the driver's notion of the link state. We cannot * run set_link_state from interrupt context, so we queue this function on * a workqueue. * * We delay the regular interrupt processing until after the state changes * so that the link will be in the correct state by the time any application * we wake up attempts to send a reply to any message it received. * (Subsequent receive interrupts may possibly force the wakeup before we * update the link state.) * * The rcd is freed in hfi1_free_ctxtdata after hfi1_postinit_cleanup invokes * dd->f_cleanup(dd) to disable the interrupt handler and flush workqueues, * so we're safe from use-after-free of the rcd.
*/ void receive_interrupt_work(struct work_struct *work)
{ struct hfi1_pportdata *ppd = container_of(work, struct hfi1_pportdata,
linkstate_active_work); struct hfi1_devdata *dd = ppd->dd; struct hfi1_ctxtdata *rcd;
u16 i;
/* * Interrupt all statically allocated kernel contexts that could * have had an interrupt during auto activation.
*/ for (i = HFI1_CTRL_CTXT; i < dd->first_dyn_alloc_ctxt; i++) {
rcd = hfi1_rcd_get_by_index(dd, i); if (rcd)
force_recv_intr(rcd);
hfi1_rcd_put(rcd);
}
}
/* * Convert a given MTU size to the on-wire MAD packet enumeration. * Return -1 if the size is invalid.
*/ int mtu_to_enum(u32 mtu, int default_if_bad)
{ switch (mtu) { case 0: return OPA_MTU_0; case 256: return OPA_MTU_256; case 512: return OPA_MTU_512; case 1024: return OPA_MTU_1024; case 2048: return OPA_MTU_2048; case 4096: return OPA_MTU_4096; case 8192: return OPA_MTU_8192; case 10240: return OPA_MTU_10240;
} return default_if_bad;
}
u16 enum_to_mtu(int mtu)
{ switch (mtu) { case OPA_MTU_0: return 0; case OPA_MTU_256: return 256; case OPA_MTU_512: return 512; case OPA_MTU_1024: return 1024; case OPA_MTU_2048: return 2048; case OPA_MTU_4096: return 4096; case OPA_MTU_8192: return 8192; case OPA_MTU_10240: return 10240; default: return 0xffff;
}
}
/* * set_mtu - set the MTU * @ppd: the per port data * * We can handle "any" incoming size, the issue here is whether we * need to restrict our outgoing size. We do not deal with what happens * to programs that are already running when the size changes.
*/ int set_mtu(struct hfi1_pportdata *ppd)
{ struct hfi1_devdata *dd = ppd->dd; int i, drain, ret = 0, is_up = 0;
ppd->ibmtu = 0; for (i = 0; i < ppd->vls_supported; i++) if (ppd->ibmtu < dd->vld[i].mtu)
ppd->ibmtu = dd->vld[i].mtu;
ppd->ibmaxlen = ppd->ibmtu + lrh_max_header_bytes(ppd->dd);
if (drain) /* * MTU is specified per-VL. To ensure that no packet gets * stuck (due, e.g., to the MTU for the packet's VL being * reduced), empty the per-VL FIFOs before adjusting MTU.
*/
ret = stop_drain_data_vls(dd);
if (ret) {
dd_dev_err(dd, "%s: cannot stop/drain VLs - refusing to change per-VL MTUs\n",
__func__); goto err;
}
hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_MTU, 0);
if (drain)
open_fill_data_vls(dd); /* reopen all VLs */
/* * This pairs with the memory barrier in hfi1_start_led_override to * ensure that we read the correct state of LED beaconing represented * by led_override_timer_active
*/
smp_rmb(); if (atomic_read(&ppd->led_override_timer_active)) {
timer_delete_sync(&ppd->led_override_timer);
atomic_set(&ppd->led_override_timer_active, 0); /* Ensure the atomic_set is visible to all CPUs */
smp_wmb();
}
/* Hand control of the LED to the DC for normal operation */
write_csr(dd, DCC_CFG_LED_CNTRL, 0);
}
/* * To have the LED blink in a particular pattern, provide timeon and timeoff * in milliseconds. * To turn off custom blinking and return to normal operation, use * shutdown_led_override()
*/ void hfi1_start_led_override(struct hfi1_pportdata *ppd, unsignedint timeon, unsignedint timeoff)
{ if (!(ppd->dd->flags & HFI1_INITTED)) return;
/* Convert to jiffies for direct use in timer */
ppd->led_override_vals[0] = msecs_to_jiffies(timeoff);
ppd->led_override_vals[1] = msecs_to_jiffies(timeon);
/* Arbitrarily start from LED on phase */
ppd->led_override_phase = 1;
/* * If the timer has not already been started, do so. Use a "quick" * timeout so the handler will be called soon to look at our request.
*/ if (!timer_pending(&ppd->led_override_timer)) {
timer_setup(&ppd->led_override_timer, run_led_override, 0);
ppd->led_override_timer.expires = jiffies + 1;
add_timer(&ppd->led_override_timer);
atomic_set(&ppd->led_override_timer_active, 1); /* Ensure the atomic_set is visible to all CPUs */
smp_wmb();
}
}
/** * hfi1_reset_device - reset the chip if possible * @unit: the device to reset * * Whether or not reset is successful, we attempt to re-initialize the chip * (that is, much like a driver unload/reload). We clear the INITTED flag * so that the various entry points will fail until we reinitialize. For * now, we only allow this if no user contexts are open that use chip resources
*/ int hfi1_reset_device(int unit)
{ int ret; struct hfi1_devdata *dd = hfi1_lookup(unit); struct hfi1_pportdata *ppd; int pidx;
if (!dd) {
ret = -ENODEV; goto bail;
}
dd_dev_info(dd, "Reset on unit %u requested\n", unit);
if (!dd->kregbase1 || !(dd->flags & HFI1_PRESENT)) {
dd_dev_info(dd, "Invalid unit number %u or not initialized or not present\n",
unit);
ret = -ENXIO; goto bail;
}
/* If there are any user/vnic contexts, we cannot reset */
mutex_lock(&hfi1_mutex); if (dd->rcd) if (hfi1_stats.sps_ctxts) {
mutex_unlock(&hfi1_mutex);
ret = -EBUSY; goto bail;
}
mutex_unlock(&hfi1_mutex);
shutdown_led_override(ppd);
} if (dd->flags & HFI1_HAS_SEND_DMA)
sdma_exit(dd);
hfi1_reset_cpu_counters(dd);
ret = hfi1_init(dd, 1);
if (ret)
dd_dev_err(dd, "Reinitialize unit %u after reset failed with %d\n",
unit, ret); else
dd_dev_info(dd, "Reinitialized unit %u after resetting\n",
unit);
staticint hfi1_setup_bypass_packet(struct hfi1_packet *packet)
{ /* * Bypass packets have a different header/payload split * compared to an IB packet. * Current split is set such that 16 bytes of the actual * header is in the header buffer and the remining is in * the eager buffer. We chose 16 since hfi1 driver only * supports 16B bypass packets and we will be able to * receive the entire LRH with such a split.
*/
/* * We have split point after last byte of DETH * lets strip padding and CRC and ICRC. * tlen is whole packet len so we need to * subtract header size as well.
*/
tlen = packet->tlen;
extra_bytes = ib_bth_get_pad(packet->ohdr) + (SIZE_OF_CRC << 2) +
packet->hlen; if (unlikely(tlen < extra_bytes)) goto drop;
tlen -= extra_bytes;
skb = hfi1_ipoib_prepare_skb(rxq, tlen, packet->ebuf); if (unlikely(!skb)) goto drop;
/* * The following functions are called by the interrupt handler. They are type * specific handlers for each packet type.
*/ staticvoid process_receive_ib(struct hfi1_packet *packet)
{ if (hfi1_setup_9B_packet(packet)) return;
if (unlikely(hfi1_dbg_should_fault_rx(packet))) return;
trace_hfi1_rcvhdr(packet);
if (unlikely(rhf_err_flags(packet->rhf))) {
handle_eflags(packet); return;
}
if (unlikely(rhf_err_flags(packet->rhf))) {
handle_eflags(packet); return;
}
if (hfi1_16B_get_l2(packet->hdr) == 0x2) {
hfi1_16B_rcv(packet);
} else {
dd_dev_err(dd, "Bypass packets other than 16B are not supported in normal operation. Dropping\n");
incr_cntr64(&dd->sw_rcv_bypass_packet_errors); if (!(dd->err_info_rcvport.status_and_code &
OPA_EI_STATUS_SMASK)) {
u64 *flits = packet->ebuf;
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