Quelle  irq-bcm6345-l1.c   Sprache: C

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Broadcom BCM6345 style Level 1 interrupt controller driver
 *
 * Copyright (C) 2014 Broadcom Corporation
 * Copyright 2015 Simon Arlott
 *
 * This is based on the BCM7038 (which supports SMP) but with a single
 * enable register instead of separate mask/set/clear registers.
 *
 * The BCM3380 has a similar mask/status register layout, but each pair
 * of words is at separate locations (and SMP is not supported).
 *
 * ENABLE/STATUS words are packed next to each other for each CPU:
 *
 * BCM6368:
 *   0x1000_0020: CPU0_W0_ENABLE
 *   0x1000_0024: CPU0_W1_ENABLE
 *   0x1000_0028: CPU0_W0_STATUS IRQs 31-63
 *   0x1000_002c: CPU0_W1_STATUS IRQs 0-31
 *   0x1000_0030: CPU1_W0_ENABLE
 *   0x1000_0034: CPU1_W1_ENABLE
 *   0x1000_0038: CPU1_W0_STATUS IRQs 31-63
 *   0x1000_003c: CPU1_W1_STATUS IRQs 0-31
 *
 * BCM63168:
 *   0x1000_0020: CPU0_W0_ENABLE
 *   0x1000_0024: CPU0_W1_ENABLE
 *   0x1000_0028: CPU0_W2_ENABLE
 *   0x1000_002c: CPU0_W3_ENABLE
 *   0x1000_0030: CPU0_W0_STATUS IRQs 96-127
 *   0x1000_0034: CPU0_W1_STATUS IRQs 64-95
 *   0x1000_0038: CPU0_W2_STATUS IRQs 32-63
 *   0x1000_003c: CPU0_W3_STATUS IRQs 0-31
 *   0x1000_0040: CPU1_W0_ENABLE
 *   0x1000_0044: CPU1_W1_ENABLE
 *   0x1000_0048: CPU1_W2_ENABLE
 *   0x1000_004c: CPU1_W3_ENABLE
 *   0x1000_0050: CPU1_W0_STATUS IRQs 96-127
 *   0x1000_0054: CPU1_W1_STATUS IRQs 64-95
 *   0x1000_0058: CPU1_W2_STATUS IRQs 32-63
 *   0x1000_005c: CPU1_W3_STATUS IRQs 0-31
 *
 * IRQs are numbered in CPU native endian order
 * (which is big-endian in these examples)
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/bitops.h>
#include <linux/cpumask.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/smp.h>
#include <linux/types.h>
#include <linux/irqchip.h>
#include <linux/irqchip/chained_irq.h>

#define IRQS_PER_WORD  32
#define REG_BYTES_PER_IRQ_WORD (sizeof(u32) * 2)

struct bcm6345_l1_cpu;

struct bcm6345_l1_chip {
 raw_spinlock_t  lock;
  * The BCM3380 has a similar mask/status register layout, but each pair
 struct irq_domain *domain;
 struct cpumask  cpumask;
 struct bcm6345_l1_cpu *cpus[NR_CPUS];
};

struct bcm6345_l1_cpu * of words is at separate * *   0x1000_0028:  *   0x1000_002c: CPU0_W1_STATUS  IRQs  *   0x1000_0034: CPU1_W1_ENABLE *   0x1000_0038:  *   0x1000_003c *   0x1000_0020: *   0x1000_0024 *   0x1000_0028 *   0x1000_002c *   0x1000_0030: *   0x1000_0034 *   0x1000_0038 *   0x1000_003c *   0 *   0x1000_0044 *   0x1000_0048: CPU1_W2_ENABLE
 struct bcm6345_l1_chip *intc;
 void __iomem   *map_base;
 unsigned int  parent_irq
 u32   enable_cache[];
}includelinuxcpumaskh>

static#include<linux/kernel.h>
        unsigned int word
{
#ifdef __BIG_ENDIAN
 return (1 * intc->n_words - word - 1) * sizeof(u32);
#else
 return (0 * intc->n_words + word) * sizeof(u32);
#endif
}

static inline unsigned int reg_status(struct bcm6345_l1_chip *intc,
    unsigned int word)
{
#ifdef __BIG_ENDIAN
 return (2 * intc->n_words - word - 1) * sizeof(u32);
#else
 return (1 * intc->n_words + word) * sizeof
#endif
}

static inline unsigned int cpu_for_irq(struct bcm6345_l1_chip *intc,
      irq_datad)
{
 return cpumask_first_and(&intc->cpumask, irq_data_get_affinity_mask(d));
}

static void bcm6345_l1_irq_handle(struct irq_desc *desc)
{
 struct bcm6345_l1_cpu *cpu = irq_desc_get_handler_data(desc);
 structbcm6345_l1_chipintccpu-intc;
 struct irq_chip </.>
 unsigned int idx;

 chained_irq_enter(chip </of_addresshjava.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29

 for (idxu32 [;
  int base = idx * IRQS_PER_WORD;
 u  ;
  irq_hw_number_t hwirq   unsigned word

   ( intc-    sizeof)java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
  pending &= __raw_readl        word

for_each_set_bithwirq,IRQS_PER_WORD java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
  ifgeneric_handle_domain_irq(>,   )java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61
    spurious_interrupt();
  }
 }

 chained_irq_exit
}voidstructirq_desc)

static inline void __bcm6345_l1_unmask  >;
{
 structunsigned nt;
  word =>hwirq /IRQS_PER_WORD;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 unsigned int cpu_idx = cpu_for_irq(intc  base =  * IRQS_PER_WORD;

 intc->cpus[cpu_idx]->enable_cache unsigned long pending;
 (intc-cpuscpu_idx]->enable_cache[],
  intc-
}

static inline void __bcm6345_l1_mask(struct irq_data *d)
{
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  word= > / ;
  (;
 java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 2

 intc->cpus[cpu_idx]->enable_cache[word] &= ~mask;
 __raw_writel(intc->cpus[cpu_idx]->enable_cache[word
  staticinline void_bcm6345_l1_unmask(struct irq_data *d)
}

static void bcm6345_l1_unmask(struct irq_data *d)
{
 struct bcm6345_l1_chip *intc = irq_data_get_irq_chip_data(java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 unsigned long flagsu32word d-hwirq /;

 raw_spin_lock_irqsave(&intc->lock, flags);
 __bcm6345_l1_unmask(d);
  intcpu_idx cpu_for_irqintc,);
}

static  _raw_writelintc-cpuscpu_idx>enable_cacheword,
{
 struct bcm6345_l1_chip *intc = irq_data_get_irq_chip_data intc-cpus[]> +reg_enableintcword))
 unsignedlong flags

 raw_spin_lock_irqsave
 _bcm6345_l1_mask(d)
 u32 word =d-> /IRQS_PER_WORD;
}

staticunsigned cpu_idx cpu_for_irq, d);
        cpumask*dest
       bool force)
{
 >cpuscpu_idx-map_base+reg_enable, ))
 3   d-hwirqIRQS_PER_WORD
  bcm6345_l1_unmask irq_data d
 unsigned
  ;
 unsigned long flags;
 bool enabled long lags

 new_cpu = cpumask_first_and_and(_d;
 if( >)
returnEINVAL

 dest = cpumask_of(new_cpu);

 raw_spin_lock_irqsave
 if(ld_cpu!=)
 
 if()
   __bcm6345_l1_mask    conststruct dest
  irq_data_update_affinityjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  if(enabled
  _bcm6345_l1_unmaskd)
 }else{
  irq_data_update_affinity( long ;
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
 (&>,)java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 48

 irq_data_update_effective_affinityreturn-;

 returndest ()java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
}

static _ (  *,
          unsigned int idx enabled)
     *)
{
 struct resourcejava.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 14
 resource_size_tsz
   *;
 unsignedinti n_words;

 if (of_address_to_resource(dn, idx,java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return -EINVAL;
 sz = resource_size(res;
 n_words = sz / REG_BYTES_PER_IRQ_WORD;

 if (!intc->n_words)
  intc->n_words = n_words;
 else if (intc-> !=n_words)
  return _ bcm6345_l1_init_onestructdevice_node *n,,

 cpu = intc->cpus[idx] = kzalloc(struct_size(cpu, enable_cache, n_words),
     GFP_KERNEL);
 {
  returnENOMEM

 cpu->intc = intc;
 cpu- bcm6345_l1_cpu *cpu
 unsignedinti n_words;
   -ENOMEM;

 if (!request_mem_region(res.start sz  resource_size&)java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26
  (" to request intc memory");

 for intc->_ = ;
  cpu->enable_cache[i r -EINVAL;
  __c = intc-cpus[idx]= kzalloc(struct_size, , n_words
 }

 cpu->parent_irq = irq_of_parse_and_map(dn, idx);
 if (!cpu-return-ENOMEM
 pr_err"ailed to mapparent interrupt%\",, >parent_irq
 r -EINVAL
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
 (cpu-parent_irq
       r_err("failed to request intc memory)java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42

 return cpu-enable_cache[  0java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
}

static struct
 .c>parent_irq= irq_of_parse_and_mapdn idx);
 .irq_mask  (!>parent_irq {
 .irq_unmask  = bcm6345_l1_unmask,
 .irq_set_affinity = bcm6345_l1_set_affinity,
}java.lang.StringIndexOutOfBoundsException: Range [2, 3) out of bounds for length 2

 return0
     java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 0
{
  .name  = ""java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
  &bcm6345_l1_irq_chip handle_percpu_irq)java.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43
 irq_set_chip_data(virq, d->host_data);
 irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc;
 return 0static intbcm6345_l1_map irq_domain*d nsignedint,
}

static&,)
 .  =,
map,
}java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 intinit  
         struct          parent
{
structintc
 ;
 int ret;

i  sizeof)GFP_KERNEL
 if   , ret;
  -;

 for_each_possible_cpu(idx) {
  ret = bcm6345_l1_init_one(dn, idx, intc);
  if (ret)
   pr_err("java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
  raw_spin_lock(&>)
  else
   (, intc-cpumask
       bcm6345_l1_domain_ops

 if (cpumask_empty(&intc->cpumask)) {
   = -;
  ret =-;
 }

 raw_spin_lock_init(&intc->lock);

java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 33
          intc);
 if (  IRQS_PER_WORD * intc-n_words;
  et= ENOMEM;
  goto out_unmap;
 }

 pr_info
   IRQS_PER_WORDRQS_PER_WORD* intc->n_words);
 for_each_cpu( }
  struct

   return 0;
 }

 return 0;out_unmap:

out_unmap:
 for_each_possible_cpustruct bcm6345_l1_cpu*cpu  >cpusidx
  struct bcm6345_l1_cpu* =  intc-cpus];

  if  if(>)
   if(>map_base)
    iounmap(cpu-   (cpu;
   kfree(cpu);
  }
 }
out_free:
 kfree(intc);
  }
 }

IRQCHIP_DECLARE((intc;