// SPDX-License-Identifier: GPL-2.0-or-later /************************************************************************** * Initio 9100 device driver for Linux. * * Copyright (c) 1994-1998 Initio Corporation * Copyright (c) 1998 Bas Vermeulen <bvermeul@blackstar.xs4all.nl> * Copyright (c) 2004 Christoph Hellwig <hch@lst.de> * Copyright (c) 2007 Red Hat * ************************************************************************* * * DESCRIPTION: * * This is the Linux low-level SCSI driver for Initio INI-9X00U/UW SCSI host * adapters * * 08/06/97 hc - v1.01h * - Support inic-940 and inic-935 * 09/26/97 hc - v1.01i * - Make correction from J.W. Schultz suggestion * 10/13/97 hc - Support reset function * 10/21/97 hc - v1.01j * - Support 32 LUN (SCSI 3) * 01/14/98 hc - v1.01k * - Fix memory allocation problem * 03/04/98 hc - v1.01l * - Fix tape rewind which will hang the system problem * - Set can_queue to initio_num_scb * 06/25/98 hc - v1.01m * - Get it work for kernel version >= 2.1.75 * - Dynamic assign SCSI bus reset holding time in initio_init() * 07/02/98 hc - v1.01n * - Support 0002134A * 08/07/98 hc - v1.01o * - Change the initio_abort_srb routine to use scsi_done. <01> * 09/07/98 hl - v1.02 * - Change the INI9100U define and proc_dir_entry to * reflect the newer Kernel 2.1.118, but the v1.o1o * should work with Kernel 2.1.118. * 09/20/98 wh - v1.02a * - Support Abort command. * - Handle reset routine. * 09/21/98 hl - v1.03 * - remove comments. * 12/09/98 bv - v1.03a * - Removed unused code * 12/13/98 bv - v1.03b * - Remove cli() locking for kernels >= 2.1.95. This uses * spinlocks to serialize access to the pSRB_head and * pSRB_tail members of the HCS structure. * 09/01/99 bv - v1.03d * - Fixed a deadlock problem in SMP. * 21/01/99 bv - v1.03e * - Add support for the Domex 3192U PCI SCSI * This is a slightly modified patch by * Brian Macy <bmacy@sunshinecomputing.com> * 22/02/99 bv - v1.03f * - Didn't detect the INIC-950 in 2.0.x correctly. * Now fixed. * 05/07/99 bv - v1.03g * - Changed the assumption that HZ = 100 * 10/17/03 mc - v1.04 * - added new DMA API support * 06/01/04 jmd - v1.04a * - Re-add reset_bus support
**************************************************************************/
/** * initio_se2_instr - bitbang an instruction * @base: Base of InitIO controller * @instr: Instruction for serial E2PROM * * Bitbang an instruction out to the serial E2Prom
*/
staticvoid initio_se2_instr(unsignedlong base, u8 instr)
{ int i;
u8 b;
outb(SE2CS | SE2DO, base + TUL_NVRAM); /* cs+start bit */
udelay(30);
outb(SE2CS | SE2CLK | SE2DO, base + TUL_NVRAM); /* +CLK */
udelay(30);
for (i = 0; i < 8; i++) { if (instr & 0x80)
b = SE2CS | SE2DO; /* -CLK+dataBit */ else
b = SE2CS; /* -CLK */
outb(b, base + TUL_NVRAM);
udelay(30);
outb(b | SE2CLK, base + TUL_NVRAM); /* +CLK */
udelay(30);
instr <<= 1;
}
outb(SE2CS, base + TUL_NVRAM); /* -CLK */
udelay(30);
}
/** * initio_se2_ew_en - Enable erase/write * @base: Base address of InitIO controller * * Enable erase/write state of serial EEPROM
*/ void initio_se2_ew_en(unsignedlong base)
{
initio_se2_instr(base, 0x30); /* EWEN */
outb(0, base + TUL_NVRAM); /* -CS */
udelay(30);
}
/** * initio_se2_ew_ds - Disable erase/write * @base: Base address of InitIO controller * * Disable erase/write state of serial EEPROM
*/ void initio_se2_ew_ds(unsignedlong base)
{
initio_se2_instr(base, 0); /* EWDS */
outb(0, base + TUL_NVRAM); /* -CS */
udelay(30);
}
/** * initio_se2_rd - read E2PROM word * @base: Base of InitIO controller * @addr: Address of word in E2PROM * * Read a word from the NV E2PROM device
*/ static u16 initio_se2_rd(unsignedlong base, u8 addr)
{
u8 instr, rb;
u16 val = 0; int i;
for (i = 15; i >= 0; i--) {
outb(SE2CS | SE2CLK, base + TUL_NVRAM); /* +CLK */
udelay(30);
outb(SE2CS, base + TUL_NVRAM); /* -CLK */
/* sample data after the following edge of clock */
rb = inb(base + TUL_NVRAM);
rb &= SE2DI;
val += (rb << i);
udelay(30); /* 6/20/95 */
}
outb(0, base + TUL_NVRAM); /* no chip select */
udelay(30); return val;
}
/** * initio_se2_wr - read E2PROM word * @base: Base of InitIO controller * @addr: Address of word in E2PROM * @val: Value to write * * Write a word to the NV E2PROM device. Used when recovering from * a problem with the NV.
*/ staticvoid initio_se2_wr(unsignedlong base, u8 addr, u16 val)
{
u8 instr; int i;
instr = (u8) (addr | 0x40);
initio_se2_instr(base, instr); /* WRITE INSTR */ for (i = 15; i >= 0; i--) { if (val & 0x8000)
outb(SE2CS | SE2DO, base + TUL_NVRAM); /* -CLK+dataBit 1 */ else
outb(SE2CS, base + TUL_NVRAM); /* -CLK+dataBit 0 */
udelay(30);
outb(SE2CS | SE2CLK, base + TUL_NVRAM); /* +CLK */
udelay(30);
val <<= 1;
}
outb(SE2CS, base + TUL_NVRAM); /* -CLK */
udelay(30);
outb(0, base + TUL_NVRAM); /* -CS */
udelay(30);
outb(SE2CS, base + TUL_NVRAM); /* +CS */
udelay(30);
for (;;) {
outb(SE2CS | SE2CLK, base + TUL_NVRAM); /* +CLK */
udelay(30);
outb(SE2CS, base + TUL_NVRAM); /* -CLK */
udelay(30); if (inb(base + TUL_NVRAM) & SE2DI) break; /* write complete */
}
outb(0, base + TUL_NVRAM); /* -CS */
}
/** * initio_se2_rd_all - read hostadapter NV configuration * @base: Base address of InitIO controller * * Reads the E2PROM data into main memory. Ensures that the checksum * and header marker are valid. Returns 1 on success -1 on error.
*/
i91unvramp = &i91unvram;
np = (u16 *) i91unvramp; for (i = 0; i < 32; i++)
*np++ = initio_se2_rd(base, i);
/* Is signature "ini" ok ? */ if (i91unvramp->NVM_Signature != INI_SIGNATURE) return -1; /* Is ckecksum ok ? */
np = (u16 *) i91unvramp; for (i = 0; i < 31; i++)
chksum += *np++; if (i91unvramp->NVM_CheckSum != chksum) return -1; return 1;
}
/** * initio_se2_update_all - Update E2PROM * @base: Base of InitIO controller * * Update the E2PROM by wrting any changes into the E2PROM * chip, rewriting the checksum.
*/ staticvoid initio_se2_update_all(unsignedlong base)
{ /* setup default pattern */ int i;
u16 chksum = 0;
u16 *np, *np1;
i91unvramp = &i91unvram; /* Calculate checksum first */
np = (u16 *) i91udftNvRam; for (i = 0; i < 31; i++)
chksum += *np++;
*np = chksum;
initio_se2_ew_en(base); /* Enable write */
np = (u16 *) i91udftNvRam;
np1 = (u16 *) i91unvramp; for (i = 0; i < 32; i++, np++, np1++) { if (*np != *np1)
initio_se2_wr(base, i, *np);
}
initio_se2_ew_ds(base); /* Disable write */
}
/** * initio_read_eeprom - Retrieve configuration * @base: Base of InitIO Host Adapter * * Retrieve the host adapter configuration data from E2Prom. If the * data is invalid then the defaults are used and are also restored * into the E2PROM. This forms the access point for the SCSI driver * into the E2PROM layer, the other functions for the E2PROM are all * internal use. * * Must be called single threaded, uses a shared global area.
*/
/** * initio_reset_scsi - Reset SCSI host controller * @host: InitIO host to reset * @seconds: Recovery time * * Perform a full reset of the SCSI subsystem.
*/
/* Stall for a while, wait for target's firmware ready,make it 2 sec ! */ /* SONY 5200 tape drive won't work if only stall for 1 sec */ /* FIXME: this is a very long busy wait right now */
initio_do_pause(seconds * HZ);
/** * initio_init - set up an InitIO host adapter * @host: InitIO host adapter * @bios_addr: BIOS address * * Set up the host adapter and devices according to the configuration * retrieved from the E2PROM. * * Locking: Calls E2PROM layer code which is not re-enterable so must * run single threaded for now.
*/
/** * initio_alloc_scb - Allocate an SCB * @host: InitIO host we are allocating for * * Walk the SCB list for the controller and allocate a free SCB if * one exists.
*/ staticstruct scsi_ctrl_blk *initio_alloc_scb(struct initio_host *host)
{ struct scsi_ctrl_blk *scb; unsignedlong flags;
/** * initio_release_scb - Release an SCB * @host: InitIO host that owns the SCB * @cmnd: SCB command block being returned * * Return an allocated SCB to the host free list
*/
for (;;) {
tulip_scsi(host); /* Call tulip_scsi */
/* Walk the list of completed SCBs */ while ((scb = initio_find_done_scb(host)) != NULL) { /* find done entry */ if (scb->tastat == INI_QUEUE_FULL) {
host->max_tags[scb->target] =
host->act_tags[scb->target] - 1;
scb->tastat = 0;
initio_append_pend_scb(host, scb); continue;
} if (!(scb->mode & SCM_RSENS)) { /* not in auto req. sense mode */ if (scb->tastat == 2) {
/* clr sync. nego flag */
if (scb->flags & SCF_SENSE) {
u8 len;
len = scb->senselen; if (len == 0)
len = 1;
scb->buflen = scb->senselen;
scb->bufptr = scb->senseptr;
scb->flags &= ~(SCF_SG | SCF_DIR); /* for xfer_data_in */ /* so, we won't report wrong direction in xfer_data_in,
and won't report HOST_DO_DU in state_6 */
scb->mode = SCM_RSENS;
scb->ident &= 0xBF; /* Disable Disconnect */
scb->tagmsg = 0;
scb->tastat = 0;
scb->cdblen = 6;
scb->cdb[0] = SCSICMD_RequestSense;
scb->cdb[1] = 0;
scb->cdb[2] = 0;
scb->cdb[3] = 0;
scb->cdb[4] = len;
scb->cdb[5] = 0;
initio_push_pend_scb(host, scb); break;
}
}
} else { /* in request sense mode */
if (scb->tastat == 2) { /* check contition status again after sending
requset sense cmd 0x3 */
scb->hastat = HOST_BAD_PHAS;
}
scb->tastat = 2;
}
scb->flags |= SCF_DONE; if (scb->flags & SCF_POST) { /* FIXME: only one post method and lose casts */
(*scb->post) ((u8 *) host, (u8 *) scb);
}
} /* while */ /* find_active: */ if (inb(host->addr + TUL_SStatus0) & TSS_INT_PENDING) continue; if (host->active) /* return to OS and wait for xfer_done_ISR/Selected_ISR */ return 1; /* return to OS, enable interrupt */ /* Check pending SCB */ if (initio_find_first_pend_scb(host) == NULL) return 1; /* return to OS, enable interrupt */
} /* End of for loop */ /* statement won't reach here */
}
/** * initio_next_state - Next SCSI state * @host: InitIO host we are processing * * Progress the active command block along the state machine * until we hit a state which we must wait for activity to occur. * * Returns zero or a negative code.
*/
staticint initio_next_state(struct initio_host * host)
{ int next;
next = host->active->next_state; for (;;) { switch (next) { case 1:
next = initio_state_1(host); break; case 2:
next = initio_state_2(host); break; case 3:
next = initio_state_3(host); break; case 4:
next = initio_state_4(host); break; case 5:
next = initio_state_5(host); break; case 6:
next = initio_state_6(host); break; case 7:
next = initio_state_7(host); break; case 8: return initio_bus_device_reset(host); default: return initio_bad_seq(host);
} if (next <= 0) return next;
}
}
/** * initio_state_1 - SCSI state machine * @host: InitIO host we are controlling * * Perform SCSI state processing for Select/Attention/Stop
*/
/** * initio_state_2 - SCSI state machine * @host: InitIO host we are controlling * * state after selection with attention * state after selection with attention3
*/
#if DEBUG_STATE
printk("-s4-"); #endif if ((scb->flags & SCF_DIR) == SCF_NO_XF) { return 6; /* Go to state 6 (After data) */
} for (;;) { if (scb->buflen == 0) return 6;
switch (host->phase) {
case STATUS_IN: /* Status phase */ if ((scb->flags & SCF_DIR) != 0) /* if direction bit set then report data underrun */
scb->hastat = HOST_DO_DU; if ((initio_status_msg(host)) == -1) return -1; break;
case MSG_IN: /* Message in phase */
scb->next_state = 0x4; if (initio_msgin(host) == -1) return -1; break;
case MSG_OUT: /* Message out phase */ if (host->jsstatus0 & TSS_PAR_ERROR) {
scb->buflen = 0;
scb->hastat = HOST_DO_DU; if (initio_msgout_ide(host) == -1) return -1; return 6;
} else {
outb(NOP, host->addr + TUL_SFifo); /* msg nop */
outb(TSC_XF_FIFO_OUT, host->addr + TUL_SCmd); if (wait_tulip(host) == -1) return -1;
} break;
case DATA_IN: /* Data in phase */ return initio_xfer_data_in(host);
case DATA_OUT: /* Data out phase */ return initio_xfer_data_out(host);
default: return initio_bad_seq(host);
}
}
}
/** * initio_state_5 - SCSI state machine * @host: InitIO host we are controlling * * State after dma xfer done or phase change before xfer done
*/
staticint initio_state_5(struct initio_host * host)
{ struct scsi_ctrl_blk *scb = host->active; long cnt, xcnt; /* cannot use unsigned !! code: if (xcnt < 0) */
if (inb(host->addr + TUL_XCmd) & 0x20) { /* ----------------------- DATA_IN ----------------------------- */ /* check scsi parity error */ if (host->jsstatus0 & TSS_PAR_ERROR)
scb->hastat = HOST_DO_DU; if (inb(host->addr + TUL_XStatus) & XPEND) { /* DMA xfer pending, Send STOP */ /* tell Hardware scsi xfer has been terminated */
outb(inb(host->addr + TUL_XCtrl) | 0x80, host->addr + TUL_XCtrl); /* wait until DMA xfer not pending */ while (inb(host->addr + TUL_XStatus) & XPEND)
cpu_relax();
}
} else { /*-------- DATA OUT -----------*/ if ((inb(host->addr + TUL_SStatus1) & TSS_XFER_CMP) == 0) { if (host->active_tc->js_period & TSC_WIDE_SCSI)
cnt += (inb(host->addr + TUL_SFifoCnt) & 0x1F) << 1; else
cnt += (inb(host->addr + TUL_SFifoCnt) & 0x1F);
} if (inb(host->addr + TUL_XStatus) & XPEND) { /* if DMA xfer is pending, abort DMA xfer */
outb(TAX_X_ABT, host->addr + TUL_XCmd); /* wait Abort DMA xfer done */ while ((inb(host->addr + TUL_Int) & XABT) == 0)
cpu_relax();
} if ((cnt == 1) && (host->phase == DATA_OUT)) {
outb(TSC_XF_FIFO_OUT, host->addr + TUL_SCmd); if (wait_tulip(host) == -1) return -1;
cnt = 0;
} else { if ((inb(host->addr + TUL_SStatus1) & TSS_XFER_CMP) == 0)
outb(TSC_FLUSH_FIFO, host->addr + TUL_SCtrl0);
}
} if (cnt == 0) {
scb->buflen = 0; return 6; /* After Data */
} /* Update active data pointer */
xcnt = (long) scb->buflen - cnt; /* xcnt== bytes already xferred */
scb->buflen = (u32) cnt; /* cnt == bytes left to be xferred */ if (scb->flags & SCF_SG) { struct sg_entry *sgp; unsignedlong i;
sgp = &scb->sglist[scb->sgidx]; for (i = scb->sgidx; i < scb->sgmax; sgp++, i++) {
xcnt -= (long) sgp->len; if (xcnt < 0) { /* this sgp xfer half done */
xcnt += (long) sgp->len; /* xcnt == bytes xferred in this sgp */
sgp->data += (u32) xcnt; /* new ptr to be xfer */
sgp->len -= (u32) xcnt; /* new len to be xfer */
scb->bufptr += ((u32) (i - scb->sgidx) << 3); /* new SG table ptr */
scb->sglen = (u8) (scb->sgmax - i); /* new SG table len */
scb->sgidx = (u16) i; /* for next disc and come in this loop */ return 4; /* Go to state 4 */
} /* else (xcnt >= 0 , i.e. this sgp already xferred */
} /* for */ return 6; /* Go to state 6 */
} else {
scb->bufptr += (u32) xcnt;
} return 4; /* Go to state 4 */
}
/** * initio_state_6 - SCSI state machine * @host: InitIO host we are controlling * * State after Data phase
*/
#if DEBUG_STATE
printk("-s6-"); #endif for (;;) { switch (host->phase) { case STATUS_IN: /* Status phase */ if ((initio_status_msg(host)) == -1) return -1; break;
case MSG_IN: /* Message in phase */
scb->next_state = 6; if ((initio_msgin(host)) == -1) return -1; break;
case MSG_OUT: /* Message out phase */
outb(NOP, host->addr + TUL_SFifo); /* msg nop */
outb(TSC_XF_FIFO_OUT, host->addr + TUL_SCmd); if (wait_tulip(host) == -1) return -1; break;
case DATA_IN: /* Data in phase */ return initio_xpad_in(host);
case DATA_OUT: /* Data out phase */ return initio_xpad_out(host);
default: return initio_bad_seq(host);
}
}
}
/** * initio_state_7 - SCSI state machine * @host: InitIO host we are controlling *
*/
staticint initio_state_7(struct initio_host * host)
{ int cnt, i;
#if DEBUG_STATE
printk("-s7-"); #endif /* flush SCSI FIFO */
cnt = inb(host->addr + TUL_SFifoCnt) & 0x1F; if (cnt) { for (i = 0; i < cnt; i++)
inb(host->addr + TUL_SFifo);
} switch (host->phase) { case DATA_IN: /* Data in phase */ case DATA_OUT: /* Data out phase */ return initio_bad_seq(host); default: return 6; /* Go to state 6 */
}
}
/** * initio_xfer_data_in - Commence data input * @host: InitIO host in use * * Commence a block of data transfer. The transfer itself will * be managed by the controller and we will get a completion (or * failure) interrupt.
*/ staticint initio_xfer_data_in(struct initio_host * host)
{ struct scsi_ctrl_blk *scb = host->active;
if ((scb->flags & SCF_DIR) == SCF_DOUT) return 6; /* wrong direction */
/** * initio_xfer_data_out - Commence data output * @host: InitIO host in use * * Commence a block of data transfer. The transfer itself will * be managed by the controller and we will get a completion (or * failure) interrupt.
*/
/** * int_initio_scsi_rst - SCSI reset occurred * @host: Host seeing the reset * * A SCSI bus reset has occurred. Clean up any pending transfer * the hardware is doing by DMA and then abort all active and * disconnected commands. The mid layer should sort the rest out * for us
*/
/* clr sync nego. done flag */ for (i = 0; i < host->max_tar; i++)
host->targets[i].flags &= ~(TCF_SYNC_DONE | TCF_WDTR_DONE); return -1;
}
/** * int_initio_resel - Reselection occurred * @host: InitIO host adapter * * A SCSI reselection event has been signalled and the interrupt * is now being processed. Work out which command block needs attention * and continue processing that command.
*/
if ((scb = host->active) != NULL) { /* FIXME: Why check and not just clear ? */ if (scb->status & SCB_SELECT) /* if waiting for selection complete */
scb->status &= ~SCB_SELECT;
host->active = NULL;
} /* --------- get target id---------------------- */
tar = inb(host->addr + TUL_SBusId); /* ------ get LUN from Identify message----------- */
lun = inb(host->addr + TUL_SIdent) & 0x0F; /* 07/22/98 from 0x1F -> 0x0F */
active_tc = &host->targets[tar];
host->active_tc = active_tc;
outb(active_tc->sconfig0, host->addr + TUL_SConfig);
outb(active_tc->js_period, host->addr + TUL_SPeriod);
/* ------------- tag queueing ? ------------------- */ if (active_tc->drv_flags & TCF_DRV_EN_TAG) { if ((initio_msgin_accept(host)) == -1) return -1; if (host->phase != MSG_IN) goto no_tag;
outl(1, host->addr + TUL_SCnt0);
outb(TSC_XF_FIFO_IN, host->addr + TUL_SCmd); if (wait_tulip(host) == -1) return -1;
msg = inb(host->addr + TUL_SFifo); /* Read Tag Message */
if (msg < SIMPLE_QUEUE_TAG || msg > ORDERED_QUEUE_TAG) /* Is simple Tag */ goto no_tag;
if (initio_msgin_accept(host) == -1) return -1;
if (host->phase != MSG_IN) goto no_tag;
outl(1, host->addr + TUL_SCnt0);
outb(TSC_XF_FIFO_IN, host->addr + TUL_SCmd); if (wait_tulip(host) == -1) return -1;
tag = inb(host->addr + TUL_SFifo); /* Read Tag ID */
scb = host->scb + tag; if (scb->target != tar || scb->lun != lun) { return initio_msgout_abort_tag(host);
} if (scb->status != SCB_BUSY) { /* 03/24/95 */ return initio_msgout_abort_tag(host);
}
host->active = scb; if ((initio_msgin_accept(host)) == -1) return -1;
} else { /* No tag */
no_tag: if ((scb = initio_find_busy_scb(host, tar | (lun << 8))) == NULL) { return initio_msgout_abort_targ(host);
}
host->active = scb; if (!(active_tc->drv_flags & TCF_DRV_EN_TAG)) { if ((initio_msgin_accept(host)) == -1) return -1;
}
} return 0;
}
/** * int_initio_bad_seq - out of phase * @host: InitIO host flagging event * * We have ended up out of phase somehow. Reset the host controller * and throw all our toys out of the pram. Let the midlayer clean up
*/
while ((scb = initio_pop_busy_scb(host)) != NULL) {
scb->hastat = HOST_BAD_PHAS;
initio_append_done_scb(host, scb);
} for (i = 0; i < host->max_tar; i++)
host->targets[i].flags &= ~(TCF_SYNC_DONE | TCF_WDTR_DONE); return -1;
}
/** * initio_msgout_abort_targ - abort a tag * @host: InitIO host * * Abort when the target/lun does not match or when our SCB is not * busy. Used by untagged commands.
*/
/** * initio_msgout_abort_tag - abort a tag * @host: InitIO host * * Abort when the target/lun does not match or when our SCB is not * busy. Used for tagged commands.
*/
if (initio_msgin_accept(host) != MSG_IN) return host->phase;
/* Get extended msg length */
outl(1, host->addr + TUL_SCnt0);
outb(TSC_XF_FIFO_IN, host->addr + TUL_SCmd); if (wait_tulip(host) == -1) return -1;
len = inb(host->addr + TUL_SFifo);
host->msg[0] = len; for (idx = 1; len != 0; len--) {
if ((initio_msgin_accept(host)) != MSG_IN) return host->phase;
outl(1, host->addr + TUL_SCnt0);
outb(TSC_XF_FIFO_IN, host->addr + TUL_SCmd); if (wait_tulip(host) == -1) return -1;
host->msg[idx++] = inb(host->addr + TUL_SFifo);
} if (host->msg[1] == 1) { /* if it's synchronous data transfer request */
u8 r; if (host->msg[0] != 3) /* if length is not right */ return initio_msgout_reject(host); if (host->active_tc->flags & TCF_NO_SYNC_NEGO) { /* Set OFFSET=0 to do async, nego back */
host->msg[3] = 0;
} else { if (initio_msgin_sync(host) == 0 &&
(host->active_tc->flags & TCF_SYNC_DONE)) {
initio_sync_done(host); return initio_msgin_accept(host);
}
}
r = inb(host->addr + TUL_SSignal);
outb((r & (TSC_SET_ACK | 7)) | TSC_SET_ATN,
host->addr + TUL_SSignal); if (initio_msgin_accept(host) != MSG_OUT) return host->phase; /* sync msg out */
outb(TSC_FLUSH_FIFO, host->addr + TUL_SCtrl0);
host->active_tc->js_period = 0; if (host->msg[2]) /* if 16 bit */
host->active_tc->js_period |= TSC_WIDE_SCSI;
host->active_tc->sconfig0 &= ~TSC_ALT_PERIOD;
outb(host->active_tc->sconfig0, host->addr + TUL_SConfig);
outb(host->active_tc->js_period, host->addr + TUL_SPeriod);
return 1;
}
staticint initio_sync_done(struct initio_host * host)
{ int i;
host->active_tc->flags |= TCF_SYNC_DONE;
if (host->msg[3]) {
host->active_tc->js_period |= host->msg[3]; for (i = 0; i < 8; i++) { if (initio_rate_tbl[i] >= host->msg[2]) /* pick the big one */ break;
}
host->active_tc->js_period |= (i << 4);
host->active_tc->sconfig0 |= TSC_ALT_PERIOD;
}
outb(host->active_tc->sconfig0, host->addr + TUL_SConfig);
outb(host->active_tc->js_period, host->addr + TUL_SPeriod);
Die Informationen auf dieser Webseite wurden
nach bestem Wissen sorgfältig zusammengestellt. Es wird jedoch weder Vollständigkeit, noch Richtigkeit,
noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.