| Quellcodebibliothek Statistik Leitseite products/sources/formale Sprachen/C/Linux/drivers/scsi/lpfc/ (Open Source Betriebssystem Version 6.17.9©) Datei vom 24.10.2025 mit Größe 130 kB |
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Quelle lpfc_hw.h Sprache: C |
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/******************************************************************* * This file is part of the Emulex Linux Device Driver for * * Fibre Channel Host Bus Adapters. * * Copyright (C) 2017-2024 Broadcom. All Rights Reserved. The term * * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * * Copyright (C) 2004-2016 Emulex. All rights reserved. * * EMULEX and SLI are trademarks of Emulex. * * www.broadcom.com * * * * This program is free software; you can redistribute it and/or * * modify it under the terms of version 2 of the GNU General * * Public License as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful. * * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * * TO BE LEGALLY INVALID. See the GNU General Public License for * * more details, a copy of which can be found in the file COPYING * * included with this package. * *******************************************************************/ #define FDMI_DID 0xfffffaU #define NameServer_DID 0xfffffcU #define Fabric_Cntl_DID 0xfffffdU #define Fabric_DID 0xfffffeU #define Bcast_DID 0xffffffU #define Mask_DID 0xffffffU #define CT_DID_MASK 0xffff00U #define Fabric_DID_MASK 0xfff000U #define WELL_KNOWN_DID_MASK 0xfffff0U #define PT2PT_LocalID 1 #define PT2PT_RemoteID 2 #define FF_DEF_EDTOV 2000 /* Default E_D_TOV (2000ms) */ #define FF_DEF_ALTOV 15 /* Default AL_TIME (15ms) */ #define FF_DEF_RATOV 10 /* Default RA_TOV (10s) */ #define FF_DEF_ARBTOV 1900 /* Default ARB_TOV (1900ms) */ #define LPFC_BUF_RING0 64 /* Number of buffers to post to RING 0 */ #define FCELSSIZE 1024 /* maximum ELS transfer size */ #define LPFC_FCP_RING 0 /* ring 0 for FCP initiator commands */ #define LPFC_EXTRA_RING 1 /* ring 1 for other protocols */ #define LPFC_ELS_RING 2 /* ring 2 for ELS commands */ #define SLI2_IOCB_CMD_R0_ENTRIES 172 /* SLI-2 FCP command ring entries */ #define SLI2_IOCB_RSP_R0_ENTRIES 134 /* SLI-2 FCP response ring entries */ #define SLI2_IOCB_CMD_R1_ENTRIES 4 /* SLI-2 extra command ring entries */ #define SLI2_IOCB_RSP_R1_ENTRIES 4 /* SLI-2 extra response ring entries */ #define SLI2_IOCB_CMD_R1XTRA_ENTRIES 36 /* SLI-2 extra FCP cmd ring entries */ #define SLI2_IOCB_RSP_R1XTRA_ENTRIES 52 /* SLI-2 extra FCP rsp ring entries */ #define SLI2_IOCB_CMD_R2_ENTRIES 20 /* SLI-2 ELS command ring entries */ #define SLI2_IOCB_RSP_R2_ENTRIES 20 /* SLI-2 ELS response ring entries */ #define SLI2_IOCB_CMD_R3_ENTRIES 0 #define SLI2_IOCB_RSP_R3_ENTRIES 0 #define SLI2_IOCB_CMD_R3XTRA_ENTRIES 24 #define SLI2_IOCB_RSP_R3XTRA_ENTRIES 32 #define SLI2_IOCB_CMD_SIZE 32 #define SLI2_IOCB_RSP_SIZE 32 #define SLI3_IOCB_CMD_SIZE 128 #define SLI3_IOCB_RSP_SIZE 64 #define LPFC_UNREG_ALL_RPIS_VPORT 0xffff #define LPFC_UNREG_ALL_DFLT_RPIS 0xffffffff /* vendor ID used in SCSI netlink calls */ #define LPFC_NL_VENDOR_ID (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX) #define FW_REV_STR_SIZE 32 /* Common Transport structures and definitions */ union CtRevisionId { /* Structure is in Big Endian format */ struct { uint32_t Revision:8; uint32_t InId:24; } bits; uint32_t word; }; union CtCommandResponse { /* Structure is in Big Endian format */ struct { __be16 CmdRsp; __be16 Size; } bits; uint32_t word; }; /* FC4 Feature bits for RFF_ID */ #define FC4_FEATURE_TARGET 0x1 #define FC4_FEATURE_INIT 0x2 #define FC4_FEATURE_NVME_DISC 0x4 enum rft_word0 { RFT_FCP_REG = (0x1 << 8), }; enum rft_word1 { RFT_NVME_REG = (0x1 << 8), }; enum rft_word3 { RFT_APP_SERV_REG = (0x1 << 0), }; struct lpfc_sli_ct_request { /* Structure is in Big Endian format */ union CtRevisionId RevisionId; uint8_t FsType; uint8_t FsSubType; uint8_t Options; uint8_t Rsrvd1; union CtCommandResponse CommandResponse; uint8_t Rsrvd2; uint8_t ReasonCode; uint8_t Explanation; uint8_t VendorUnique; #define LPFC_CT_PREAMBLE 20 /* Size of CTReq + 4 up to here */ union { __be32 PortID; struct gid { uint8_t PortType; /* for GID_PT requests */ #define GID_PT_N_PORT 1 uint8_t DomainScope; uint8_t AreaScope; uint8_t Fc4Type; /* for GID_FT requests */ } gid; struct gid_ff { uint8_t Flags; uint8_t DomainScope; uint8_t AreaScope; uint8_t rsvd1; uint8_t rsvd2; uint8_t rsvd3; uint8_t Fc4FBits; uint8_t Fc4Type; } gid_ff; struct rft { __be32 port_id; /* For RFT_ID requests */ __be32 fcp_reg; /* rsvd 31:9, fcp_reg 8, rsvd 7:0 */ __be32 nvme_reg; /* rsvd 31:9, nvme_reg 8, rsvd 7:0 */ __be32 word2; __be32 app_serv_reg; /* rsvd 31:1, app_serv_reg 0 */ __be32 word[4]; } rft; struct rnn { uint32_t PortId; /* For RNN_ID requests */ uint8_t wwnn[8]; } rnn; struct rsnn { /* For RSNN_ID requests */ uint8_t wwnn[8]; uint8_t len; uint8_t symbname[255]; } rsnn; struct da_id { /* For DA_ID requests */ uint32_t port_id; } da_id; struct rspn { /* For RSPN_ID requests */ uint32_t PortId; uint8_t len; uint8_t symbname[255]; } rspn; struct gff { uint32_t PortId; } gff; struct gff_acc { uint8_t fbits[128]; } gff_acc; struct gft { uint32_t PortId; } gft; struct gft_acc { uint32_t fc4_types[8]; } gft_acc; #define FCP_TYPE_FEATURE_OFFSET 7 struct rff { uint32_t PortId; uint8_t reserved[2]; uint8_t fbits; uint8_t type_code; /* type=8 for FCP */ } rff; } un; }; #define LPFC_MAX_CT_SIZE (60 * 4096) #define SLI_CT_REVISION 1 #define GID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ sizeof(struct gid)) #define GIDFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ sizeof(struct gid_ff)) #define GFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ sizeof(struct gff)) #define GFT_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ sizeof(struct gft)) #define RFT_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ sizeof(struct rft)) #define RFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ sizeof(struct rff)) #define RNN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ sizeof(struct rnn)) #define RSNN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ sizeof(struct rsnn)) #define DA_ID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ sizeof(struct da_id)) #define RSPN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ sizeof(struct rspn)) /* * FsType Definitions */ #define SLI_CT_MANAGEMENT_SERVICE 0xFA #define SLI_CT_TIME_SERVICE 0xFB #define SLI_CT_DIRECTORY_SERVICE 0xFC #define SLI_CT_FABRIC_CONTROLLER_SERVICE 0xFD /* * Directory Service Subtypes */ #define SLI_CT_DIRECTORY_NAME_SERVER 0x02 /* * Response Codes */ #define SLI_CT_RESPONSE_FS_RJT 0x8001 #define SLI_CT_RESPONSE_FS_ACC 0x8002 /* * Reason Codes */ #define SLI_CT_NO_ADDITIONAL_EXPL 0x0 #define SLI_CT_INVALID_COMMAND 0x01 #define SLI_CT_INVALID_VERSION 0x02 #define SLI_CT_LOGICAL_ERROR 0x03 #define SLI_CT_INVALID_IU_SIZE 0x04 #define SLI_CT_LOGICAL_BUSY 0x05 #define SLI_CT_PROTOCOL_ERROR 0x07 #define SLI_CT_UNABLE_TO_PERFORM_REQ 0x09 #define SLI_CT_REQ_NOT_SUPPORTED 0x0b #define SLI_CT_HBA_INFO_NOT_REGISTERED 0x10 #define SLI_CT_MULTIPLE_HBA_ATTR_OF_SAME_TYPE 0x11 #define SLI_CT_INVALID_HBA_ATTR_BLOCK_LEN 0x12 #define SLI_CT_HBA_ATTR_NOT_PRESENT 0x13 #define SLI_CT_PORT_INFO_NOT_REGISTERED 0x20 #define SLI_CT_MULTIPLE_PORT_ATTR_OF_SAME_TYPE 0x21 #define SLI_CT_INVALID_PORT_ATTR_BLOCK_LEN 0x22 #define SLI_CT_VENDOR_UNIQUE 0xff /* * Name Server SLI_CT_UNABLE_TO_PERFORM_REQ Explanations */ #define SLI_CT_NO_PORT_ID 0x01 #define SLI_CT_NO_PORT_NAME 0x02 #define SLI_CT_NO_NODE_NAME 0x03 #define SLI_CT_NO_CLASS_OF_SERVICE 0x04 #define SLI_CT_NO_IP_ADDRESS 0x05 #define SLI_CT_NO_IPA 0x06 #define SLI_CT_NO_FC4_TYPES 0x07 #define SLI_CT_NO_SYMBOLIC_PORT_NAME 0x08 #define SLI_CT_NO_SYMBOLIC_NODE_NAME 0x09 #define SLI_CT_NO_PORT_TYPE 0x0A #define SLI_CT_ACCESS_DENIED 0x10 #define SLI_CT_INVALID_PORT_ID 0x11 #define SLI_CT_DATABASE_EMPTY 0x12 #define SLI_CT_APP_ID_NOT_AVAILABLE 0x40 /* * Name Server Command Codes */ #define SLI_CTNS_GA_NXT 0x0100 #define SLI_CTNS_GPN_ID 0x0112 #define SLI_CTNS_GNN_ID 0x0113 #define SLI_CTNS_GCS_ID 0x0114 #define SLI_CTNS_GFT_ID 0x0117 #define SLI_CTNS_GSPN_ID 0x0118 #define SLI_CTNS_GPT_ID 0x011A #define SLI_CTNS_GFF_ID 0x011F #define SLI_CTNS_GID_PN 0x0121 #define SLI_CTNS_GID_NN 0x0131 #define SLI_CTNS_GIP_NN 0x0135 #define SLI_CTNS_GIPA_NN 0x0136 #define SLI_CTNS_GSNN_NN 0x0139 #define SLI_CTNS_GNN_IP 0x0153 #define SLI_CTNS_GIPA_IP 0x0156 #define SLI_CTNS_GID_FT 0x0171 #define SLI_CTNS_GID_FF 0x01F1 #define SLI_CTNS_GID_PT 0x01A1 #define SLI_CTNS_RPN_ID 0x0212 #define SLI_CTNS_RNN_ID 0x0213 #define SLI_CTNS_RCS_ID 0x0214 #define SLI_CTNS_RFT_ID 0x0217 #define SLI_CTNS_RSPN_ID 0x0218 #define SLI_CTNS_RPT_ID 0x021A #define SLI_CTNS_RFF_ID 0x021F #define SLI_CTNS_RIP_NN 0x0235 #define SLI_CTNS_RIPA_NN 0x0236 #define SLI_CTNS_RSNN_NN 0x0239 #define SLI_CTNS_DA_ID 0x0300 /* * Port Types */ #define SLI_CTPT_N_PORT 0x01 #define SLI_CTPT_NL_PORT 0x02 #define SLI_CTPT_FNL_PORT 0x03 #define SLI_CTPT_IP 0x04 #define SLI_CTPT_FCP 0x08 #define SLI_CTPT_NVME 0x28 #define SLI_CTPT_NX_PORT 0x7F #define SLI_CTPT_F_PORT 0x81 #define SLI_CTPT_FL_PORT 0x82 #define SLI_CTPT_E_PORT 0x84 #define SLI_CT_LAST_ENTRY 0x80000000 /* Fibre Channel Service Parameter definitions */ #define FC_PH_4_0 6 /* FC-PH version 4.0 */ #define FC_PH_4_1 7 /* FC-PH version 4.1 */ #define FC_PH_4_2 8 /* FC-PH version 4.2 */ #define FC_PH_4_3 9 /* FC-PH version 4.3 */ #define FC_PH_LOW 8 /* Lowest supported FC-PH version */ #define FC_PH_HIGH 9 /* Highest supported FC-PH version */ #define FC_PH3 0x20 /* FC-PH-3 version */ #define FF_FRAME_SIZE 2048 struct lpfc_name { union { struct { #ifdef __BIG_ENDIAN_BITFIELD uint8_t nameType:4; /* FC Word 0, bit 28:31 */ uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit 8:11 of IEEE ext */ #else /* __LITTLE_ENDIAN_BITFIELD */ uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit 8:11 of IEEE ext */ uint8_t nameType:4; /* FC Word 0, bit 28:31 */ #endif #define NAME_IEEE 0x1 /* IEEE name - nameType */ #define NAME_IEEE_EXT 0x2 /* IEEE extended name */ #define NAME_FC_TYPE 0x3 /* FC native name type */ #define NAME_IP_TYPE 0x4 /* IP address */ #define NAME_CCITT_TYPE 0xC #define NAME_CCITT_GR_TYPE 0xE uint8_t IEEEextLsb; /* FC Word 0, bit 16:23, IEEE extended Lsb */ uint8_t IEEE[6]; /* FC IEEE address */ } s; uint8_t wwn[8]; uint64_t name __packed __aligned(4); } u; }; struct csp { uint8_t fcphHigh; /* FC Word 0, byte 0 */ uint8_t fcphLow; uint8_t bbCreditMsb; uint8_t bbCreditLsb; /* FC Word 0, byte 3 */ /* * Word 1 Bit 31 in common service parameter is overloaded. * Word 1 Bit 31 in FLOGI request is multiple NPort request * Word 1 Bit 31 in FLOGI response is clean address bit */ #define clean_address_bit request_multiple_Nport /* Word 1, bit 31 */ /* * Word 1 Bit 30 in common service parameter is overloaded. * Word 1 Bit 30 in FLOGI request is Virtual Fabrics * Word 1 Bit 30 in PLOGI request is random offset */ #define virtual_fabric_support randomOffset /* Word 1, bit 30 */ /* * Word 1 Bit 29 in common service parameter is overloaded. * Word 1 Bit 29 in FLOGI response is multiple NPort assignment * Word 1 Bit 29 in FLOGI/PLOGI request is Valid Vendor Version Level */ #define valid_vendor_ver_level response_multiple_NPort /* Word 1, bit 29 */ #ifdef __BIG_ENDIAN_BITFIELD uint16_t request_multiple_Nport:1; /* FC Word 1, bit 31 */ uint16_t randomOffset:1; /* FC Word 1, bit 30 */ uint16_t response_multiple_NPort:1; /* FC Word 1, bit 29 */ uint16_t fPort:1; /* FC Word 1, bit 28 */ uint16_t altBbCredit:1; /* FC Word 1, bit 27 */ uint16_t edtovResolution:1; /* FC Word 1, bit 26 */ uint16_t multicast:1; /* FC Word 1, bit 25 */ uint16_t app_hdr_support:1; /* FC Word 1, bit 24 */ uint16_t priority_tagging:1; /* FC Word 1, bit 23 */ uint16_t simplex:1; /* FC Word 1, bit 22 */ uint16_t word1Reserved1:3; /* FC Word 1, bit 21:19 */ uint16_t dhd:1; /* FC Word 1, bit 18 */ uint16_t contIncSeqCnt:1; /* FC Word 1, bit 17 */ uint16_t payloadlength:1; /* FC Word 1, bit 16 */ #else /* __LITTLE_ENDIAN_BITFIELD */ uint16_t app_hdr_support:1; /* FC Word 1, bit 24 */ uint16_t multicast:1; /* FC Word 1, bit 25 */ uint16_t edtovResolution:1; /* FC Word 1, bit 26 */ uint16_t altBbCredit:1; /* FC Word 1, bit 27 */ uint16_t fPort:1; /* FC Word 1, bit 28 */ uint16_t response_multiple_NPort:1; /* FC Word 1, bit 29 */ uint16_t randomOffset:1; /* FC Word 1, bit 30 */ uint16_t request_multiple_Nport:1; /* FC Word 1, bit 31 */ uint16_t payloadlength:1; /* FC Word 1, bit 16 */ uint16_t contIncSeqCnt:1; /* FC Word 1, bit 17 */ uint16_t dhd:1; /* FC Word 1, bit 18 */ uint16_t word1Reserved1:3; /* FC Word 1, bit 21:19 */ uint16_t simplex:1; /* FC Word 1, bit 22 */ uint16_t priority_tagging:1; /* FC Word 1, bit 23 */ #endif uint8_t bbRcvSizeMsb; /* Upper nibble is reserved */ uint8_t bbRcvSizeLsb; /* FC Word 1, byte 3 */ union { struct { uint8_t word2Reserved1; /* FC Word 2 byte 0 */ uint8_t totalConcurrSeq; /* FC Word 2 byte 1 */ uint8_t roByCategoryMsb; /* FC Word 2 byte 2 */ uint8_t roByCategoryLsb; /* FC Word 2 byte 3 */ } nPort; uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */ } w2; uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */ }; struct class_parms { #ifdef __BIG_ENDIAN_BITFIELD uint8_t classValid:1; /* FC Word 0, bit 31 */ uint8_t intermix:1; /* FC Word 0, bit 30 */ uint8_t stackedXparent:1; /* FC Word 0, bit 29 */ uint8_t stackedLockDown:1; /* FC Word 0, bit 28 */ uint8_t seqDelivery:1; /* FC Word 0, bit 27 */ uint8_t word0Reserved1:3; /* FC Word 0, bit 24:26 */ #else /* __LITTLE_ENDIAN_BITFIELD */ uint8_t word0Reserved1:3; /* FC Word 0, bit 24:26 */ uint8_t seqDelivery:1; /* FC Word 0, bit 27 */ uint8_t stackedLockDown:1; /* FC Word 0, bit 28 */ uint8_t stackedXparent:1; /* FC Word 0, bit 29 */ uint8_t intermix:1; /* FC Word 0, bit 30 */ uint8_t classValid:1; /* FC Word 0, bit 31 */ #endif uint8_t word0Reserved2; /* FC Word 0, bit 16:23 */ #ifdef __BIG_ENDIAN_BITFIELD uint8_t iCtlXidReAssgn:2; /* FC Word 0, Bit 14:15 */ uint8_t iCtlInitialPa:2; /* FC Word 0, bit 12:13 */ uint8_t iCtlAck0capable:1; /* FC Word 0, bit 11 */ uint8_t iCtlAckNcapable:1; /* FC Word 0, bit 10 */ uint8_t word0Reserved3:2; /* FC Word 0, bit 8: 9 */ #else /* __LITTLE_ENDIAN_BITFIELD */ uint8_t word0Reserved3:2; /* FC Word 0, bit 8: 9 */ uint8_t iCtlAckNcapable:1; /* FC Word 0, bit 10 */ uint8_t iCtlAck0capable:1; /* FC Word 0, bit 11 */ uint8_t iCtlInitialPa:2; /* FC Word 0, bit 12:13 */ uint8_t iCtlXidReAssgn:2; /* FC Word 0, Bit 14:15 */ #endif uint8_t word0Reserved4; /* FC Word 0, bit 0: 7 */ #ifdef __BIG_ENDIAN_BITFIELD uint8_t rCtlAck0capable:1; /* FC Word 1, bit 31 */ uint8_t rCtlAckNcapable:1; /* FC Word 1, bit 30 */ uint8_t rCtlXidInterlck:1; /* FC Word 1, bit 29 */ uint8_t rCtlErrorPolicy:2; /* FC Word 1, bit 27:28 */ uint8_t word1Reserved1:1; /* FC Word 1, bit 26 */ uint8_t rCtlCatPerSeq:2; /* FC Word 1, bit 24:25 */ #else /* __LITTLE_ENDIAN_BITFIELD */ uint8_t rCtlCatPerSeq:2; /* FC Word 1, bit 24:25 */ uint8_t word1Reserved1:1; /* FC Word 1, bit 26 */ uint8_t rCtlErrorPolicy:2; /* FC Word 1, bit 27:28 */ uint8_t rCtlXidInterlck:1; /* FC Word 1, bit 29 */ uint8_t rCtlAckNcapable:1; /* FC Word 1, bit 30 */ uint8_t rCtlAck0capable:1; /* FC Word 1, bit 31 */ #endif uint8_t word1Reserved2; /* FC Word 1, bit 16:23 */ uint8_t rcvDataSizeMsb; /* FC Word 1, bit 8:15 */ uint8_t rcvDataSizeLsb; /* FC Word 1, bit 0: 7 */ uint8_t concurrentSeqMsb; /* FC Word 2, bit 24:31 */ uint8_t concurrentSeqLsb; /* FC Word 2, bit 16:23 */ uint8_t EeCreditSeqMsb; /* FC Word 2, bit 8:15 */ uint8_t EeCreditSeqLsb; /* FC Word 2, bit 0: 7 */ uint8_t openSeqPerXchgMsb; /* FC Word 3, bit 24:31 */ uint8_t openSeqPerXchgLsb; /* FC Word 3, bit 16:23 */ uint8_t word3Reserved1; /* Fc Word 3, bit 8:15 */ uint8_t word3Reserved2; /* Fc Word 3, bit 0: 7 */ }; struct serv_parm { /* Structure is in Big Endian format */ struct csp cmn; struct lpfc_name portName; struct lpfc_name nodeName; struct class_parms cls1; struct class_parms cls2; struct class_parms cls3; struct class_parms cls4; union { uint8_t vendorVersion[16]; struct { uint32_t vid; #define LPFC_VV_EMLX_ID 0x454d4c58 /* EMLX */ uint32_t flags; #define LPFC_VV_SUPPRESS_RSP 1 } vv; } un; }; /* * Virtual Fabric Tagging Header */ struct fc_vft_header { uint32_t word0; #define fc_vft_hdr_r_ctl_SHIFT 24 #define fc_vft_hdr_r_ctl_MASK 0xFF #define fc_vft_hdr_r_ctl_WORD word0 #define fc_vft_hdr_ver_SHIFT 22 #define fc_vft_hdr_ver_MASK 0x3 #define fc_vft_hdr_ver_WORD word0 #define fc_vft_hdr_type_SHIFT 18 #define fc_vft_hdr_type_MASK 0xF #define fc_vft_hdr_type_WORD word0 #define fc_vft_hdr_e_SHIFT 16 #define fc_vft_hdr_e_MASK 0x1 #define fc_vft_hdr_e_WORD word0 #define fc_vft_hdr_priority_SHIFT 13 #define fc_vft_hdr_priority_MASK 0x7 #define fc_vft_hdr_priority_WORD word0 #define fc_vft_hdr_vf_id_SHIFT 1 #define fc_vft_hdr_vf_id_MASK 0xFFF #define fc_vft_hdr_vf_id_WORD word0 uint32_t word1; #define fc_vft_hdr_hopct_SHIFT 24 #define fc_vft_hdr_hopct_MASK 0xFF #define fc_vft_hdr_hopct_WORD word1 }; #include <uapi/scsi/fc/fc_els.h> /* * Application Header */ struct fc_app_header { uint32_t dst_app_id; uint32_t src_app_id; #define LOOPBACK_SRC_APPID 0x4321 uint32_t word2; uint32_t word3; }; /* * dfctl optional header definition */ enum lpfc_fc_dfctl { LPFC_FC_NO_DEVICE_HEADER, LPFC_FC_16B_DEVICE_HEADER, LPFC_FC_32B_DEVICE_HEADER, LPFC_FC_64B_DEVICE_HEADER, }; /* * Extended Link Service LS_COMMAND codes (Payload Word 0) */ #ifdef __BIG_ENDIAN_BITFIELD #define ELS_CMD_MASK 0xffff0000 #define ELS_RSP_MASK 0xff000000 #define ELS_CMD_LS_RJT 0x01000000 #define ELS_CMD_ACC 0x02000000 #define ELS_CMD_PLOGI 0x03000000 #define ELS_CMD_FLOGI 0x04000000 #define ELS_CMD_LOGO 0x05000000 #define ELS_CMD_ABTX 0x06000000 #define ELS_CMD_RCS 0x07000000 #define ELS_CMD_RES 0x08000000 #define ELS_CMD_RSS 0x09000000 #define ELS_CMD_RSI 0x0A000000 #define ELS_CMD_ESTS 0x0B000000 #define ELS_CMD_ESTC 0x0C000000 #define ELS_CMD_ADVC 0x0D000000 #define ELS_CMD_RTV 0x0E000000 #define ELS_CMD_RLS 0x0F000000 #define ELS_CMD_ECHO 0x10000000 #define ELS_CMD_TEST 0x11000000 #define ELS_CMD_RRQ 0x12000000 #define ELS_CMD_REC 0x13000000 #define ELS_CMD_RDP 0x18000000 #define ELS_CMD_RDF 0x19000000 #define ELS_CMD_PRLI 0x20100014 #define ELS_CMD_NVMEPRLI 0x20140018 #define ELS_CMD_PRLO 0x21100014 #define ELS_CMD_PRLO_ACC 0x02100014 #define ELS_CMD_PDISC 0x50000000 #define ELS_CMD_FDISC 0x51000000 #define ELS_CMD_ADISC 0x52000000 #define ELS_CMD_FARP 0x54000000 #define ELS_CMD_FARPR 0x55000000 #define ELS_CMD_RPL 0x57000000 #define ELS_CMD_FAN 0x60000000 #define ELS_CMD_RSCN 0x61040000 #define ELS_CMD_RSCN_XMT 0x61040008 #define ELS_CMD_SCR 0x62000000 #define ELS_CMD_RNID 0x78000000 #define ELS_CMD_LIRR 0x7A000000 #define ELS_CMD_LCB 0x81000000 #define ELS_CMD_FPIN 0x16000000 #define ELS_CMD_EDC 0x17000000 #define ELS_CMD_QFPA 0xB0000000 #define ELS_CMD_UVEM 0xB1000000 #else /* __LITTLE_ENDIAN_BITFIELD */ #define ELS_CMD_MASK 0xffff #define ELS_RSP_MASK 0xff #define ELS_CMD_LS_RJT 0x01 #define ELS_CMD_ACC 0x02 #define ELS_CMD_PLOGI 0x03 #define ELS_CMD_FLOGI 0x04 #define ELS_CMD_LOGO 0x05 #define ELS_CMD_ABTX 0x06 #define ELS_CMD_RCS 0x07 #define ELS_CMD_RES 0x08 #define ELS_CMD_RSS 0x09 #define ELS_CMD_RSI 0x0A #define ELS_CMD_ESTS 0x0B #define ELS_CMD_ESTC 0x0C #define ELS_CMD_ADVC 0x0D #define ELS_CMD_RTV 0x0E #define ELS_CMD_RLS 0x0F #define ELS_CMD_ECHO 0x10 #define ELS_CMD_TEST 0x11 #define ELS_CMD_RRQ 0x12 #define ELS_CMD_REC 0x13 #define ELS_CMD_RDP 0x18 #define ELS_CMD_RDF 0x19 #define ELS_CMD_PRLI 0x14001020 #define ELS_CMD_NVMEPRLI 0x18001420 #define ELS_CMD_PRLO 0x14001021 #define ELS_CMD_PRLO_ACC 0x14001002 #define ELS_CMD_PDISC 0x50 #define ELS_CMD_FDISC 0x51 #define ELS_CMD_ADISC 0x52 #define ELS_CMD_FARP 0x54 #define ELS_CMD_FARPR 0x55 #define ELS_CMD_RPL 0x57 #define ELS_CMD_FAN 0x60 #define ELS_CMD_RSCN 0x0461 #define ELS_CMD_RSCN_XMT 0x08000461 #define ELS_CMD_SCR 0x62 #define ELS_CMD_RNID 0x78 #define ELS_CMD_LIRR 0x7A #define ELS_CMD_LCB 0x81 #define ELS_CMD_FPIN ELS_FPIN #define ELS_CMD_EDC ELS_EDC #define ELS_CMD_QFPA 0xB0 #define ELS_CMD_UVEM 0xB1 #endif /* * LS_RJT Payload Definition */ struct ls_rjt { /* Structure is in Big Endian format */ union { __be32 ls_rjt_error_be; uint32_t lsRjtError; struct { uint8_t lsRjtRsvd0; /* FC Word 0, bit 24:31 */ uint8_t lsRjtRsnCode; /* FC Word 0, bit 16:23 */ /* LS_RJT reason codes */ #define LSRJT_INVALID_CMD 0x01 #define LSRJT_LOGICAL_ERR 0x03 #define LSRJT_LOGICAL_BSY 0x05 #define LSRJT_PROTOCOL_ERR 0x07 #define LSRJT_UNABLE_TPC 0x09 /* Unable to perform command */ #define LSRJT_CMD_UNSUPPORTED 0x0B #define LSRJT_VENDOR_UNIQUE 0xFF /* See Byte 3 */ uint8_t lsRjtRsnCodeExp; /* FC Word 0, bit 8:15 */ /* LS_RJT reason explanation */ #define LSEXP_NOTHING_MORE 0x00 #define LSEXP_SPARM_OPTIONS 0x01 #define LSEXP_SPARM_ICTL 0x03 #define LSEXP_SPARM_RCTL 0x05 #define LSEXP_SPARM_RCV_SIZE 0x07 #define LSEXP_SPARM_CONCUR_SEQ 0x09 #define LSEXP_SPARM_CREDIT 0x0B #define LSEXP_INVALID_PNAME 0x0D #define LSEXP_INVALID_NNAME 0x0E #define LSEXP_INVALID_CSP 0x0F #define LSEXP_INVALID_ASSOC_HDR 0x11 #define LSEXP_ASSOC_HDR_REQ 0x13 #define LSEXP_INVALID_O_SID 0x15 #define LSEXP_INVALID_OX_RX 0x17 #define LSEXP_CMD_IN_PROGRESS 0x19 #define LSEXP_PORT_LOGIN_REQ 0x1E #define LSEXP_INVALID_NPORT_ID 0x1F #define LSEXP_INVALID_SEQ_ID 0x21 #define LSEXP_INVALID_XCHG 0x23 #define LSEXP_INACTIVE_XCHG 0x25 #define LSEXP_RQ_REQUIRED 0x27 #define LSEXP_OUT_OF_RESOURCE 0x29 #define LSEXP_CANT_GIVE_DATA 0x2A #define LSEXP_REQ_UNSUPPORTED 0x2C #define LSEXP_AUTH_REQ 0x48 #define LSEXP_NO_RSRC_ASSIGN 0x52 uint8_t vendorUnique; /* FC Word 0, bit 0: 7 */ } b; } un; }; /* * N_Port Login (FLOGO/PLOGO Request) Payload Definition */ typedef struct _LOGO { /* Structure is in Big Endian format */ union { uint32_t nPortId32; /* Access nPortId as a word */ struct { uint8_t word1Reserved1; /* FC Word 1, bit 31:24 */ uint8_t nPortIdByte0; /* N_port ID bit 16:23 */ uint8_t nPortIdByte1; /* N_port ID bit 8:15 */ uint8_t nPortIdByte2; /* N_port ID bit 0: 7 */ } b; } un; struct lpfc_name portName; /* N_port name field */ } LOGO; /* * FCP Login (PRLI Request / ACC) Payload Definition */ #define PRLX_PAGE_LEN 0x10 #define TPRLO_PAGE_LEN 0x14 typedef struct _PRLI { /* Structure is in Big Endian format */ uint8_t prliType; /* FC Parm Word 0, bit 24:31 */ #define PRLI_FCP_TYPE 0x08 #define PRLI_NVME_TYPE 0x28 uint8_t word0Reserved1; /* FC Parm Word 0, bit 16:23 */ #ifdef __BIG_ENDIAN_BITFIELD uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ uint8_t estabImagePair:1; /* FC Parm Word 0, bit 13 */ /* ACC = imagePairEstablished */ uint8_t word0Reserved2:1; /* FC Parm Word 0, bit 12 */ uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ #else /* __LITTLE_ENDIAN_BITFIELD */ uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ uint8_t word0Reserved2:1; /* FC Parm Word 0, bit 12 */ uint8_t estabImagePair:1; /* FC Parm Word 0, bit 13 */ uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ /* ACC = imagePairEstablished */ #endif #define PRLI_REQ_EXECUTED 0x1 /* acceptRspCode */ #define PRLI_NO_RESOURCES 0x2 #define PRLI_INIT_INCOMPLETE 0x3 #define PRLI_NO_SUCH_PA 0x4 #define PRLI_PREDEF_CONFIG 0x5 #define PRLI_PARTIAL_SUCCESS 0x6 #define PRLI_INVALID_PAGE_CNT 0x7 #define PRLI_INV_SRV_PARM 0x8 uint8_t word0Reserved3; /* FC Parm Word 0, bit 0:7 */ uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */ uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */ uint8_t word3Reserved1; /* FC Parm Word 3, bit 24:31 */ uint8_t word3Reserved2; /* FC Parm Word 3, bit 16:23 */ #ifdef __BIG_ENDIAN_BITFIELD uint16_t Word3bit15Resved:1; /* FC Parm Word 3, bit 15 */ uint16_t Word3bit14Resved:1; /* FC Parm Word 3, bit 14 */ uint16_t Word3bit13Resved:1; /* FC Parm Word 3, bit 13 */ uint16_t Word3bit12Resved:1; /* FC Parm Word 3, bit 12 */ uint16_t Word3bit11Resved:1; /* FC Parm Word 3, bit 11 */ uint16_t Word3bit10Resved:1; /* FC Parm Word 3, bit 10 */ uint16_t TaskRetryIdReq:1; /* FC Parm Word 3, bit 9 */ uint16_t Retry:1; /* FC Parm Word 3, bit 8 */ uint16_t ConfmComplAllowed:1; /* FC Parm Word 3, bit 7 */ uint16_t dataOverLay:1; /* FC Parm Word 3, bit 6 */ uint16_t initiatorFunc:1; /* FC Parm Word 3, bit 5 */ uint16_t targetFunc:1; /* FC Parm Word 3, bit 4 */ uint16_t cmdDataMixEna:1; /* FC Parm Word 3, bit 3 */ uint16_t dataRspMixEna:1; /* FC Parm Word 3, bit 2 */ uint16_t readXferRdyDis:1; /* FC Parm Word 3, bit 1 */ uint16_t writeXferRdyDis:1; /* FC Parm Word 3, bit 0 */ #else /* __LITTLE_ENDIAN_BITFIELD */ uint16_t Retry:1; /* FC Parm Word 3, bit 8 */ uint16_t TaskRetryIdReq:1; /* FC Parm Word 3, bit 9 */ uint16_t Word3bit10Resved:1; /* FC Parm Word 3, bit 10 */ uint16_t Word3bit11Resved:1; /* FC Parm Word 3, bit 11 */ uint16_t Word3bit12Resved:1; /* FC Parm Word 3, bit 12 */ uint16_t Word3bit13Resved:1; /* FC Parm Word 3, bit 13 */ uint16_t Word3bit14Resved:1; /* FC Parm Word 3, bit 14 */ uint16_t Word3bit15Resved:1; /* FC Parm Word 3, bit 15 */ uint16_t writeXferRdyDis:1; /* FC Parm Word 3, bit 0 */ uint16_t readXferRdyDis:1; /* FC Parm Word 3, bit 1 */ uint16_t dataRspMixEna:1; /* FC Parm Word 3, bit 2 */ uint16_t cmdDataMixEna:1; /* FC Parm Word 3, bit 3 */ uint16_t targetFunc:1; /* FC Parm Word 3, bit 4 */ uint16_t initiatorFunc:1; /* FC Parm Word 3, bit 5 */ uint16_t dataOverLay:1; /* FC Parm Word 3, bit 6 */ uint16_t ConfmComplAllowed:1; /* FC Parm Word 3, bit 7 */ #endif } PRLI; /* * FCP Logout (PRLO Request / ACC) Payload Definition */ typedef struct _PRLO { /* Structure is in Big Endian format */ uint8_t prloType; /* FC Parm Word 0, bit 24:31 */ #define PRLO_FCP_TYPE 0x08 uint8_t word0Reserved1; /* FC Parm Word 0, bit 16:23 */ #ifdef __BIG_ENDIAN_BITFIELD uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ uint8_t word0Reserved2:2; /* FC Parm Word 0, bit 12:13 */ uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ #else /* __LITTLE_ENDIAN_BITFIELD */ uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ uint8_t word0Reserved2:2; /* FC Parm Word 0, bit 12:13 */ uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ #endif #define PRLO_REQ_EXECUTED 0x1 /* acceptRspCode */ #define PRLO_NO_SUCH_IMAGE 0x4 #define PRLO_INVALID_PAGE_CNT 0x7 uint8_t word0Reserved3; /* FC Parm Word 0, bit 0:7 */ uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */ uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */ uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */ } PRLO; typedef struct _ADISC { /* Structure is in Big Endian format */ uint32_t hardAL_PA; struct lpfc_name portName; struct lpfc_name nodeName; uint32_t DID; } ADISC; typedef struct _FARP { /* Structure is in Big Endian format */ uint32_t Mflags:8; uint32_t Odid:24; #define FARP_NO_ACTION 0 /* FARP information enclosed, no action */ #define FARP_MATCH_PORT 0x1 /* Match on Responder Port Name */ #define FARP_MATCH_NODE 0x2 /* Match on Responder Node Name */ #define FARP_MATCH_IP 0x4 /* Match on IP address, not supported */ #define FARP_MATCH_IPV4 0x5 /* Match on IPV4 address, not supported */ #define FARP_MATCH_IPV6 0x6 /* Match on IPV6 address, not supported */ uint32_t Rflags:8; uint32_t Rdid:24; #define FARP_REQUEST_PLOGI 0x1 /* Request for PLOGI */ #define FARP_REQUEST_FARPR 0x2 /* Request for FARP Response */ struct lpfc_name OportName; struct lpfc_name OnodeName; struct lpfc_name RportName; struct lpfc_name RnodeName; uint8_t Oipaddr[16]; uint8_t Ripaddr[16]; } FARP; typedef struct _FAN { /* Structure is in Big Endian format */ uint32_t Fdid; struct lpfc_name FportName; struct lpfc_name FnodeName; } FAN; typedef struct _SCR { /* Structure is in Big Endian format */ uint8_t resvd1; uint8_t resvd2; uint8_t resvd3; uint8_t Function; #define SCR_FUNC_FABRIC 0x01 #define SCR_FUNC_NPORT 0x02 #define SCR_FUNC_FULL 0x03 #define SCR_CLEAR 0xff } SCR; typedef struct _RNID_TOP_DISC { struct lpfc_name portName; uint8_t resvd[8]; uint32_t unitType; #define RNID_HBA 0x7 #define RNID_HOST 0xa #define RNID_DRIVER 0xd uint32_t physPort; uint32_t attachedNodes; uint16_t ipVersion; #define RNID_IPV4 0x1 #define RNID_IPV6 0x2 uint16_t UDPport; uint8_t ipAddr[16]; uint16_t resvd1; uint16_t flags; #define RNID_TD_SUPPORT 0x1 #define RNID_LP_VALID 0x2 } RNID_TOP_DISC; typedef struct _RNID { /* Structure is in Big Endian format */ uint8_t Format; #define RNID_TOPOLOGY_DISC 0xdf uint8_t CommonLen; uint8_t resvd1; uint8_t SpecificLen; struct lpfc_name portName; struct lpfc_name nodeName; union { RNID_TOP_DISC topologyDisc; /* topology disc (0xdf) */ } un; } RNID; struct RLS { /* Structure is in Big Endian format */ uint32_t rls; #define rls_rsvd_SHIFT 24 #define rls_rsvd_MASK 0x000000ff #define rls_rsvd_WORD rls #define rls_did_SHIFT 0 #define rls_did_MASK 0x00ffffff #define rls_did_WORD rls }; struct RLS_RSP { /* Structure is in Big Endian format */ uint32_t linkFailureCnt; uint32_t lossSyncCnt; uint32_t lossSignalCnt; uint32_t primSeqErrCnt; uint32_t invalidXmitWord; uint32_t crcCnt; }; struct RRQ { /* Structure is in Big Endian format */ uint32_t rrq; #define rrq_rsvd_SHIFT 24 #define rrq_rsvd_MASK 0x000000ff #define rrq_rsvd_WORD rrq #define rrq_did_SHIFT 0 #define rrq_did_MASK 0x00ffffff #define rrq_did_WORD rrq uint32_t rrq_exchg; #define rrq_oxid_SHIFT 16 #define rrq_oxid_MASK 0xffff #define rrq_oxid_WORD rrq_exchg #define rrq_rxid_SHIFT 0 #define rrq_rxid_MASK 0xffff #define rrq_rxid_WORD rrq_exchg }; #define LPFC_MAX_VFN_PER_PFN 255 /* Maximum VFs allowed per ARI */ #define LPFC_DEF_VFN_PER_PFN 0 /* Default VFs due to platform limitation*/ struct RTV_RSP { /* Structure is in Big Endian format */ uint32_t ratov; uint32_t edtov; uint32_t qtov; #define qtov_rsvd0_SHIFT 28 #define qtov_rsvd0_MASK 0x0000000f #define qtov_rsvd0_WORD qtov /* reserved */ #define qtov_edtovres_SHIFT 27 #define qtov_edtovres_MASK 0x00000001 #define qtov_edtovres_WORD qtov /* E_D_TOV Resolution */ #define qtov__rsvd1_SHIFT 19 #define qtov_rsvd1_MASK 0x0000003f #define qtov_rsvd1_WORD qtov /* reserved */ #define qtov_rttov_SHIFT 18 #define qtov_rttov_MASK 0x00000001 #define qtov_rttov_WORD qtov /* R_T_TOV value */ #define qtov_rsvd2_SHIFT 0 #define qtov_rsvd2_MASK 0x0003ffff #define qtov_rsvd2_WORD qtov /* reserved */ }; typedef struct _RPL { /* Structure is in Big Endian format */ uint32_t maxsize; uint32_t index; } RPL; typedef struct _PORT_NUM_BLK { uint32_t portNum; uint32_t portID; struct lpfc_name portName; } PORT_NUM_BLK; typedef struct _RPL_RSP { /* Structure is in Big Endian format */ uint32_t listLen; uint32_t index; PORT_NUM_BLK port_num_blk; } RPL_RSP; /* This is used for RSCN command */ typedef struct _D_ID { /* Structure is in Big Endian format */ union { uint32_t word; struct { #ifdef __BIG_ENDIAN_BITFIELD uint8_t resv; uint8_t domain; uint8_t area; uint8_t id; #else /* __LITTLE_ENDIAN_BITFIELD */ uint8_t id; uint8_t area; uint8_t domain; uint8_t resv; #endif } b; } un; } D_ID; #define RSCN_ADDRESS_FORMAT_PORT 0x0 #define RSCN_ADDRESS_FORMAT_AREA 0x1 #define RSCN_ADDRESS_FORMAT_DOMAIN 0x2 #define RSCN_ADDRESS_FORMAT_FABRIC 0x3 #define RSCN_ADDRESS_FORMAT_MASK 0x3 /* * Structure to define all ELS Payload types */ typedef struct _ELS_PKT { /* Structure is in Big Endian format */ uint8_t elsCode; /* FC Word 0, bit 24:31 */ uint8_t elsByte1; uint8_t elsByte2; uint8_t elsByte3; union { struct ls_rjt lsRjt; /* Payload for LS_RJT ELS response */ struct serv_parm logi; /* Payload for PLOGI/FLOGI/PDISC/ACC */ LOGO logo; /* Payload for PLOGO/FLOGO/ACC */ PRLI prli; /* Payload for PRLI/ACC */ PRLO prlo; /* Payload for PRLO/ACC */ ADISC adisc; /* Payload for ADISC/ACC */ FARP farp; /* Payload for FARP/ACC */ FAN fan; /* Payload for FAN */ SCR scr; /* Payload for SCR/ACC */ RNID rnid; /* Payload for RNID */ uint8_t pad[128 - 4]; /* Pad out to payload of 128 bytes */ } un; } ELS_PKT; /* * Link Cable Beacon (LCB) ELS Frame */ struct fc_lcb_request_frame { uint32_t lcb_command; /* ELS command opcode (0x81) */ uint8_t lcb_sub_command;/* LCB Payload Word 1, bit 24:31 */ #define LPFC_LCB_ON 0x1 #define LPFC_LCB_OFF 0x2 uint8_t reserved[2]; uint8_t capability; /* LCB Payload Word 1, bit 0:7 */ uint8_t lcb_type; /* LCB Payload Word 2, bit 24:31 */ #define LPFC_LCB_GREEN 0x1 #define LPFC_LCB_AMBER 0x2 uint8_t lcb_frequency; /* LCB Payload Word 2, bit 16:23 */ #define LCB_CAPABILITY_DURATION 1 #define BEACON_VERSION_V1 1 #define BEACON_VERSION_V0 0 uint16_t lcb_duration; /* LCB Payload Word 2, bit 15:0 */ }; /* * Link Cable Beacon (LCB) ELS Response Frame */ struct fc_lcb_res_frame { uint32_t lcb_ls_acc; /* Acceptance of LCB request (0x02) */ uint8_t lcb_sub_command;/* LCB Payload Word 1, bit 24:31 */ uint8_t reserved[2]; uint8_t capability; /* LCB Payload Word 1, bit 0:7 */ uint8_t lcb_type; /* LCB Payload Word 2, bit 24:31 */ uint8_t lcb_frequency; /* LCB Payload Word 2, bit 16:23 */ uint16_t lcb_duration; /* LCB Payload Word 2, bit 15:0 */ }; /* * Read Diagnostic Parameters (RDP) ELS frame. */ #define SFF_PG0_IDENT_SFP 0x3 #define SFP_FLAG_PT_OPTICAL 0x0 #define SFP_FLAG_PT_SWLASER 0x01 #define SFP_FLAG_PT_LWLASER_LC1310 0x02 #define SFP_FLAG_PT_LWLASER_LL1550 0x03 #define SFP_FLAG_PT_MASK 0x0F #define SFP_FLAG_PT_SHIFT 0 #define SFP_FLAG_IS_OPTICAL_PORT 0x01 #define SFP_FLAG_IS_OPTICAL_MASK 0x010 #define SFP_FLAG_IS_OPTICAL_SHIFT 4 #define SFP_FLAG_IS_DESC_VALID 0x01 #define SFP_FLAG_IS_DESC_VALID_MASK 0x020 #define SFP_FLAG_IS_DESC_VALID_SHIFT 5 #define SFP_FLAG_CT_UNKNOWN 0x0 #define SFP_FLAG_CT_SFP_PLUS 0x01 #define SFP_FLAG_CT_MASK 0x3C #define SFP_FLAG_CT_SHIFT 6 struct fc_rdp_port_name_info { uint8_t wwnn[8]; uint8_t wwpn[8]; }; /* * Link Error Status Block Structure (FC-FS-3) for RDP * This similar to RPS ELS */ struct fc_link_status { uint32_t link_failure_cnt; uint32_t loss_of_synch_cnt; uint32_t loss_of_signal_cnt; uint32_t primitive_seq_proto_err; uint32_t invalid_trans_word; uint32_t invalid_crc_cnt; }; #define RDP_PORT_NAMES_DESC_TAG 0x00010003 struct fc_rdp_port_name_desc { uint32_t tag; /* 0001 0003h */ uint32_t length; /* set to size of payload struct */ struct fc_rdp_port_name_info port_names; }; struct fc_rdp_fec_info { uint32_t CorrectedBlocks; uint32_t UncorrectableBlocks; }; #define RDP_FEC_DESC_TAG 0x00010005 struct fc_fec_rdp_desc { uint32_t tag; uint32_t length; struct fc_rdp_fec_info info; }; struct fc_rdp_link_error_status_payload_info { struct fc_link_status link_status; /* 24 bytes */ uint32_t port_type; /* bits 31-30 only */ }; #define RDP_LINK_ERROR_STATUS_DESC_TAG 0x00010002 struct fc_rdp_link_error_status_desc { uint32_t tag; /* 0001 0002h */ uint32_t length; /* set to size of payload struct */ struct fc_rdp_link_error_status_payload_info info; }; #define VN_PT_PHY_UNKNOWN 0x00 #define VN_PT_PHY_PF_PORT 0x01 #define VN_PT_PHY_ETH_MAC 0x10 #define VN_PT_PHY_SHIFT 30 #define RDP_PS_1GB 0x8000 #define RDP_PS_2GB 0x4000 #define RDP_PS_4GB 0x2000 #define RDP_PS_10GB 0x1000 #define RDP_PS_8GB 0x0800 #define RDP_PS_16GB 0x0400 #define RDP_PS_32GB 0x0200 #define RDP_PS_64GB 0x0100 #define RDP_PS_128GB 0x0080 #define RDP_PS_256GB 0x0040 #define RDP_CAP_USER_CONFIGURED 0x0002 #define RDP_CAP_UNKNOWN 0x0001 #define RDP_PS_UNKNOWN 0x0002 #define RDP_PS_NOT_ESTABLISHED 0x0001 struct fc_rdp_port_speed { uint16_t capabilities; uint16_t speed; }; struct fc_rdp_port_speed_info { struct fc_rdp_port_speed port_speed; }; #define RDP_PORT_SPEED_DESC_TAG 0x00010001 struct fc_rdp_port_speed_desc { uint32_t tag; /* 00010001h */ uint32_t length; /* set to size of payload struct */ struct fc_rdp_port_speed_info info; }; #define RDP_NPORT_ID_SIZE 4 #define RDP_N_PORT_DESC_TAG 0x00000003 struct fc_rdp_nport_desc { uint32_t tag; /* 0000 0003h, big endian */ uint32_t length; /* size of RDP_N_PORT_ID struct */ uint32_t nport_id : 12; uint32_t reserved : 8; }; struct fc_rdp_link_service_info { uint32_t els_req; /* Request payload word 0 value.*/ }; #define RDP_LINK_SERVICE_DESC_TAG 0x00000001 struct fc_rdp_link_service_desc { uint32_t tag; /* Descriptor tag 1 */ uint32_t length; /* set to size of payload struct. */ struct fc_rdp_link_service_info payload; /* must be ELS req Word 0(0x18) */ }; struct fc_rdp_sfp_info { uint16_t temperature; uint16_t vcc; uint16_t tx_bias; uint16_t tx_power; uint16_t rx_power; uint16_t flags; }; #define RDP_SFP_DESC_TAG 0x00010000 struct fc_rdp_sfp_desc { uint32_t tag; uint32_t length; /* set to size of sfp_info struct */ struct fc_rdp_sfp_info sfp_info; }; /* Buffer Credit Descriptor */ struct fc_rdp_bbc_info { uint32_t port_bbc; /* FC_Port buffer-to-buffer credit */ uint32_t attached_port_bbc; uint32_t rtt; /* Round trip time */ }; #define RDP_BBC_DESC_TAG 0x00010006 struct fc_rdp_bbc_desc { uint32_t tag; uint32_t length; struct fc_rdp_bbc_info bbc_info; }; /* Optical Element Type Transgression Flags */ #define RDP_OET_LOW_WARNING 0x1 #define RDP_OET_HIGH_WARNING 0x2 #define RDP_OET_LOW_ALARM 0x4 #define RDP_OET_HIGH_ALARM 0x8 #define RDP_OED_TEMPERATURE 0x1 #define RDP_OED_VOLTAGE 0x2 #define RDP_OED_TXBIAS 0x3 #define RDP_OED_TXPOWER 0x4 #define RDP_OED_RXPOWER 0x5 #define RDP_OED_TYPE_SHIFT 28 /* Optical Element Data descriptor */ struct fc_rdp_oed_info { uint16_t hi_alarm; uint16_t lo_alarm; uint16_t hi_warning; uint16_t lo_warning; uint32_t function_flags; }; #define RDP_OED_DESC_TAG 0x00010007 struct fc_rdp_oed_sfp_desc { uint32_t tag; uint32_t length; struct fc_rdp_oed_info oed_info; }; /* Optical Product Data descriptor */ struct fc_rdp_opd_sfp_info { uint8_t vendor_name[16]; uint8_t model_number[16]; uint8_t serial_number[16]; uint8_t revision[4]; uint8_t date[8]; }; #define RDP_OPD_DESC_TAG 0x00010008 struct fc_rdp_opd_sfp_desc { uint32_t tag; uint32_t length; struct fc_rdp_opd_sfp_info opd_info; }; struct fc_rdp_req_frame { uint32_t rdp_command; /* ELS command opcode (0x18)*/ uint32_t rdp_des_length; /* RDP Payload Word 1 */ struct fc_rdp_nport_desc nport_id_desc; /* RDP Payload Word 2 - 4 */ }; struct fc_rdp_res_frame { uint32_t reply_sequence; /* FC word0 LS_ACC or LS_RJT */ uint32_t length; /* FC Word 1 */ struct fc_rdp_link_service_desc link_service_desc; /* Word 2 -4 */ struct fc_rdp_sfp_desc sfp_desc; /* Word 5 -9 */ struct fc_rdp_port_speed_desc portspeed_desc; /* Word 10 -12 */ struct fc_rdp_link_error_status_desc link_error_desc; /* Word 13 -21 */ struct fc_rdp_port_name_desc diag_port_names_desc; /* Word 22 -27 */ struct fc_rdp_port_name_desc attached_port_names_desc;/* Word 28 -33 */ struct fc_fec_rdp_desc fec_desc; /* FC word 34-37*/ struct fc_rdp_bbc_desc bbc_desc; /* FC Word 38-42*/ struct fc_rdp_oed_sfp_desc oed_temp_desc; /* FC Word 43-47*/ struct fc_rdp_oed_sfp_desc oed_voltage_desc; /* FC word 48-52*/ struct fc_rdp_oed_sfp_desc oed_txbias_desc; /* FC word 53-57*/ struct fc_rdp_oed_sfp_desc oed_txpower_desc; /* FC word 58-62*/ struct fc_rdp_oed_sfp_desc oed_rxpower_desc; /* FC word 63-67*/ struct fc_rdp_opd_sfp_desc opd_desc; /* FC word 68-84*/ }; /* UVEM */ #define LPFC_UVEM_SIZE 60 #define LPFC_UVEM_VEM_ID_DESC_SIZE 16 #define LPFC_UVEM_VE_MAP_DESC_SIZE 20 #define VEM_ID_DESC_TAG 0x0001000A struct lpfc_vem_id_desc { uint32_t tag; uint32_t length; uint8_t vem_id[16]; }; #define LPFC_QFPA_SIZE 4 #define INSTANTIATED_VE_DESC_TAG 0x0001000B struct instantiated_ve_desc { uint32_t tag; uint32_t length; uint8_t global_vem_id[16]; uint32_t word6; #define lpfc_instantiated_local_id_SHIFT 0 #define lpfc_instantiated_local_id_MASK 0x000000ff #define lpfc_instantiated_local_id_WORD word6 #define lpfc_instantiated_nport_id_SHIFT 8 #define lpfc_instantiated_nport_id_MASK 0x00ffffff #define lpfc_instantiated_nport_id_WORD word6 }; #define DEINSTANTIATED_VE_DESC_TAG 0x0001000C struct deinstantiated_ve_desc { uint32_t tag; uint32_t length; uint8_t global_vem_id[16]; uint32_t word6; #define lpfc_deinstantiated_nport_id_SHIFT 0 #define lpfc_deinstantiated_nport_id_MASK 0x000000ff #define lpfc_deinstantiated_nport_id_WORD word6 #define lpfc_deinstantiated_local_id_SHIFT 24 #define lpfc_deinstantiated_local_id_MASK 0x00ffffff #define lpfc_deinstantiated_local_id_WORD word6 }; /* Query Fabric Priority Allocation Response */ #define LPFC_PRIORITY_RANGE_DESC_SIZE 12 struct priority_range_desc { uint32_t tag; uint32_t length; uint8_t lo_range; uint8_t hi_range; uint8_t qos_priority; uint8_t local_ve_id; }; struct fc_qfpa_res { uint32_t reply_sequence; /* LS_ACC or LS_RJT */ uint32_t length; /* FC Word 1 */ struct priority_range_desc desc[1]; }; /* Application Server command code */ /* VMID */ #define SLI_CT_APP_SEV_Subtypes 0x20 /* Application Server subtype */ #define SLI_CTAS_GAPPIA_ENT 0x0100 /* Get Application Identifier */ #define SLI_CTAS_GALLAPPIA 0x0101 /* Get All Application Identifier */ #define SLI_CTAS_GALLAPPIA_ID 0x0102 /* Get All Application Identifier */ /* for Nport */ #define SLI_CTAS_GAPPIA_IDAPP 0x0103 /* Get Application Identifier */ /* for Nport */ #define SLI_CTAS_RAPP_IDENT 0x0200 /* Register Application Identifier */ #define SLI_CTAS_DAPP_IDENT 0x0300 /* Deregister Application */ /* Identifier */ #define SLI_CTAS_DALLAPP_ID 0x0301 /* Deregister All Application */ /* Identifier */ struct entity_id_object { uint8_t entity_id_len; uint8_t entity_id[255]; /* VM UUID */ }; struct app_id_object { __be32 port_id; __be32 app_id; struct entity_id_object obj; }; struct lpfc_vmid_rapp_ident_list { __be32 no_of_objects; struct entity_id_object obj[]; }; struct lpfc_vmid_dapp_ident_list { __be32 no_of_objects; struct entity_id_object obj[]; }; #define GALLAPPIA_ID_LAST 0x80 struct lpfc_vmid_gallapp_ident_list { uint8_t control; uint8_t reserved[3]; struct app_id_object app_id; }; #define RAPP_IDENT_OFFSET (offsetof(struct lpfc_sli_ct_request, un) + 4) #define DAPP_IDENT_OFFSET (offsetof(struct lpfc_sli_ct_request, un) + 4) #define GALLAPPIA_ID_SIZE (offsetof(struct lpfc_sli_ct_request, un) + 4) #define DALLAPP_ID_SIZE (offsetof(struct lpfc_sli_ct_request, un) + 4) /******** FDMI ********/ /* lpfc_sli_ct_request defines the CT_IU preamble for FDMI commands */ #define SLI_CT_FDMI_Subtypes 0x10 /* Management Service Subtype */ /* Definitions for HBA / Port attribute entries */ /* Attribute Entry Structures */ struct lpfc_fdmi_attr_u32 { __be16 type; __be16 len; __be32 value_u32; }; struct lpfc_fdmi_attr_wwn { __be16 type; __be16 len; /* Keep as u8[8] instead of __be64 to avoid accidental zero padding * by compiler */ u8 name[8]; }; struct lpfc_fdmi_attr_fullwwn { __be16 type; __be16 len; /* Keep as u8[8] instead of __be64 to avoid accidental zero padding * by compiler */ u8 nname[8]; u8 pname[8]; }; struct lpfc_fdmi_attr_fc4types { __be16 type; __be16 len; u8 value_types[32]; }; struct lpfc_fdmi_attr_string { __be16 type; __be16 len; char value_string[256]; }; /* Maximum FDMI attribute length is Type+Len (4 bytes) + 256 byte string */ #define FDMI_MAX_ATTRLEN sizeof(struct lpfc_fdmi_attr_string) /* * HBA Attribute Block */ struct lpfc_fdmi_attr_block { uint32_t EntryCnt; /* Number of HBA attribute entries */ /* Variable Length Attribute Entry TLV's follow */ }; /* * Port Entry */ struct lpfc_fdmi_port_entry { struct lpfc_name PortName; }; /* * HBA Identifier */ struct lpfc_fdmi_hba_ident { struct lpfc_name PortName; }; /* * Registered Port List Format */ struct lpfc_fdmi_reg_port_list { __be32 EntryCnt; struct lpfc_fdmi_port_entry pe; }; /* * Register HBA(RHBA) */ struct lpfc_fdmi_reg_hba { struct lpfc_fdmi_hba_ident hi; struct lpfc_fdmi_reg_port_list rpl; }; /******** MI MIB ********/ #define SLI_CT_MIB_Subtypes 0x11 /* * Register HBA Attributes (RHAT) */ struct lpfc_fdmi_reg_hbaattr { struct lpfc_name HBA_PortName; struct lpfc_fdmi_attr_block ab; }; /* * Register Port Attributes (RPA) */ struct lpfc_fdmi_reg_portattr { struct lpfc_name PortName; struct lpfc_fdmi_attr_block ab; }; /* * HBA MAnagement Operations Command Codes */ #define SLI_MGMT_GRHL 0x100 /* Get registered HBA list */ #define SLI_MGMT_GHAT 0x101 /* Get HBA attributes */ #define SLI_MGMT_GRPL 0x102 /* Get registered Port list */ #define SLI_MGMT_GPAT 0x110 /* Get Port attributes */ #define SLI_MGMT_GPAS 0x120 /* Get Port Statistics */ #define SLI_MGMT_RHBA 0x200 /* Register HBA */ #define SLI_MGMT_RHAT 0x201 /* Register HBA attributes */ #define SLI_MGMT_RPRT 0x210 /* Register Port */ #define SLI_MGMT_RPA 0x211 /* Register Port attributes */ #define SLI_MGMT_DHBA 0x300 /* De-register HBA */ #define SLI_MGMT_DHAT 0x301 /* De-register HBA attributes */ #define SLI_MGMT_DPRT 0x310 /* De-register Port */ #define SLI_MGMT_DPA 0x311 /* De-register Port attributes */ #define LPFC_FDMI_MAX_RETRY 3 /* Max retries for a FDMI command */ /* * HBA Attribute Types */ #define RHBA_NODENAME 0x1 /* 8 byte WWNN */ #define RHBA_MANUFACTURER 0x2 /* 4 to 64 byte ASCII string */ #define RHBA_SERIAL_NUMBER 0x3 /* 4 to 64 byte ASCII string */ #define RHBA_MODEL 0x4 /* 4 to 256 byte ASCII string */ #define RHBA_MODEL_DESCRIPTION 0x5 /* 4 to 256 byte ASCII string */ #define RHBA_HARDWARE_VERSION 0x6 /* 4 to 256 byte ASCII string */ #define RHBA_DRIVER_VERSION 0x7 /* 4 to 256 byte ASCII string */ #define RHBA_OPTION_ROM_VERSION 0x8 /* 4 to 256 byte ASCII string */ #define RHBA_FIRMWARE_VERSION 0x9 /* 4 to 256 byte ASCII string */ #define RHBA_OS_NAME_VERSION 0xa /* 4 to 256 byte ASCII string */ #define RHBA_MAX_CT_PAYLOAD_LEN 0xb /* 32-bit unsigned int */ #define RHBA_SYM_NODENAME 0xc /* 4 to 256 byte ASCII string */ #define RHBA_VENDOR_INFO 0xd /* 32-bit unsigned int */ #define RHBA_NUM_PORTS 0xe /* 32-bit unsigned int */ #define RHBA_FABRIC_WWNN 0xf /* 8 byte WWNN */ #define RHBA_BIOS_VERSION 0x10 /* 4 to 256 byte ASCII string */ #define RHBA_BIOS_STATE 0x11 /* 32-bit unsigned int */ #define RHBA_VENDOR_ID 0xe0 /* 8 byte ASCII string */ /* Bit mask for all individual HBA attributes */ #define LPFC_FDMI_HBA_ATTR_wwnn 0x00000001 #define LPFC_FDMI_HBA_ATTR_manufacturer 0x00000002 #define LPFC_FDMI_HBA_ATTR_sn 0x00000004 #define LPFC_FDMI_HBA_ATTR_model 0x00000008 #define LPFC_FDMI_HBA_ATTR_description 0x00000010 #define LPFC_FDMI_HBA_ATTR_hdw_ver 0x00000020 #define LPFC_FDMI_HBA_ATTR_drvr_ver 0x00000040 #define LPFC_FDMI_HBA_ATTR_rom_ver 0x00000080 #define LPFC_FDMI_HBA_ATTR_fmw_ver 0x00000100 #define LPFC_FDMI_HBA_ATTR_os_ver 0x00000200 #define LPFC_FDMI_HBA_ATTR_ct_len 0x00000400 #define LPFC_FDMI_HBA_ATTR_symbolic_name 0x00000800 #define LPFC_FDMI_HBA_ATTR_vendor_info 0x00001000 /* Not used */ #define LPFC_FDMI_HBA_ATTR_num_ports 0x00002000 #define LPFC_FDMI_HBA_ATTR_fabric_wwnn 0x00004000 #define LPFC_FDMI_HBA_ATTR_bios_ver 0x00008000 #define LPFC_FDMI_HBA_ATTR_bios_state 0x00010000 /* Not used */ #define LPFC_FDMI_HBA_ATTR_vendor_id 0x00020000 /* Bit mask for FDMI-1 defined HBA attributes */ #define LPFC_FDMI1_HBA_ATTR 0x000007ff /* Bit mask for FDMI-2 defined HBA attributes */ /* Skip vendor_info and bios_state */ #define LPFC_FDMI2_HBA_ATTR 0x0002efff /* * Port Attribute Types */ #define RPRT_SUPPORTED_FC4_TYPES 0x1 /* 32 byte binary array */ #define RPRT_SUPPORTED_SPEED 0x2 /* 32-bit unsigned int */ #define RPRT_PORT_SPEED 0x3 /* 32-bit unsigned int */ #define RPRT_MAX_FRAME_SIZE 0x4 /* 32-bit unsigned int */ #define RPRT_OS_DEVICE_NAME 0x5 /* 4 to 256 byte ASCII string */ #define RPRT_HOST_NAME 0x6 /* 4 to 256 byte ASCII string */ #define RPRT_NODENAME 0x7 /* 8 byte WWNN */ #define RPRT_PORTNAME 0x8 /* 8 byte WWPN */ #define RPRT_SYM_PORTNAME 0x9 /* 4 to 256 byte ASCII string */ #define RPRT_PORT_TYPE 0xa /* 32-bit unsigned int */ #define RPRT_SUPPORTED_CLASS 0xb /* 32-bit unsigned int */ #define RPRT_FABRICNAME 0xc /* 8 byte Fabric WWPN */ #define RPRT_ACTIVE_FC4_TYPES 0xd /* 32 byte binary array */ #define RPRT_PORT_STATE 0x101 /* 32-bit unsigned int */ #define RPRT_DISC_PORT 0x102 /* 32-bit unsigned int */ #define RPRT_PORT_ID 0x103 /* 32-bit unsigned int */ #define RPRT_VENDOR_MI 0xf047 /* vendor ascii string */ #define RPRT_SMART_SERVICE 0xf100 /* 4 to 256 byte ASCII string */ #define RPRT_SMART_GUID 0xf101 /* 8 byte WWNN + 8 byte WWPN */ #define RPRT_SMART_VERSION 0xf102 /* 4 to 256 byte ASCII string */ #define RPRT_SMART_MODEL 0xf103 /* 4 to 256 byte ASCII string */ #define RPRT_SMART_PORT_INFO 0xf104 /* 32-bit unsigned int */ #define RPRT_SMART_QOS 0xf105 /* 32-bit unsigned int */ #define RPRT_SMART_SECURITY 0xf106 /* 32-bit unsigned int */ /* Bit mask for all individual PORT attributes */ #define LPFC_FDMI_PORT_ATTR_fc4type 0x00000001 #define LPFC_FDMI_PORT_ATTR_support_speed 0x00000002 #define LPFC_FDMI_PORT_ATTR_speed 0x00000004 #define LPFC_FDMI_PORT_ATTR_max_frame 0x00000008 #define LPFC_FDMI_PORT_ATTR_os_devname 0x00000010 #define LPFC_FDMI_PORT_ATTR_host_name 0x00000020 #define LPFC_FDMI_PORT_ATTR_wwnn 0x00000040 #define LPFC_FDMI_PORT_ATTR_wwpn 0x00000080 #define LPFC_FDMI_PORT_ATTR_symbolic_name 0x00000100 #define LPFC_FDMI_PORT_ATTR_port_type 0x00000200 #define LPFC_FDMI_PORT_ATTR_class 0x00000400 #define LPFC_FDMI_PORT_ATTR_fabric_wwpn 0x00000800 #define LPFC_FDMI_PORT_ATTR_port_state 0x00001000 #define LPFC_FDMI_PORT_ATTR_active_fc4type 0x00002000 #define LPFC_FDMI_PORT_ATTR_num_disc 0x00004000 #define LPFC_FDMI_PORT_ATTR_nportid 0x00008000 #define LPFC_FDMI_SMART_ATTR_service 0x00010000 /* Vendor specific */ #define LPFC_FDMI_SMART_ATTR_guid 0x00020000 /* Vendor specific */ #define LPFC_FDMI_SMART_ATTR_version 0x00040000 /* Vendor specific */ #define LPFC_FDMI_SMART_ATTR_model 0x00080000 /* Vendor specific */ #define LPFC_FDMI_SMART_ATTR_port_info 0x00100000 /* Vendor specific */ #define LPFC_FDMI_SMART_ATTR_qos 0x00200000 /* Vendor specific */ #define LPFC_FDMI_SMART_ATTR_security 0x00400000 /* Vendor specific */ #define LPFC_FDMI_VENDOR_ATTR_mi 0x00800000 /* Vendor specific */ /* Bit mask for FDMI-1 defined PORT attributes */ #define LPFC_FDMI1_PORT_ATTR 0x0000003f /* Bit mask for FDMI-2 defined PORT attributes */ #define LPFC_FDMI2_PORT_ATTR 0x0000ffff /* Bit mask for Smart SAN defined PORT attributes */ #define LPFC_FDMI2_SMART_ATTR 0x007fffff /* Defines for PORT port state attribute */ #define LPFC_FDMI_PORTSTATE_UNKNOWN 1 #define LPFC_FDMI_PORTSTATE_ONLINE 2 /* Defines for PORT port type attribute */ #define LPFC_FDMI_PORTTYPE_UNKNOWN 0 #define LPFC_FDMI_PORTTYPE_NPORT 1 #define LPFC_FDMI_PORTTYPE_NLPORT 2 /* * Begin HBA configuration parameters. * The PCI configuration register BAR assignments are: * BAR0, offset 0x10 - SLIM base memory address * BAR1, offset 0x14 - SLIM base memory high address * BAR2, offset 0x18 - REGISTER base memory address * BAR3, offset 0x1c - REGISTER base memory high address * BAR4, offset 0x20 - BIU I/O registers * BAR5, offset 0x24 - REGISTER base io high address */ /* Number of rings currently used and available. */ #define MAX_SLI3_CONFIGURED_RINGS 3 #define MAX_SLI3_RINGS 4 /* IOCB / Mailbox is owned by FireFly */ #define OWN_CHIP 1 /* IOCB / Mailbox is owned by Host */ #define OWN_HOST 0 /* Number of 4-byte words in an IOCB. */ #define IOCB_WORD_SZ 8 /* network headers for Dfctl field */ #define FC_NET_HDR 0x20 /* Start FireFly Register definitions */ #define PCI_VENDOR_ID_EMULEX 0x10df #define PCI_DEVICE_ID_FIREFLY 0x1ae5 #define PCI_DEVICE_ID_PROTEUS_VF 0xe100 #define PCI_DEVICE_ID_BALIUS 0xe131 #define PCI_DEVICE_ID_PROTEUS_PF 0xe180 #define PCI_DEVICE_ID_LANCER_FC 0xe200 #define PCI_DEVICE_ID_LANCER_FC_VF 0xe208 #define PCI_DEVICE_ID_LANCER_FCOE 0xe260 #define PCI_DEVICE_ID_LANCER_FCOE_VF 0xe268 #define PCI_DEVICE_ID_LANCER_G6_FC 0xe300 #define PCI_DEVICE_ID_LANCER_G7_FC 0xf400 #define PCI_DEVICE_ID_LANCER_G7P_FC 0xf500 #define PCI_DEVICE_ID_SAT_SMB 0xf011 #define PCI_DEVICE_ID_SAT_MID 0xf015 #define PCI_DEVICE_ID_RFLY 0xf095 #define PCI_DEVICE_ID_PFLY 0xf098 #define PCI_DEVICE_ID_LP101 0xf0a1 #define PCI_DEVICE_ID_TFLY 0xf0a5 #define PCI_DEVICE_ID_BSMB 0xf0d1 #define PCI_DEVICE_ID_BMID 0xf0d5 #define PCI_DEVICE_ID_ZSMB 0xf0e1 #define PCI_DEVICE_ID_ZMID 0xf0e5 #define PCI_DEVICE_ID_NEPTUNE 0xf0f5 #define PCI_DEVICE_ID_NEPTUNE_SCSP 0xf0f6 #define PCI_DEVICE_ID_NEPTUNE_DCSP 0xf0f7 #define PCI_DEVICE_ID_SAT 0xf100 #define PCI_DEVICE_ID_SAT_SCSP 0xf111 #define PCI_DEVICE_ID_SAT_DCSP 0xf112 #define PCI_DEVICE_ID_FALCON 0xf180 #define PCI_DEVICE_ID_SUPERFLY 0xf700 #define PCI_DEVICE_ID_DRAGONFLY 0xf800 #define PCI_DEVICE_ID_CENTAUR 0xf900 #define PCI_DEVICE_ID_PEGASUS 0xf980 #define PCI_DEVICE_ID_THOR 0xfa00 #define PCI_DEVICE_ID_VIPER 0xfb00 #define PCI_DEVICE_ID_LP10000S 0xfc00 #define PCI_DEVICE_ID_LP11000S 0xfc10 #define PCI_DEVICE_ID_LPE11000S 0xfc20 #define PCI_DEVICE_ID_SAT_S 0xfc40 #define PCI_DEVICE_ID_PROTEUS_S 0xfc50 #define PCI_DEVICE_ID_HELIOS 0xfd00 #define PCI_DEVICE_ID_HELIOS_SCSP 0xfd11 #define PCI_DEVICE_ID_HELIOS_DCSP 0xfd12 #define PCI_DEVICE_ID_ZEPHYR 0xfe00 #define PCI_DEVICE_ID_ZEPHYR_SCSP 0xfe11 #define PCI_DEVICE_ID_ZEPHYR_DCSP 0xfe12 #define PCI_VENDOR_ID_SERVERENGINE 0x19a2 #define PCI_DEVICE_ID_TIGERSHARK 0x0704 #define PCI_DEVICE_ID_TOMCAT 0x0714 #define PCI_DEVICE_ID_SKYHAWK 0x0724 #define PCI_DEVICE_ID_SKYHAWK_VF 0x072c #define PCI_VENDOR_ID_ATTO 0x117c #define PCI_DEVICE_ID_CLRY_16XE 0x0064 #define PCI_DEVICE_ID_CLRY_161E 0x0063 #define PCI_DEVICE_ID_CLRY_162E 0x0064 #define PCI_DEVICE_ID_CLRY_164E 0x0065 #define PCI_DEVICE_ID_CLRY_16XP 0x0094 #define PCI_DEVICE_ID_CLRY_161P 0x00a0 #define PCI_DEVICE_ID_CLRY_162P 0x0094 #define PCI_DEVICE_ID_CLRY_164P 0x00a1 #define PCI_DEVICE_ID_CLRY_32XE 0x0094 #define PCI_DEVICE_ID_CLRY_321E 0x00a2 #define PCI_DEVICE_ID_CLRY_322E 0x00a3 #define PCI_DEVICE_ID_CLRY_324E 0x00ac #define PCI_DEVICE_ID_CLRY_32XP 0x00bb #define PCI_DEVICE_ID_CLRY_321P 0x00bc #define PCI_DEVICE_ID_CLRY_322P 0x00bd #define PCI_DEVICE_ID_CLRY_324P 0x00be #define PCI_DEVICE_ID_TLFC_2 0x0064 #define PCI_DEVICE_ID_TLFC_2XX2 0x4064 #define PCI_DEVICE_ID_TLFC_3 0x0094 #define PCI_DEVICE_ID_TLFC_3162 0x40a6 #define PCI_DEVICE_ID_TLFC_3322 0x40a7 #define JEDEC_ID_ADDRESS 0x0080001c #define FIREFLY_JEDEC_ID 0x1ACC #define SUPERFLY_JEDEC_ID 0x0020 #define DRAGONFLY_JEDEC_ID 0x0021 #define DRAGONFLY_V2_JEDEC_ID 0x0025 #define CENTAUR_2G_JEDEC_ID 0x0026 #define CENTAUR_1G_JEDEC_ID 0x0028 #define PEGASUS_ORION_JEDEC_ID 0x0036 #define PEGASUS_JEDEC_ID 0x0038 #define THOR_JEDEC_ID 0x0012 #define HELIOS_JEDEC_ID 0x0364 #define ZEPHYR_JEDEC_ID 0x0577 #define VIPER_JEDEC_ID 0x4838 #define SATURN_JEDEC_ID 0x1004 #define JEDEC_ID_MASK 0x0FFFF000 #define JEDEC_ID_SHIFT 12 #define FC_JEDEC_ID(id) ((id & JEDEC_ID_MASK) >> JEDEC_ID_SHIFT) typedef struct { /* FireFly BIU registers */ uint32_t hostAtt; /* See definitions for Host Attention register */ uint32_t chipAtt; /* See definitions for Chip Attention register */ uint32_t hostStatus; /* See definitions for Host Status register */ uint32_t hostControl; /* See definitions for Host Control register */ uint32_t buiConfig; /* See definitions for BIU configuration register */ } FF_REGS; /* IO Register size in bytes */ #define FF_REG_AREA_SIZE 256 /* Host Attention Register */ #define HA_REG_OFFSET 0 /* Byte offset from register base address */ #define HA_R0RE_REQ 0x00000001 /* Bit 0 */ #define HA_R0CE_RSP 0x00000002 /* Bit 1 */ #define HA_R0ATT 0x00000008 /* Bit 3 */ #define HA_R1RE_REQ 0x00000010 /* Bit 4 */ #define HA_R1CE_RSP 0x00000020 /* Bit 5 */ #define HA_R1ATT 0x00000080 /* Bit 7 */ #define HA_R2RE_REQ 0x00000100 /* Bit 8 */ #define HA_R2CE_RSP 0x00000200 /* Bit 9 */ #define HA_R2ATT 0x00000800 /* Bit 11 */ #define HA_R3RE_REQ 0x00001000 /* Bit 12 */ #define HA_R3CE_RSP 0x00002000 /* Bit 13 */ #define HA_R3ATT 0x00008000 /* Bit 15 */ #define HA_LATT 0x20000000 /* Bit 29 */ #define HA_MBATT 0x40000000 /* Bit 30 */ #define HA_ERATT 0x80000000 /* Bit 31 */ #define HA_RXRE_REQ 0x00000001 /* Bit 0 */ #define HA_RXCE_RSP 0x00000002 /* Bit 1 */ #define HA_RXATT 0x00000008 /* Bit 3 */ #define HA_RXMASK 0x0000000f #define HA_R0_CLR_MSK (HA_R0RE_REQ | HA_R0CE_RSP | HA_R0ATT) #define HA_R1_CLR_MSK (HA_R1RE_REQ | HA_R1CE_RSP | HA_R1ATT) #define HA_R2_CLR_MSK (HA_R2RE_REQ | HA_R2CE_RSP | HA_R2ATT) #define HA_R3_CLR_MSK (HA_R3RE_REQ | HA_R3CE_RSP | HA_R3ATT) #define HA_R0_POS 3 #define HA_R1_POS 7 #define HA_R2_POS 11 #define HA_R3_POS 15 #define HA_LE_POS 29 #define HA_MB_POS 30 #define HA_ER_POS 31 /* Chip Attention Register */ #define CA_REG_OFFSET 4 /* Byte offset from register base address */ #define CA_R0CE_REQ 0x00000001 /* Bit 0 */ #define CA_R0RE_RSP 0x00000002 /* Bit 1 */ #define CA_R0ATT 0x00000008 /* Bit 3 */ #define CA_R1CE_REQ 0x00000010 /* Bit 4 */ #define CA_R1RE_RSP 0x00000020 /* Bit 5 */ #define CA_R1ATT 0x00000080 /* Bit 7 */ #define CA_R2CE_REQ 0x00000100 /* Bit 8 */ #define CA_R2RE_RSP 0x00000200 /* Bit 9 */ #define CA_R2ATT 0x00000800 /* Bit 11 */ #define CA_R3CE_REQ 0x00001000 /* Bit 12 */ #define CA_R3RE_RSP 0x00002000 /* Bit 13 */ #define CA_R3ATT 0x00008000 /* Bit 15 */ #define CA_MBATT 0x40000000 /* Bit 30 */ /* Host Status Register */ #define HS_REG_OFFSET 8 /* Byte offset from register base address */ #define HS_MBRDY 0x00400000 /* Bit 22 */ #define HS_FFRDY 0x00800000 /* Bit 23 */ #define HS_FFER8 0x01000000 /* Bit 24 */ #define HS_FFER7 0x02000000 /* Bit 25 */ #define HS_FFER6 0x04000000 /* Bit 26 */ #define HS_FFER5 0x08000000 /* Bit 27 */ #define HS_FFER4 0x10000000 /* Bit 28 */ #define HS_FFER3 0x20000000 /* Bit 29 */ #define HS_FFER2 0x40000000 /* Bit 30 */ #define HS_FFER1 0x80000000 /* Bit 31 */ #define HS_CRIT_TEMP 0x00000100 /* Bit 8 */ #define HS_FFERM 0xFF000100 /* Mask for error bits 31:24 and 8 */ #define UNPLUG_ERR 0x00000001 /* Indicate pci hot unplug */ /* Host Control Register */ #define HC_REG_OFFSET 12 /* Byte offset from register base address */ #define HC_MBINT_ENA 0x00000001 /* Bit 0 */ #define HC_R0INT_ENA 0x00000002 /* Bit 1 */ #define HC_R1INT_ENA 0x00000004 /* Bit 2 */ #define HC_R2INT_ENA 0x00000008 /* Bit 3 */ #define HC_R3INT_ENA 0x00000010 /* Bit 4 */ #define HC_INITHBI 0x02000000 /* Bit 25 */ #define HC_INITMB 0x04000000 /* Bit 26 */ #define HC_INITFF 0x08000000 /* Bit 27 */ #define HC_LAINT_ENA 0x20000000 /* Bit 29 */ #define HC_ERINT_ENA 0x80000000 /* Bit 31 */ /* Message Signaled Interrupt eXtension (MSI-X) message identifiers */ #define MSIX_DFLT_ID 0 #define MSIX_RNG0_ID 0 #define MSIX_RNG1_ID 1 #define MSIX_RNG2_ID 2 #define MSIX_RNG3_ID 3 #define MSIX_LINK_ID 4 #define MSIX_MBOX_ID 5 #define MSIX_SPARE0_ID 6 #define MSIX_SPARE1_ID 7 /* Mailbox Commands */ #define MBX_SHUTDOWN 0x00 /* terminate testing */ #define MBX_LOAD_SM 0x01 #define MBX_READ_NV 0x02 #define MBX_WRITE_NV 0x03 #define MBX_RUN_BIU_DIAG 0x04 #define MBX_INIT_LINK 0x05 #define MBX_DOWN_LINK 0x06 #define MBX_CONFIG_LINK 0x07 #define MBX_CONFIG_RING 0x09 #define MBX_RESET_RING 0x0A #define MBX_READ_CONFIG 0x0B #define MBX_READ_RCONFIG 0x0C #define MBX_READ_SPARM 0x0D #define MBX_READ_STATUS 0x0E #define MBX_READ_RPI 0x0F #define MBX_READ_XRI 0x10 #define MBX_READ_REV 0x11 #define MBX_READ_LNK_STAT 0x12 #define MBX_REG_LOGIN 0x13 #define MBX_UNREG_LOGIN 0x14 #define MBX_CLEAR_LA 0x16 #define MBX_DUMP_MEMORY 0x17 #define MBX_DUMP_CONTEXT 0x18 #define MBX_RUN_DIAGS 0x19 #define MBX_RESTART 0x1A #define MBX_UPDATE_CFG 0x1B #define MBX_DOWN_LOAD 0x1C #define MBX_DEL_LD_ENTRY 0x1D #define MBX_RUN_PROGRAM 0x1E #define MBX_SET_MASK 0x20 #define MBX_SET_VARIABLE 0x21 #define MBX_UNREG_D_ID 0x23 #define MBX_KILL_BOARD 0x24 #define MBX_CONFIG_FARP 0x25 #define MBX_BEACON 0x2A #define MBX_CONFIG_MSI 0x30 #define MBX_HEARTBEAT 0x31 #define MBX_WRITE_VPARMS 0x32 #define MBX_ASYNCEVT_ENABLE 0x33 #define MBX_READ_EVENT_LOG_STATUS 0x37 #define MBX_READ_EVENT_LOG 0x38 --> -------------------- --> maximum size reached --> --------------------
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2026-04-06