// SPDX-License-Identifier: GPL-2.0-or-later /* * Driver for NeoMagic 256AV and 256ZX chipsets. * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de> * * Based on nm256_audio.c OSS driver in linux kernel. * The original author of OSS nm256 driver wishes to remain anonymous, * so I just put my acknoledgment to him/her here. * The original author's web page is found at * http://www.uglx.org/sony.html
*/
/* The AV's "mixer ready" status bit and location. */ #define NM_MIXER_STATUS_OFFSET 0xa04 #define NM_MIXER_READY_MASK 0x0800 #define NM_MIXER_PRESENCE 0xa06 #define NM_PRESENCE_MASK 0x0050 #define NM_PRESENCE_VALUE 0x0040
/* * For the ZX. It uses the same interrupt register, but it holds 32 * bits instead of 16.
*/ #define NM2_PLAYBACK_INT 0x10000 #define NM2_RECORD_INT 0x80000 #define NM2_MISC_INT_1 0x8 #define NM2_MISC_INT_2 0x2 #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
/* The ZX's "mixer ready" status bit and location. */ #define NM2_MIXER_STATUS_OFFSET 0xa06 #define NM2_MIXER_READY_MASK 0x0800
/* The playback registers start from here. */ #define NM_PLAYBACK_REG_OFFSET 0x0 /* The record registers start from here. */ #define NM_RECORD_REG_OFFSET 0x200
/* The rate register is located 2 bytes from the start of the register area. */ #define NM_RATE_REG_OFFSET 2
/* Mono/stereo flag, number of bits on playback, and rate mask. */ #define NM_RATE_STEREO 1 #define NM_RATE_BITS_16 2 #define NM_RATE_MASK 0xf0
struct nm256 *chip; struct snd_pcm_substream *substream; int running; int suspended;
u32 buf; /* offset from chip->buffer */ int bufsize; /* buffer size in bytes */ void __iomem *bufptr; /* mapped pointer */ unsignedlong bufptr_addr; /* physical address of the mapped pointer */
int dma_size; /* buffer size of the substream in bytes */ int period_size; /* period size in bytes */ int periods; /* # of periods */ int shift; /* bit shifts */ int cur_period; /* current period # */
};
struct nm256 {
struct snd_card *card;
void __iomem *cport; /* control port */ unsignedlong cport_addr; /* physical address */
u32 buffer_start; /* start offset from pci resource 0 */
u32 buffer_end; /* end offset */
u32 buffer_size; /* total buffer size */
u32 all_coeff_buf; /* coefficient buffer */
u32 coeff_buf[2]; /* coefficient buffer for each stream */
unsignedint coeffs_current: 1; /* coeff. table is loaded? */ unsignedint use_cache: 1; /* use one big coef. table */ unsignedint reset_workaround: 1; /* Workaround for some laptops to avoid freeze */ unsignedint reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */ unsignedint in_resume: 1;
int mixer_base; /* register offset of ac97 mixer */ int mixer_status_offset; /* offset of mixer status reg. */ int mixer_status_mask; /* bit mask to test the mixer status */
int irq; int irq_acks;
irq_handler_t interrupt; int badintrcount; /* counter to check bogus interrupts */ struct mutex irq_mutex;
struct nm256_stream streams[2];
struct snd_ac97 *ac97; unsignedshort *ac97_regs; /* register caches, only for valid regs */
struct snd_pcm *pcm;
struct pci_dev *pci;
spinlock_t reg_lock;
};
/* * include coefficient table
*/ #include"nm256_coef.c"
if (snd_nm256_readb(chip, poffset) & 1) {
dev_dbg(chip->card->dev, "NM256: Engine was enabled while loading coefficients!\n"); return;
}
/* The recording engine uses coefficient values 8-15. */
number &= 7; if (stream == SNDRV_PCM_STREAM_CAPTURE)
number += 8;
if (! chip->use_cache) {
snd_nm256_load_one_coefficient(chip, stream, addr, number); return;
} if (! chip->coeffs_current) {
snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
NM_TOTAL_COEFF_COUNT * 4);
chip->coeffs_current = 1;
} else {
u32 base = chip->all_coeff_buf;
u32 offset = snd_nm256_get_start_offset(number);
u32 end_offset = offset + coefficient_sizes[number];
snd_nm256_writel(chip, addr, base + offset); if (stream == SNDRV_PCM_STREAM_PLAYBACK)
end_offset--;
snd_nm256_writel(chip, addr + 4, base + end_offset);
}
}
/* The actual rates supported by the card. */ staticconstunsignedint samplerates[8] = {
8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
}; staticconststruct snd_pcm_hw_constraint_list constraints_rates = {
.count = ARRAY_SIZE(samplerates),
.list = samplerates,
.mask = 0,
};
/* * return the index of the target rate
*/ staticint
snd_nm256_fixed_rate(unsignedint rate)
{ unsignedint i; for (i = 0; i < ARRAY_SIZE(samplerates); i++) { if (rate == samplerates[i]) return i;
}
snd_BUG(); return 0;
}
/* * set sample rate and format
*/ staticvoid
snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s, struct snd_pcm_substream *substream)
{ struct snd_pcm_runtime *runtime = substream->runtime; int rate_index = snd_nm256_fixed_rate(runtime->rate); unsignedchar ratebits = (rate_index << 4) & NM_RATE_MASK;
/* Remapped I/O space can be accessible as pointer on i386 */ /* This might be changed in the future */ #ifndef __i386__ /* * silence / copy for playback
*/ staticint
snd_nm256_playback_silence(struct snd_pcm_substream *substream, int channel, unsignedlong pos, unsignedlong count)
{ struct snd_pcm_runtime *runtime = substream->runtime; struct nm256_stream *s = runtime->private_data;
/* set dma transfer size */ staticint snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *hw_params)
{ /* area and addr are already set and unchanged */
substream->runtime->dma_bytes = params_buffer_bytes(hw_params); return 0;
}
/* * close - we don't have to do special..
*/ staticint
snd_nm256_playback_close(struct snd_pcm_substream *substream)
{ struct nm256 *chip = snd_pcm_substream_chip(substream);
static irqreturn_t
snd_nm256_intr_check(struct nm256 *chip)
{ if (chip->badintrcount++ > 1000) { /* * I'm not sure if the best thing is to stop the card from * playing or just release the interrupt (after all, we're in * a bad situation, so doing fancy stuff may not be such a good * idea). * * I worry about the card engine continuing to play noise * over and over, however--that could become a very * obnoxious problem. And we know that when this usually * happens things are fairly safe, it just means the user's * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
*/ if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
snd_nm256_playback_stop(chip); if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
snd_nm256_capture_stop(chip);
chip->badintrcount = 0; return IRQ_HANDLED;
} return IRQ_NONE;
}
/* * Handle a potential interrupt for the device referred to by DEV_ID. * * I don't like the cut-n-paste job here either between the two routines, * but there are sufficient differences between the two interrupt handlers * that parameterizing it isn't all that great either. (Could use a macro, * I suppose...yucky bleah.)
*/
/* Unknown interrupt. */ if (status) {
dev_dbg(chip->card->dev, "NM256: Fire in the hole! Unknown status 0x%x\n",
status); /* Pray. */
NM_ACK_INT(chip, status);
}
/* * Handle a potential interrupt for the device referred to by DEV_ID. * This handler is for the 256ZX, and is very similar to the non-ZX * routine.
*/
/* Unknown interrupt. */ if (status) {
dev_dbg(chip->card->dev, "NM256: Fire in the hole! Unknown status 0x%x\n",
status); /* Pray. */
NM2_ACK_INT(chip, status);
}
/* * Waits for the mixer to become ready to be written; returns a zero value * if it timed out.
*/ staticint
snd_nm256_ac97_ready(struct nm256 *chip)
{ int timeout = 10;
u32 testaddr;
u16 testb;
/* * Loop around waiting for the mixer to become ready.
*/ while (timeout-- > 0) { if ((snd_nm256_readw(chip, testaddr) & testb) == 0) return 1;
udelay(100);
} return 0;
}
/* * Initial register values to be written to the AC97 mixer. * While most of these are identical to the reset values, we do this * so that we have most of the register contents cached--this avoids * reading from the mixer directly (which seems to be problematic, * probably due to ignorance).
*/
staticint nm256_ac97_idx(unsignedshort reg)
{ int i; for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) if (nm256_ac97_init_val[i].reg == reg) return i; return -1;
}
/* * some nm256 easily crash when reading from mixer registers * thus we're treating it as a write-only mixer and cache the * written values
*/ staticunsignedshort
snd_nm256_ac97_read(struct snd_ac97 *ac97, unsignedshort reg)
{ struct nm256 *chip = ac97->private_data; int idx = nm256_ac97_idx(reg);
if (idx < 0) return 0; return chip->ac97_regs[idx];
}
/* Wait for the write to take, too. */ while (tries-- > 0) {
snd_nm256_writew(chip, base + reg, val);
msleep(1); /* a little delay here seems better.. */ if (snd_nm256_ac97_ready(chip)) { /* successful write: set cache */
chip->ac97_regs[idx] = val; return;
}
}
dev_dbg(chip->card->dev, "nm256: ac97 codec not ready..\n");
}
/* initialize the ac97 into a known state */ staticvoid
snd_nm256_ac97_reset(struct snd_ac97 *ac97)
{ struct nm256 *chip = ac97->private_data;
/* Reset the mixer. 'Tis magic! */
snd_nm256_writeb(chip, 0x6c0, 1); if (! chip->reset_workaround) { /* Dell latitude LS will lock up by this */
snd_nm256_writeb(chip, 0x6cc, 0x87);
} if (! chip->reset_workaround_2) { /* Dell latitude CSx will lock up by this */
snd_nm256_writeb(chip, 0x6cc, 0x80);
snd_nm256_writeb(chip, 0x6cc, 0x0);
} if (! chip->in_resume) { int i; for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) { /* preload the cache, so as to avoid even a single * read of the mixer regs
*/
snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
nm256_ac97_init_val[i].value);
}
}
}
memset(&ac97, 0, sizeof(ac97));
ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
ac97.private_data = chip;
ac97.res_table = nm256_res_table;
pbus->no_vra = 1;
err = snd_ac97_mixer(pbus, &ac97, &chip->ac97); if (err < 0) return err; if (! (chip->ac97->id & (0xf0000000))) { /* looks like an invalid id */
sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
} return 0;
}
/* * See if the signature left by the NM256 BIOS is intact; if so, we use * the associated address as the end of our audio buffer in the video * RAM.
*/
staticint
snd_nm256_peek_for_sig(struct nm256 *chip)
{ /* The signature is located 1K below the end of video RAM. */ void __iomem *temp; /* Default buffer end is 5120 bytes below the top of RAM. */ unsignedlong pointer_found = chip->buffer_end - 0x1400;
u32 sig;
temp = ioremap(chip->buffer_addr + chip->buffer_end - 0x400, 16); if (temp == NULL) {
dev_err(chip->card->dev, "Unable to scan for card signature in video RAM\n"); return -EBUSY;
}
sig = readl(temp); if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
u32 pointer = readl(temp + 4);
/* * If it's obviously invalid, don't use it
*/ if (pointer == 0xffffffff ||
pointer < chip->buffer_size ||
pointer > chip->buffer_end) {
dev_err(chip->card->dev, "invalid signature found: 0x%x\n", pointer);
iounmap(temp); return -ENODEV;
} else {
pointer_found = pointer;
dev_info(chip->card->dev, "found card signature in video RAM: 0x%x\n",
pointer);
}
}
iounmap(temp);
chip->buffer_end = pointer_found;
return 0;
}
/* * APM event handler, so the card is properly reinitialized after a power * event.
*/ staticint nm256_suspend(struct device *dev)
{ struct snd_card *card = dev_get_drvdata(dev); struct nm256 *chip = card->private_data;
if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
snd_nm256_playback_stop(chip); if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
snd_nm256_capture_stop(chip);
}
/* store buffer sizes in bytes */
chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
/* * The NM256 has two memory ports. The first port is nothing * more than a chunk of video RAM, which is used as the I/O ring * buffer. The second port has the actual juicy stuff (like the * mixer and the playback engine control registers).
*/
err = pcim_request_all_regions(pci, card->driver); if (err < 0) return err;
/* Init the memory port info. */ /* remap control port (#2) */
chip->cport = devm_ioremap(&pci->dev, chip->cport_addr, NM_PORT2_SIZE); if (!chip->cport) {
dev_err(card->dev, "unable to map control port %lx\n",
chip->cport_addr); return -ENOMEM;
}
if (!strcmp(card->driver, "NM256AV")) { /* Ok, try to see if this is a non-AC97 version of the hardware. */
pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE); if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) { if (! force_ac97) {
dev_err(card->dev, "no ac97 is found!\n");
dev_err(card->dev, "force the driver to load by passing in the module parameter\n");
dev_err(card->dev, " force_ac97=1\n");
dev_err(card->dev, "or try sb16, opl3sa2, or cs423x drivers instead.\n"); return -ENXIO;
}
}
chip->buffer_end = 2560 * 1024;
chip->interrupt = snd_nm256_interrupt;
chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
chip->mixer_status_mask = NM_MIXER_READY_MASK;
} else { /* Not sure if there is any relevant detect for the ZX or not. */ if (snd_nm256_readb(chip, 0xa0b) != 0)
chip->buffer_end = 6144 * 1024; else
chip->buffer_end = 4096 * 1024;
dev_info(card->dev, "Mapping port 1 from 0x%x - 0x%x\n",
chip->buffer_start, chip->buffer_end);
chip->buffer = devm_ioremap(&pci->dev, chip->buffer_addr,
chip->buffer_size); if (!chip->buffer) {
dev_err(card->dev, "unable to map ring buffer at %lx\n",
chip->buffer_addr); return -ENOMEM;
}
q = snd_pci_quirk_lookup(pci, nm256_quirks); if (q) {
dev_dbg(&pci->dev, "Enabled quirk for %s.\n",
snd_pci_quirk_name(q)); switch (q->value) { case NM_IGNORED:
dev_info(&pci->dev, "The device is on the denylist. Loading stopped\n"); return -ENODEV; case NM_RESET_WORKAROUND_2:
reset_workaround_2 = 1;
fallthrough; case NM_RESET_WORKAROUND:
reset_workaround = 1; break;
}
}
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