dnl AMD64 mpn_sqr_basecase optimised for Intel Haswell.
dnl Contributed to the GNU project by Torbjörn Granlund.
dnl Copyright 2008, 2009, 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb mul_2 addmul_2 sqr_diag_addlsh1
C AMD K8,K9 n/a n/a n/a
C AMD K10 n/a n/a n/a
C AMD bull n/a n/a n/a
C AMD pile n/a n/a n/a
C AMD steam ? ? ?
C AMD bobcat n/a n/a n/a
C AMD jaguar ? ? ?
C Intel P4 n/a n/a n/a
C Intel core n/a n/a n/a
C Intel NHM n/a n/a n/a
C Intel SBR n/a n/a n/a
C Intel IBR n/a n/a n/a
C Intel HWL 1.86 2.15 ~2.5
C Intel BWL ? ? ?
C Intel atom n/a n/a n/a
C VIA nano n/a n/a n/a
C The inner loops of thiscode are the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjörn Granlund, except
C that the sqr_diag_addlsh1 loop was manually written.
C TODO
C * Replace current unoptimised sqr_diag_addlsh1 loop; 1.75 c/l might be
C possible.
C * Consider splitting outer loop into 2, one for n = 1 (mod 2) and one for
C n = 0 (mod 2). These loops could fall into specific "corner"code.
C * Consider splitting outer loop into 4.
C * Streamline pointer updates.
C * Perhaps suppress a few more xor insns in feed-in code.
C * Make sure we write no dead registers in feed-in code.
C * We might use 32-bit size ops, since n >= 2^32 is non-terminating. Watch
C out for negative sizes being zero-extended, though.
C * Provide straight-line codefor n = 4; then look for simplifications in
C main code.
mov (up), %rdx mov 8(up), %rcx
mulx( %rcx, %r9, %r10) C v0 * v1 W 1 2
mulx( %rdx, %rax, %r8) C v0 * v0 W 0 1 mov %rcx, %rdx
mulx( %rdx, %r11, %rdx) C v1 * v1 W 2 3 add %r9, %r9 C W 1 adc %r10, %r10 C W 2 adc $0, %rdx C W 3 add %r9, %r8 C W 1 adc %r11, %r10 C W 2 adc $0, %rdx C W 3 mov %rax, (rp) mov %r8, 8(rp) mov %r10, 16(rp) mov %rdx, 24(rp)
FUNC_EXIT() ret
L(do_mul_2): push %rbx push %rbp push %r12 push %r13 push %r14 mov $0, R32(un) sub un_param, un C free up rdx push un mov (up), v0 mov 8(up), %rdx lea 2(un), n
sar $2, n C FIXME: suppress, change loop? inc un C decrement |un| mov %rdx, v1
L(do_addmul_2):
L(outer): lea (up,un,8), up C put back up to 2 positions above last time lea 48(rp,un,8), rp C put back rp to 4 positions above last time
mov -8(up), v0 C shared between addmul_2 and corner
add $2, un C decrease |un| cmp $-2, un
jge L(corner)
mov (up), v1
lea 1(un), n
sar $2, n C FIXME: suppress, change loop?
L(small_corner):
mulx( v0, X1, w3) add %rax, X1 C Tricky rax reuse of last iteration adc $0, w3 mov X1, (rp) mov w3, 8(rp) lea 16(rp), rp lea 8(up), up
L(com):
L(sqr_diag_addlsh1): lea 8(up,un,8), up C put back up at its very beginning lea (rp,un,8), rp lea (rp,un,8), rp C put back rp at its very beginning inc un
mov -8(up), %rdx xor R32(%rbx), R32(%rbx) C clear CF as side effect
mulx( %rdx, %rax, %r10) mov %rax, 8(rp) mov 16(rp), %r8 mov 24(rp), %r9 jmp L(dm)
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