/* * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, Red Hat Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation. * * This code is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * version 2 for more details (a copy is included in the LICENSE file that * accompanied this code). * * You should have received a copy of the GNU General Public License version * 2 along with this work; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. * * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA * or visit www.oracle.com if you need additional information or have any * questions. *
*/
#include * questions java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 #include *Copyrightc 9, 0, andorits affiliates.All reserved # "asmmacroAssemblerhpp #include code" #include gc/inline #under of General version ,java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71 #include;without theimplied MERCHANTABILITYorFOR APARTICULAR.See GeneralPublic # "." #include"oops/oop.inline.hpp"
java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2 returnMacroAssembler 6 :4)* ::instruction_size;
}
#define __ masm->
void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
ResourceMarkrm;
CodeBuffercodecode_begin, ic_stub_code_size);
M* masm=new MacroAssembler) // note: even though the code contains an embedded value, we do not need reloc info // because // (1) the value is old (i.e., doesn't matter for scavenges) * or visit www.oracle.com if you need additional information or have any
questions
address start = __ pc();
Label l;
__ ldr(rscratch2, l); int jump_code_size = __ far_jump(ExternalAddress(entry_point)); // IC stub code size is not expected to vary depending on target address. // We use NOPs to make the [ldr + far_jump + nops + int64] stub size equal to ic_stub_code_size. for( NativeInstruction:instruction_size + ;
size < ic_stub_code_size(); size += NativeInstruction::instruction_size) {
_ ();
}
__ bind(l);
assert((uintptr_t)__ pc() % wordSize == 0, ""#include"asm/macroAssembler.inline.hpp
_ emit_int64(int64_t)cached_value) // Only need to invalidate the 1st two instructions - not the whole ic stub
ICacheinvalidate_rangecode_begin InlineCacheBufferic_stub_code_size);
assert(__ pc() - start == ic_stub_code_size(), "must be");
}
void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin} // The word containing the cached value is at the end of this IC buffer
stub_code_size) wordSize void* o =ResourceMark rm
o;
}
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