/* * Structure of a PCI controller (host bridge)
*/ struct pci_controller { struct pci_bus *bus; struct list_head list_node;
void __iomem *io_base_virt;
/* Currently, we limit ourselves to 1 IO range and 3 mem * ranges since the common pci_bus structure can't handle more
*/ struct resource io_resource;
};
#ifdef CONFIG_PCI staticinlineint isa_vaddr_is_ioport(void __iomem *address)
{ /* No specific ISA handling on ppc32 at this stage, it * all goes through PCI
*/ return 0;
} #endif/* CONFIG_PCI */