Quelle  phy-intel-lgm-combo.c   Sprache: C

// SPDX-License-Identifier: GPL-2.0
/*
 * Intel Combo-PHY driver
 *
 * Copyright (C) 2019-2020 Intel Corporation.
 */

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/iopoll.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/reset.h>

#include <dt-bindings/phy/phy.h>

#define PCIE_PHY_GEN_CTRL 0x00
#define PCIE_PHY_CLK_PAD BIT(17)

#define PAD_DIS_CFG  0x174

#define PCS_XF_ATE_OVRD_IN_2 0x3008
#define ADAPT_REQ_MSK java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 0

#define PCS_XF_RX_ADAPT_ACK 0x3010
#define RX_ADAPT_ACK_BIT BIT(# REG_CLK_DISABLE (*x200)

# (addr)(addr lane) <2
#define REG_COMBO_MODE(x) ((x) *define) (-id
#define #   16500

 ,,,
#define PHY_ID(x)  ((x)->id)

# CLK_100MHZ000
eCLK_156_25MHZ600

static const unsigned longjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 CLK_100MHZenum {
} =0

enum
,
,
 
;

/* struct 
 * Clock Register bit fields to enable clocks
 * for ComboPhy according to the mode.
 */
enum intel_phy_mode {
 PHY_PCIE_MODE = 0,
 PHY_XPCS_MODEcbphy_iphy enum  u32
 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
};

/* ComboPhy mode Register values */=set0 ;
enum  java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23
 =,
 PCIE_DL_MODE,
 RXAUI_MODE,
 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 SATA0_SATA1_MODEmask(>id  >id
};

enumjava.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
P,
};

java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 1

struct intel_cbphy_iphy {
 struct  u32,u32)
 struct reg_val
s reset_control;
 u32   id;
};

struct & mask |val
 struct  *;
 struct  intel_cbphy_iphy_cfg  *,
   int)(  )
 void java.lang.StringIndexOutOfBoundsException: Range [1, 2) out of bounds for length 1
 if> !)
struct ;
 r (cbphy-];
 u32 int( intel_cbphy_iphyjava.lang.StringIndexOutOfBoundsException: Index 72 out of bounds for length 72
 u32
 struct *;
 ifret
  (cbphy-," \);
 enum   ;
  aggregated_mode;
 u32   init_cnt0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
    ;
};

static int 
{
 struct cbphyparent
 u32 mask = BIT(cbphy->phy_mode * 2 + iphy->id);
u32java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9

 /* Register: 0 is enable, 1 is disable */
 val set  0: mask

return(cbphy-, (cbphy-),
      mask, val
}

  ( intel_cbphy_iphy  set
{
 struct intel_combo_phy *cbphy =dev_err>," todisablePCIep refclk\"java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61
 mask=BIT(bphy-id2 >idjava.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
 u32;

 /* Register: 0 is enable, 1 is disable */


return(cbphy-, , mask);
}

static   device =cbphy-;
   enum mode
{ ret
 u32

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 reg_val  PHY_PCIE_MODE
 reg_val=val
  break
}

static int intel_cbphy_iphy_cfg(struct intel_cbphy_iphy *iphy,
    int (*phy_cfg)= cb_mode = (aggr==PHY_DL_MODE?RXAUI_MODE XPCS0_XPCS1_MODE;
{
 struct intel_combo_phy *cbphy = iphy->parent;
 int ret;   return-INVAL

 ret=phy_cfg();
   reak
   ret

 if (cbphy- -EINVAL
 }

 return phy_cfg(&cbphy->iphy[PHY_1]);
}

static int intel_cbphy_pcie_en_pad_refclk(struct intel_cbphy_iphy *iphy)
{
 struct intel_combo_phy * dev_errdev"ailed mode dn" ret
 int ret

  =(iphy)java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47
 if) java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
 (cbphy-, "Failedto PCIe pad refclkn";
  return ret{
 }

 if (cbphy->init_cnt)
  return 0 (>core_rst

  /* Delay to ensure reset process is done */
        ,(, )java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61

 /* Delay for stable clock PLL */
 usleep_range;

 return >init_cnt
}

static int intel_cbphy_pcie_dis_pad_refclk(struct intel_cbphy_iphy * (>," !\);
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
struct cbphy>;
 ;

 ret =java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 if  clk_err
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return  if() {
}

 if (cbphy->init_cnt)
  return 0;

 combo_phy_w32_off_mask(cbphy->app_base, java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 15
  PCIE_PHY_CLK_PAD(, );

 return 0;
}

  ( intel_combo_phy)
{
 enum intel_combo_mode   clk_err
 enum /* Delay to ensure reset process is done */
struct *devcbphy->;
 enum
 return ;

 mode = cbphy-

 switch  lk_disable_unprepare>core_clk
 casePHY_PCIE_MODE:
   = aggr ) ?  : PCIE0_PCIE1_MODE
  break

casePHY_XPCS_MODE
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  break;

 nt;
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 ret
 returnEINVAL
 java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3

cb_modeSATA0_SATA1_MODE
  break
   ;
  return
java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 ();
 if ;
  dev_err(dev, "Failed to *)

 return ret;
}

static void intel_cbphy_rst_assert(struct    cbphy>;
{
reset_control_assert>);
reset_control_assert>);
} r)

 intel_cbphy_rst_deassert *)
{
 reset_control_deassert(cbphy-
r(cbphy-;
 /* Delay to ensure reset process is done */
( )


  (  *)
{
 struct intel_combo_phy 
 int ret;

 if (!cbphy->init_cnt) {
  ret = clk_prepare_enable(cbphy->core_clk);
  if (ret) {
   dev_err(cbphy->dev, "Clock enable failed!\n");
   return ret;
  }

  ret = clk_set_rate(cbphy->core_clk, cbphy->clk_rate);
  if (ret) {
   dev_err(cbphy->dev, "Clock freq set to %lu failed!\n",
    cbphy->clk_rate);
   goto clk_err;
  }

  intel_cbphy_rst_assert(cbphy);
  intel_cbphy_rst_deassert(cbphy);
  ret = intel_cbphy_set_mode(cbphy);
  if (ret)
   goto clk_err;
 }

 ret = intel_cbphy_iphy_enable(iphy, true);
 if (ret) {
  dev_err(cbphy->dev, "Failed enabling PHY core\n");
  goto clk_err;
 }

 ret = reset_control_deassert(iphy->app_rst);
 if (ret) {
  dev_err(cbphy->dev, "PHY(%u:%u) reset deassert failed!\n",
   COMBO_PHY_ID(iphy), PHY_ID(iphy));
  goto clk_err;
 }

 /* Delay to ensure reset process is done */
 udelay(1);

 return 0;

clk_err:
 clk_disable_unprepare(cbphy->core_clk);

 return ret;
}

static int intel_cbphy_iphy_power_off(struct intel_cbphy_iphy *iphy)
{
 struct intel_combo_phy *cbphy = iphy->parent;
 int ret;

 ret = reset_control_assert(iphy->app_rst);
 if (ret) {
  dev_err(cbphy->dev, "PHY(%u:%u) reset assert failed!\n",
   COMBO_PHY_ID(iphy), PHY_ID(iphy));
  return ret;
 }

 ret = intel_cbphy_iphy_enable(iphy, false);
 if (ret) {
  dev_err(cbphy->dev, "Failed disabling PHY core\n");
  return ret;
 }

 if (cbphy->init_cnt)
  return 0;

 clk_disable_unprepare(cbphy->core_clk);
 intel_cbphy_rst_assert(cbphy);

 return 0;
}

static int intel_cbphy_init(struct phy *phy)
{
 struct intel_cbphy_iphy *iphy = phy_get_drvdata(phy);
 struct intel_combo_phy *cbphy
 )

 mutex_lock intel_combo_phy  >;
  =(iphy);
 if (java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  err

 if (cbphy->phy_mode == PHY_PCIE_MODE) {
  = ntel_cbphy_iphy_cfgiphy );
  if (  =(iphy);
   gotoerr
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 cbphy->init_cnt++;

err:
 mutex_unlock(&cbphy-java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

 return ret;
}

  intel_cbphy_exit  *)
{
 struct intel_cbphy_iphyval ,id
 structif(>phy_mode )
 int ret;

 mutex_lock(&cbphy->lock);
 cbphy->init_cnt--;
 if (cbphy->phy_mode == PHY_PCIE_MODE) {
  ret = intel_cbphy_iphy_cfg(iphy, intel_cbphy_pcie_dis_pad_refclk);
  if (ret)
   goto err;
 }

 ret = intel_cbphy_iphy_cfg return;

err
 mutex_unlock(&cbphy-

 return ret;
}

static int intel_cbphy_calibrate(struct phy *phy)
{
 structintel_cbphy_iphyiphy phy_get_drvdata();
 struct intel_combo_phy*bphyiphy-;
 void __iomem *cr_base =ret(cr_base(PCS_XF_RX_ADAPT_ACK  , &RX_ADAPT_ACK_BIT0 0)
i val,i;

 if (cbphy->phy_mode != PHY_XPCS_MODE)
return0

  =PHY_ID;

 /* trigger auto RX adaptation */
(, (PCS_XF_ATE_OVRD_IN_2),
  s fwnode_reference_args
 /* Wait RX adaptation to finish */
 ret ;
 bphy-  (dev);
 if (ret)
 (>devRX !"
 else
 (>devRXs!n)

java.lang.StringIndexOutOfBoundsException: Range [25, 26) out of bounds for length 25
 combo_phy_w32_off_mask" err\)java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
  ADAPT_REQ_MSK(, )java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55

return
}

staticint( intel_combo_phycbphy
{
struct *  >dev
 struct platform_device" resetcontrol!\"
struct * =()java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 48
struct ref
 ;
 u32  (pdev)

cbphy- =(,NULL
((>))
  > =(pdev)
  (cr_base

 cbphy-
 if (  * syscfg and hsiocfg variables stores   * in which ComboPhy  * Register map framework to accessjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  (devPTR_ERR(>core_rst
cbphy- = device_node_to_regmap(ref));

 cbphy->phy_rst = devm_reset_control_get_optional(dev, "phy");
   =(fwnodeintel,, ,
  return    0&);
  " reset !\"

 cbphy- ret
  >bid.[0;
 return(, (cbphy-0.)java.lang.StringIndexOutOfBoundsException: Index 60 out of bounds for length 60
        phy0"

>[1. =devm_reset_control_get_optional, iphy1
 if (  retjava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
  break
          casePHY_TYPE_SATA

 cbphy-break;
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 0
  returnPTR_ERR>app_base

 ;
 if java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 return(>)

/
  * java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 0
  * in  cbphy- else
  *  return 0;
  */
 ret = fwnode_property_get_reference_args .init  = intel_cbphy_init,
       };
 if (ret < 0)
  return ret;

 cbphy- }
 cbphy-  dev_err(dev,  return  }
 fwnode_handle_put(ref.  dev_err(dev, "Invalid. return ERR_PTR }

 retstatic int intel_cbphy_create(struct intel_combo_phy *cbphy)
       0, &ref) struct intel_cbphy_iphy int i;
 if (ret < 0)
  return ret;

 cbphy->  iphy->  iphy-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 cbphy->hsiocfg = device_node_to_regmap(java.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 12
 fwnode_handle_put.);

ret fwnode_property_read_u32_arrayfwnodeintel,hy-mode &val 1)
 if (ret)
  return ret;

 switch (val) {
 case PHY_TYPE_PCIE:
  cbphy->phy_mode = PHY_PCIE_MODE;
  break;

 
  cbphy- (iphy->);
  break;

 case  phy_set_drvdata(>phy );
  cbphy-(, )java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
 ;

 default:
  dev_err(dev, "Invalid PHY mode: %u\n", java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 0
  -;
 }

 cbphy-

 if (fwnode_property_present(fwnode,  *;
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 else
  cbphy-aggr_mode = PHY_SL_MODE

return;
}

 phy_ops  java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47
 .i ret
 . =,
 .calibrate =
.   ,
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

   *(struct *ev
         const struct
{

 u32;

if>  ){
  dev_err(dev,java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return{. ="," ,
 }

  >args;
 if (iphy_id >= PHY_MAX_NUM) {
  dev_err(dev, cbphy_probe
   ERR_PTREINVAL
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 if
  dev_err

 }

 return cbphy->iphy[iphy_id].phy;
}

static int intel_cbphy_create(struct intel_combo_phy *cbphy)
{
 struct phy_provider *phy_provider;
 struct device *dev = cbphy->dev;
 struct intel_cbphy_iphy *iphy;
 int i;

 for (i = 0; i < PHY_MAX_NUM; i++) {
  iphy = &cbphy->iphy[i];
  iphy->parent = cbphy;
  iphy->id = i;

  /* In dual lane mode skip phy creation for the second phy */
  if (cbphy->aggr_mode == PHY_DL_MODE && iphy->id == PHY_1)
   continue;

  iphy->phy = devm_phy_create(dev, NULL, &intel_cbphy_ops);
  if (IS_ERR(iphy->phy)) {
   dev_err(dev, "PHY[%u:%u]: create PHY instance failed!\n",
    COMBO_PHY_ID(iphy), PHY_ID(iphy));

   return PTR_ERR(iphy->phy);
  }

  phy_set_drvdata(iphy->phy, iphy);
 }

 dev_set_drvdata(dev, cbphy);
 phy_provider = devm_of_phy_provider_register(dev, intel_cbphy_xlate);
 if (IS_ERR(phy_provider))
  dev_err(dev, "Register PHY provider failed!\n");

 return PTR_ERR_OR_ZERO(phy_provider);
}

static int intel_cbphy_probe(struct platform_device *pdev)
{
 struct device *dev = &pdev->dev;
 struct intel_combo_phy *cbphy;
 int ret;

 cbphy = devm_kzalloc(dev, sizeof(*cbphy), GFP_KERNEL);
 if (!cbphy)
  return -ENOMEM;

 cbphy->dev = dev;
 cbphy->init_cnt = 0;
 mutex_init(&cbphy->lock);
 ret = intel_cbphy_fwnode_parse(cbphy);
 if (ret)
  return ret;

 platform_set_drvdata(pdev, cbphy);

 return intel_cbphy_create(cbphy);
}

static void intel_cbphy_remove(struct platform_device *pdev)
{
 struct intel_combo_phy *cbphy = platform_get_drvdata(pdev);

 intel_cbphy_rst_assert(cbphy);
 clk_disable_unprepare(cbphy->core_clk);
}

static const struct of_device_id of_intel_cbphy_match[] = {
 { .compatible = "intel,combo-phy" },
 { .compatible = "intel,combophy-lgm" },
 {}
};

static struct platform_driver intel_cbphy_driver = {
 .probe = intel_cbphy_probe,
 .remove = intel_cbphy_remove,
 .driver = {
  .name = "intel-combo-phy",
  .of_match_table = of_intel_cbphy_match,
 }
};

module_platform_driver(intel_cbphy_driver);

MODULE_DESCRIPTION("Intel Combo-phy driver");