Quelle  am335x-netcom-plus-2xx.dts   Sprache: unbekannt

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 */

/*
 * VScom OnRISC
 * https://www.vscom.de
 */

/dts-v1/;

#include "am335x-baltos.dtsi"
#include "am335x-baltos-leds.dtsi"

/ {
 model = "NetCom Plus";
};

&am33xx_pinmux {
 uart1_pins: uart1-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)   /* RX */
   AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)   /* TX */
   AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)  /* CTS */
   AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)  /* RTS */
   AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7)  /* DTR */
   AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)  /* DSR */
   AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)  /* DCD */
   AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* RI */
  >;
 };

 uart2_pins: uart2-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1)  /* RX */
   AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1)        /* TX */
   AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2) /* CTS */
   AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* RTS */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* DTR */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DSR */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DCD */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* RI */
  >;
 };
};

&usb0_phy {
 status = "okay";
};

&usb0 {
 status = "okay";
 dr_mode = "host";
};

&uart1 {
 pinctrl-names = "default";
 pinctrl-0 = <&uart1_pins>;
 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
 dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
 rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;

 status = "okay";
};

&uart2 {
 pinctrl-names = "default";
 pinctrl-0 = <&uart2_pins>;
 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
 dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;

 status = "okay";
};

&davinci_mdio_sw {
 phy0: ethernet-phy@0 {
  reg = <1>;
 };
};

&cpsw_port1 {
 phy-mode = "rmii";
 ti,dual-emac-pvid = <1>;
 phy-handle = <&phy0>;
};

&cpsw_port2 {
 phy-mode = "rgmii-id";
 ti,dual-emac-pvid = <2>;
 phy-handle = <&phy1>;
};

&gpio0 {
 gpio-line-names =
  "MDIO",
  "MDC",
  "UART2_RX",
  "UART2_TX",
  "I2C1_SDA",
  "I2C1_SCL",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "UART1_CTSN",
  "UART1_RTSN",
  "UART1_RX",
  "UART1_TX",
  "onrisc:blue:wlan",
  "onrisc:green:app",
  "USB0_DRVVBUS",
  "ETH2_INT",
  "NC",
  "NC",
  "MMC1_DAT0",
  "MMC1_DAT1",
  "NC",
  "NC",
  "MMC1_DAT2",
  "MMC1_DAT3",
  "NC",
  "NC",
  "GPMC_WAIT0",
  "GPMC_WP_N";
};

&gpio1 {
 gpio-line-names =
  "GPMC_AD0",
  "GPMC_AD1",
  "GPMC_AD2",
  "GPMC_AD3",
  "GPMC_AD4",
  "GPMC_AD5",
  "GPMC_AD6",
  "GPMC_AD7",
  "NC",
  "NC",
  "CONSOLE_RX",
  "CONSOLE_TX",
  "UART2_DTR",
  "UART2_DSR",
  "UART2_DCD",
  "UART2_RI",
  "RGMII2_TCTL",
  "RGMII2_RCTL",
  "RGMII2_TD3",
  "RGMII2_TD2",
  "RGMII2_TD1",
  "RGMII2_TD0",
  "RGMII2_TCLK",
  "RGMII2_RCLK",
  "RGMII2_RD3",
  "RGMII2_RD2",
  "RGMII2_RD1",
  "RGMII2_RD0",
  "PMIC_INT1",
  "GPMC_CSN0_Flash",
  "MMC1_CLK",
  "MMC1_CMD";
};

&gpio2 {
 gpio-line-names =
  "GPMC_CSN3_BUS",
  "GPMC_CLK",
  "GPMC_ADVN_ALE",
  "GPMC_OEN_RE_N",
  "GPMC_WE_N",
  "GPMC_BEN0_CLE",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "SW2_0",
  "SW2_1",
  "NC",
  "NC",
  "UART1_DTR",
  "UART1_DSR",
  "UART1_DCD",
  "UART1_RI",
  "MMC0_DAT3",
  "MMC0_DAT2",
  "MMC0_DAT1",
  "MMC0_DAT0",
  "MMC0_CLK",
  "MMC0_CMD";
};

&gpio3 {
 gpio-line-names =
  "onrisc:red:power",
  "NC",
  "NC",
  "NC",
  "NC",
  "UART2_CTSN",
  "UART2_RTSN",
  "WLAN_IRQ",
  "WLAN_EN",
  "SW2_2",
  "SW2_3",
  "NC",
  "NC",
  "NC",
  "ModeA0",
  "ModeA1",
  "ModeA2",
  "ModeA3",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC",
  "NC";
};