/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H #define _ASM_POWERPC_NOHASH_64_PGTABLE_H /* * This file contains the functions and defines necessary to modify and use * the ppc64 non-hashed page table.
*/
/* * Define the address range of the kernel non-linear virtual area
*/ #define KERN_VIRT_START ASM_CONST(0xc000100000000000) #define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000)
/* * The vmalloc space starts at the beginning of that region, and * occupies a quarter of it on Book3E * (we keep a quarter for the virtual memmap)
*/ #define VMALLOC_START KERN_VIRT_START #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2) #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
/* * The third quarter of the kernel virtual space is used for IO mappings, * it's itself carved into the PIO region (ISA and PHB IO space) and * the ioremap space * * ISA_IO_BASE = KERN_IO_START, 64K reserved area * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces * IOREMAP_BASE = ISA_IO_BASE + 2G to KERN_IO_START + KERN_IO_SIZE
*/ #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1)) #define KERN_IO_SIZE (KERN_VIRT_SIZE >> 2) #define FULL_IO_SIZE 0x80000000ul #define ISA_IO_BASE (KERN_IO_START) #define ISA_IO_END (KERN_IO_START + 0x10000ul) #define PHB_IO_BASE (ISA_IO_END) #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE) #define IOREMAP_BASE (PHB_IO_END) #define IOREMAP_START (ioremap_bot) #define IOREMAP_END (KERN_IO_START + KERN_IO_SIZE - FIXADDR_SIZE) #define FIXADDR_SIZE SZ_32M #define FIXADDR_TOP (IOREMAP_END + FIXADDR_SIZE)
/* * Defines the address of the vmemap area, in its own region on * after the vmalloc space on Book3E
*/ #define VMEMMAP_BASE VMALLOC_END #define VMEMMAP_END KERN_IO_START #define vmemmap ((struct page *)VMEMMAP_BASE)
/* * Include the PTE bits definitions
*/ #include <asm/nohash/pte-e500.h>
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