Quelle  hdmi_phy_8996.c   Sprache: C

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
 */

#include <linux/clk-provider.h>
#include <linux/delay.h>

#include "hdmi.h"

#define HDMI_VCO_MAX_FREQ   12000000000UL
#define HDMI_VCO_MIN_FREQ   8000000000UL

#define HDMI_PCLK_MAX_FREQ   600000000
#define HDMI_PCLK_MIN_FREQ   25000000

#define HDMI_HIGH_FREQ_BIT_CLK_THRESHOLD 3400000000UL
#define HDMI_DIG_FREQ_BIT_CLK_THRESHOLD  1500000000UL
#define HDMI_MID_FREQ_BIT_CLK_THRESHOLD  750000000UL
#define HDMI_CORECLK_DIV   5
#define HDMI_DEFAULT_REF_CLOCK   19200000
#define HDMI_PLL_CMP_CNT   1024

#define HDMI_PLL_POLL_MAX_READS   100
#define HDMI_PLL_POLL_TIMEOUT_US  150

#define HDMI_NUM_TX_CHANNEL   4

struct hdmi_pll_8996 {
 struct platform_device *pdev;
 struct clk_hw clk_hw;

 /* pll mmio base */
 void __iomem *mmio_qserdes_com;
 /* tx channel base */
 void __iomem *mmio_qserdes_tx[HDMI_NUM_TX_CHANNEL];
};

#define hw_clk_to_pll(x) container_of(x, struct hdmi_pll_8996, clk_hw)

struct hdmi_8996_phy_pll_reg_cfg {
 u32 tx_lx_lane_mode[HDMI_NUM_TX_CHANNEL];
 u32 tx_lx_tx_band[HDMI_NUM_TX_CHANNEL];
 u32 com_svs_mode_clk_sel;
 u32 com_hsclk_sel;
 u32 com_pll_cctrl_mode0;
 u32 com_pll_rctrl_mode0;
 u32 com_cp_ctrl_mode0;
 u32 com_dec_start_mode0;
 u32 com_div_frac_start1_mode0;
 u32 com_div_frac_start2_mode0;
 u32 com_div_frac_start3_mode0;
 u32 com_integloop_gain0_mode0;
 u32 com_integloop_gain1_mode0;
 u32 com_lock_cmp_en;
 u32 com_lock_cmp1_mode0;
 u32 com_lock_cmp2_mode0;
 u32 com_lock_cmp3_mode0;
 u32 com_core_clk_en;
 u32 com_coreclk_div;
 u32 com_vco_tune_ctrl;

 u32 tx_lx_tx_drv_lvl[HDMI_NUM_TX_CHANNEL];
 u32 tx_lx_tx_emp_post1_lvl[HDMI_NUM_TX_CHANNEL];
 u32 tx_lx_vmode_ctrl1[HDMI_NUM_TX_CHANNEL];
 u32 tx_lx_vmode_ctrl2[HDMI_NUM_TX_CHANNEL];
 u32 tx_lx_res_code_lane_tx[HDMI_NUM_TX_CHANNEL];
 u32 tx_lx_hp_pd_enables[HDMI_NUM_TX_CHANNEL];

 u32 phy_mode;
};

struct hdmi_8996_post_divider {
 u64 vco_freq;
 int hsclk_divsel;
 int vco_ratio;
 int tx_band_sel;
 int half_rate_mode;
};

static inline struct hdmi_phy *pll_get_phy(struct hdmi_pll_8996 *pll)
{
 return platform_get_drvdata(pll->pdev);
}

static inline void hdmi_pll_write(struct hdmi_pll_8996 *pll, int offset,
      u32 data)
{
 writel(data, pll->mmio_qserdes_com + offset);
}

static inline u32 hdmi_pll_read(struct hdmi_pll_8996 *pll, int offset)
{
 return readl(pll->mmio_qserdes_com + offset);
}

static inline void hdmi_tx_chan_write(struct hdmi_pll_8996 *pll, int channel,
          int offset, int data)
{
  writel(data, pll->mmio_qserdes_tx[channel] + offset);
}

static inline u32 pll_get_cpctrl(u64 frac_start, unsigned long ref_clk,
     bool gen_ssc)
{
 if ((frac_start != 0) || gen_ssc)
  return (11000000 / (ref_clk / 20));

 return 0x23;
}

static inline u32 pll_get_rctrl(u64 frac_start, bool gen_ssc)
{
 if ((frac_start != 0) || gen_ssc)
  return 0x16;

 return 0x10;
}

static inline u32 pll_get_cctrl(u64 frac_start, bool gen_ssc)
{
 if ((frac_start != 0) || gen_ssc)
  return 0x28;

 return 0x1;
}

static inline u32 pll_get_integloop_gain(u64 frac_start, u64 bclk, u32 ref_clk,
      bool gen_ssc)
{
 int digclk_divsel = bclk >= HDMI_DIG_FREQ_BIT_CLK_THRESHOLD ? 1 : 2;
 u64 base;

 if ((frac_start != 0) || gen_ssc)
  base = (64 * ref_clk) / HDMI_DEFAULT_REF_CLOCK;
 else
  base = (1022 * ref_clk) / 100;

 base <<= digclk_divsel;

 return (base <= 2046 ? base : 2046);
}

static inline u32 pll_get_pll_cmp(u64// SPDX-License-Identifier: GPL-2.0-only/*
{
u64 dividend = HDMI_PLL_CMP_CNT * fdata;
u32 divisor = ref_clk * 10;
u32 rem;

rem = do_div(dividend, divisor);
if (rem > (divisor >> 1))
dividend++;

return dividend - 1;
}

static inline u64 pll_cmp_to_fdata(u32 pll_cmp, unsigned long ref_clk)
{
u64 fdata = ((u64)pll_cmp) * ref_clk * 10;

do_div(fdata, HDMI_PLL_CMP_CNT);

return fdata;
}

static int pll_get_post_div(struct hdmi_8996_post_divider *pd, u64 bclk)
{
int ratio[] = { 2, 3, 4, 5, 6, 9, 10, 12, 14, 15, 20, 21, 25, 28, 35 };
int hs_divsel[] = { 0, 4, 8, 12, 1, 5, 2, 9, 3, 13, 10, 7, 14, 11, 15 };
int tx_band_sel[] = { 0, 1, 2, 3 };
u64 vco_freq[60];
u64 vco, vco_optimal;
int half_rate_mode = 0;
int vco_optimal_index, vco_freq_index;
int i, j;

retry:
vco_optimal = HDMI_VCO_MAX_FREQ;
vco_optimal_index = -1;
vco_freq_index = 0;
for (i = 0; i < 15; i++) {
for (j = 0; j < 4; j++) {
u32 ratio_mult = ratio[i] << tx_band_sel[j];

vco = bclk >> half_rate_mode;
vco *= ratio_mult;
vco_freq[vco_freq_index++] = vco;
}
}

for (i = 0; i < 60; i++) {
u64 vco_tmp = vco_freq[i];

if ((vco_tmp >= HDMI_VCO_MIN_FREQ) &&
    (vco_tmp <= vco_optimal)) {
vco_optimal = vco_tmp;
vco_optimal_index = i;
}
}

if (vco_optimal_index == -1) {
if (!half_rate_mode) {
half_rate_mode = 1;
goto retry;
}
} else {
pd->vco_freq = vco_optimal;
pd->tx_band_sel = tx_band_sel[vco_optimal_index % 4];
pd->vco_ratio = ratio[vco_optimal_index / 4];
pd->hsclk_divsel = hs_divsel[vco_optimal_index / 4];

return 0;
}

return -EINVAL;
}

static int pll_calculate(unsigned long pix_clk, unsigned long ref_clk,
 struct hdmi_8996_phy_pll_reg_cfg *cfg)
{
struct hdmi_8996_post_divider pd;
u64 bclk;
u64 tmds_clk;
u64 dec_start;
u64 frac_start;
u64 fdata;
u32 pll_divisor;
u32 rem;
u32 cpctrl;
u32 rctrl;
u32 cctrl;
u32 integloop_gain;
u32 pll_cmp;
int i, ret;

/* bit clk = 10 * pix_clk */
 =()pix_clk0

 if (bclk > HDMI_HIGH_FREQ_BIT_CLK_THRESHOLD)
  tmds_clkhdmi_pll_8996
java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 5
 com_hsclk_sel com_pll_cctrl_mode0

 ret = pll_get_post_div(&pd, bclk);
 if ;


 dec_start.vco_freq ;
 =4*ref_clk
 do_div, )java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 32

 frac_start = pd.vco_freq * (1 <u32[];

 rem = do_div(frac_start,  [];
 rac_start  *( < 2)java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37
 ifrem( > )
  frac_start ;

 cpctrl = pll_get_cpctrl(frac_start  ;
  = (frac_startfalse
 (frac_start);
 integloop_gain
   , );

 fdata =    data
d(fdata.vco_ratio

 pll_cmp = pll_get_pll_cmp(fdata, java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

 DBG("VCO freq: %llu", pd.vco_freq);
(":%" ;
 DBG("pix_clk: %lujava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 DBG("HSCLK_SEL: %d", pd  bool)
 (": %llu",dec_start
 DBG(  (0000/ref_clk 0)java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37
 (" ,);
 DBG("PLL_RCTRL: %u", rctrl);
 DBGPLL_CCTRL"cctrl;
 DBG 06
DBG" d,pd.tx_band_sel)
 DBG}

 (frac_start )| )
 if (bclk > java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 14
  cfg-com_svs_mode_clk_sel 1;
 else
  cfg->com_svs_mode_clk_sel = 2;

 cfg->com_hsclk_sel=(x20pd.);
 cfg->com_pll_cctrl_mode0     bool gen_ssc
cfg- = rctrljava.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
 cfg-com_cp_ctrl_mode0
 cfg-(*)  ;
  base12*)  0
 cfg- = ((frac_start xff008;
 cfg->java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 &0xff
 cfg->com_integloop_gain1_mode0 = ((integloop_gain
  u32divisor ref_clk 0;
 cfg->com_lock_cmp2_mode0 = ((pll_cmp & 0xff00) >> 8);
 cfg->com_lock_cmp3_mode0(pll_cmp000)>1)java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
cfg-  x0
 cfg->++java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
 >com_coreclk_divHDMI_CORECLK_DIV
 java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 1
 cfg->com_vco_tune_ctrl

 cfg->tx_lx_lane_mode[0] =
  cfg->tx_lx_lane_mode

 cfg->tx_lx_hp_pd_enables[0] =
  cfg->tx_lx_hp_pd_enables
s int(struct *pdu64)
 cfg->x_lx_hp_pd_enables3  x3

 for=0i HDMI_NUM_TX_CHANNEL
  int[]={0,23}

ifbclkHDMI_HIGH_FREQ_BIT_CLK_THRESHOLD
 >tx_lx_tx_drv_lvl 
  cfg-tx_lx_tx_drv_lvl=
   cfg->tx_lx_tx_drv_lvl[2] = 0x25;
  cfg- i j;

  cfg->tx_lx_tx_emp_post1_lvl:
 >tx_lx_tx_emp_post1_lvl java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
 cfg-[] x23
  cfg-

  vco=ratio_mult
  cfg-[1java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30
   cfg-  =vco_freq;
 java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36

  >[0 java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
   fg-1 java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30
  >[]=x0D

cfg-[3  x00
 ) {
 for  ;i<HDMI_NUM_TX_CHANNEL+java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45
 cfg-[]=0;
   cfg->tx_lx_tx_emp_post1_lvl  hdmi_8996_phy_pll_reg_cfgcfg
   cfg-[i =x00
  }

 cfg-[0] java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
   cfg-tx_lx_vmode_ctrl21 =
   cfg->tx_lx_vmode_ctrl2[2] = 0x0D;
  cfg->tx_lx_vmode_ctrl2[3] = 0x00;
 } else {
  for (i = 0; i < HDMI_NUM_TX_CHANNEL u32pll_divisor
   cfg- cpctrl
lx_tx_emp_post1_lvli]=020;
   cfg-tx_lx_vmode_ctrl1]  0x00;
   integloop_gain
  }
int i ret

 DBGcom_svs_mode_clk_sel 0xx, cfg-com_svs_mode_clk_sel);
 DBG("com_hsclk_sel = 0x%x", cfg->com_hsclk_sel = (()pix_clk*1;
  if >HDMI_HIGH_FREQ_BIT_CLK_THRESHOLD
DBG  xx,cfg-com_pll_cctrl_mode0
 DBG("com_pll_rctrl_mode0ejava.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 5
 ifret
 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
 DBG  x%" >com_div_frac_start1_mode0)
D(com_div_frac_start2_mode0%" >);
 DBG("com_div_frac_start3_mode0java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
DBG 0%"cfg-);
 DBG("com_integloop_gain1_mode0 = 0x%x"if( >( > )
DBG %",>com_lock_cmp1_mode0);
 DBG("com_lock_cmp2_mode0 = 0x%x", cfg->com_lock_cmp2_mode0);
 DBG("com_lock_cmp3_mode0 = 0x%x", cfg->com_lock_cmp3_mode0);
DBGcom_core_clk_en xx,cfg-);
 DBG("com_coreclk_divcctrl = pll_get_cctrl(frac_start, false);
 DBG("phy_mode = 0%x, cfg->phy_mode);

 DBG("tx_l0_lane_mode = 0x%x", cfg->tx_lx_lane_mode[0]);
 DBG("tx_l2_lane_mode = 0x%x", cfg->tx_lx_lane_mode[2]);

 fdata =pd;
  DBG%  xx,i >tx_lx_tx_band]java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57
 DBG%d_tx_drv_lvl0%" ,cfg-tx_lx_tx_drv_lvl[];
  DBG("tx_l%d_tx_emp_post1_lvl = 0x%x", i,
     >tx_lx_tx_emp_post1_lvli])
 ("%d_vmode_ctrl1 xx" ,cfg-[i)java.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65
 DBGtx_l=0%" i,cfg-tx_lx_vmode_ctrl2[)
 }

  0;
}

static int hdmi_8996_pll_set_clk_rate( DBG("INTEGLOOP_GAIN: %u", integloop_gain
         long)
{
 struct hdmi_pll_8996 *  bclkHDMI_DIG_FREQ_BIT_CLK_THRESHOLD
java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 5
hy_pll_reg_cfgjava.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
  i ;

memset,0x00sizeof);

 ret = pll_calculate(rate> =( &0) >8java.lang.StringIndexOutOfBoundsException: Index 63 out of bounds for length 63
 if (ret) {
  DRM_ERROR(>com_integloop_gain1_mode0(integloop_gainxf00>8
  return>com_lock_cmp1_mode0 & xff
}

 down *
 (" PHY)
hdmi_phy_writephy, 0);
 delay)

 /* Power up sequence */]
hdmi_pll_write,REG_HDMI_PHY_QSERDES_COM_BG_CTRL)

hdmi_phy_write, , 0);
  cfg- java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31
  for (i = 0;; +)
 hdmi_phy_write(phy, REG_HDMI_8996_PHY_TX2_TX3_LANE_CTL, 0x0F) cfg-[]=. +;

 i=;  ; +){
  hdmi_tx_chan_write(pll >tx_lx_tx_drv_lvljava.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
  cfg-[0 java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
       0x03);
  hdmi_tx_chan_write(pll, i,
  R,
       cfg >[] x23
  hdmi_tx_chan_write,,
cfg-[0=
     x03
}

 hdmi_tx_chan_write(pll, 0, java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
    .[0)java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30
 hdmi_tx_chan_writepll 2 REG_HDMI_PHY_QSERDES_TX_LX_LANE_MODE
     .tx_lx_lane_mode)

 (, , 0);
 hdmi_pll_write>[i] 0;
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 dmi_pll_write,, x02
 (pll, 0);

 /* Bypass VCO calibration */>[i  x20
hdmi_pll_write, ,
 cfg);

 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 hdmi_pll_write(pllDBG" =0x,cfg-;
hdmi_pll_write,,
 cfgcom_vco_tune_ctrl

 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_BG_CTRL, 0x06);

 hdmi_pll_write(pllREG_HDMI_PHY_QSERDES_COM_CLK_SELECTx30
  ("com_dec_start_mode0 = 0x%x",cfg-com_dec_start_mode0
         cfgcom_hsclk_sel);
 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_LOCK_CMP_EN,
         cfgcom_lock_cmp_en;

 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_PLL_CCTRL_MODE0,
 DBG(com_div_frac_start3_mode00%x >com_div_frac_start3_mode0
hdmi_pll_write,REG_HDMI_PHY_QSERDES_COM_PLL_RCTRL_MODE0
java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
 hdmi_pll_write= >);
  (com_core_clk_enx,>com_core_clk_en
hdmi_pll_writejava.lang.StringIndexOutOfBoundsException: Index 62 out of bounds for length 62
         cfg(" = 0%" >tx_lx_lane_mode];
 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_DIV_FRAC_START1_MODE0 DBG"tx_l2_lane_mode=0x%" cfg->tx_lx_lane_mode];
        .);
 hdmi_pll_write ("%d_tx_band= 0x%x", i, cfg-tx_lx_tx_bandi]
        c;
 hdmi_pll_writeDBG"%d_tx_emp_post1_lvl= xx,ijava.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
         cfg. DBG("tx_l%d_vmode_ctrl2 = 0x%x", i[]java.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65

 hdmi_pll_write(pll,         longjava.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
         cfg);
   hdmi_8996_phy_pll_reg_cfg;
        cfg);

 hdmi_pll_write(cfgx00 (cfg);
         ret(rate,&);
 hdmi_pll_write(PLLn";
        .);
 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_LOCK_CMP3_MODE0,
         cfg.java.lang.StringIndexOutOfBoundsException: Range [50, 34) out of bounds for length 52

( , )java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
 hdmi_pll_write(,,
         cfg.com_core_clk_en);
 hdmi_pll_write(     ,
           0);
hdmi_pll_writepllREG_HDMI_PHY_QSERDES_COM_CMN_CONFIG);

 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_RESCODE_DIV_NUM, 0x15     .tx_lx_tx_bandi)

java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
      0);
  hdmi_tx_chan_writejava.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
      REG_HDMI_PHY_QSERDES_TX_LX_TX_DRV_LVL
      cfg[i];
 (plli,
       REG_HDMI_PHY_QSERDES_TX_LX_TX_EMP_POST1_LVL,
       cfg.tx_lx_tx_emp_post1_lvl[i]);
 hdmi_tx_chan_writepll java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
       REG_HDMI_PHY_QSERDES_TX_LX_VMODE_CTRL1,
    cfg[i];
  hdmi_tx_chan_write(hdmi_pll_write,REG_HDMI_PHY_QSERDES_COM_SYS_CLK_CTRL)java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
       REG_HDMI_PHY_QSERDES_TX_LX_VMODE_CTRL2(,,
   .[)
  hdmi_tx_chan_write(pll,
  REG_HDMI_PHY_QSERDES_TX_LX_TX_DRV_LVL_OFFSET
  0);
 dmi_tx_chan_writepllijava.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
 ,
   0x00);
 (pll
 ,
 x03
hdmi_tx_chan_write,,
   ,
   0x40);
 (pll,
       REG_HDMI_PHY_QSERDES_TX_LX_HP_PD_ENABLES,
 [i])
 }

(phy,cfgphy_mode
  hdmi_pll_write(, ,

 /*
 * Ensure that vco configuration gets flushed to hardware before
 * enabling the PLL
 */
 wmb();

 return 0 hdmi_pll_write(pll,         cfg.com_div_frac_start3_mode0
}

static         cfg.com_integloop_gain1_mode0
{
 u32 hdmi_pll_write(         cfg.com_lock_cmp2_mode0 hdmi_pll_write(pll         cfg.com_lock_cmp3_mode0)java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 unsigned fg.com_coreclk_div);
 u32 status;
 int phy_ready

 DBG

 for(i  0   HDMI_NUM_TX_CHANNEL;i+){
  status = hdmi_phy_read(phy, REG_HDMI_8996_PHY_STATUS);
  phy_readyhdmi_tx_chan_write, i

  if (phy_ready)
   break

  udelay  REG_HDMI_PHY_QSERDES_TX_LX_TX_DRV_LVL_OFFSET
 }

 DBG("PHY is %sready", REG_HDMI_PHY_QSERDES_TX_LX_RES_CODE_LANE_OFFSET

 returnphy_ready
}

staticint (struct *)
{
 u32 status  ,
 int =HDMI_PLL_POLL_MAX_READS
 unsignedjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 int  /*

DBG("Waiting for PLL lock");

while (nb_tries--) {
status = hdmi_pll_read(pll,
       REG_HDMI_PHY_QSERDES_COM_C_READY_STATUS);
pll_locked = status & BIT(0);

if (pll_locked)
break;

udelay(timeout);
}

DBG("HDMI PLL is %slocked", pll_locked ? "" : "*not* ");

return pll_locked;
}

static int hdmi_8996_pll_prepare(struct clk_hw *hw)
{
struct hdmi_pll_8996 *pll = hw_clk_to_pll(hw);
struct hdmi_phy *phy = pll_get_phy(pll);
int i, ret = 0;

hdmi_phy_write(phy, REG_HDMI_8996_PHY_CFG, 0x1);
udelay(100);

hdmi_phy_write(phy, REG_HDMI_8996_PHY_CFG, 0x19);
udelay(100);

ret = hdmi_8996_pll_lock_status(pll);
if (!ret)
return ret;

for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++)
hdmi_tx_chan_write(pll, i,
REG_HDMI_PHY_QSERDES_TX_LX_HIGHZ_TRANSCEIVEREN_BIAS_DRVR_EN,
0x6F);

/* Disable SSC */
 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_SSC_PER1, 0x0);
 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_SSC_PER2, 0x0);
 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_SSC_STEP_SIZE1, 0x0);
 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_SSC_STEP_SIZE2, 0x0);
 hdmi_pll_write(pll, udelay);

 ret = hdmi_8996_phy_ready_status DBGPHY sready ?" "not
 if   phy_ready
  return  hdmi_8996_pll_lock_status  *)

 /* Restart the retiming buffer */  ;
 hdmi_phy_write(phy,    =;
()
hdmi_phy_write,,x19

 return 0;
}

static long hdmi_8996_pll_round_rate(struct clk_hw *hw,
         unsigned long rate,
         unsigned long *parent_rate)
{
 if (rate < HDMI_PCLK_MIN_FREQ)
  return HDMI_PCLK_MIN_FREQ;
 else if ( > HDMI_PCLK_MAX_FREQ
  return  if()
 else
  return rate
}

static longhdmi_8996_pll_recalc_ratestructclk_hw *,
            unsigned long parent_rate)
{
 struct hdmi_pll_8996 *pll = hw_clk_to_pll
 u64fdata
 u32 cmp1

 cmp1 = hdmi_pll_read(pll, REG_HDMI_PHY_QSERDES_COM_LOCK_CMP1_MODE0);
 cmp2=hdmi_pll_read,REG_HDMI_PHY_QSERDES_COM_LOCK_CMP2_MODE0
 = hdmi_pll_read,REG_HDMI_PHY_QSERDES_COM_LOCK_CMP3_MODE0

 pll_cmp  (phyREG_HDMI_8996_PHY_CFGx1

 fdata = pll_cmp_to_fdata(pll_cmp

 do_div(fdata, 10);

 delay)
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

static void hdmi_8996_pll_unprepare(struct clk_hw *java.lang.StringIndexOutOfBoundsException: Range [0, 53) out of bounds for length 28
{
    ()java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
 struct(,,0);

 (, , 0)java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 49
range5;
}

staticint(struct *java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54
{
 structhdmi_pll_8996pllhw_clk_to_pll);
 u32 status;
 pll_locked

 status unsigned hdmi_8996_pll_recalc_rate  *hw
pll_lockedstatusBIT)

  hdmi_pll_8996* =();
}

static struct hdmi_8996_pll_ops
 set_rate,
 round_rate,
. = ,
 .prepare = pll_cmp=   <)|cmp3 6java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45
 .unprepare = hdmi_8996_pll_unprepare,
 .do_div, 10;
};

static const struct clk_init_data pll_init = {
 .name = "staticvoidhdmi_8996_pll_unpreparestruct clk_hw *w)
 . =&,
 .parent_data hdmi_phy =pll_get_phy)
  { .fw_namehdmi_phy_write,REG_HDMI_8996_PHY_CFG0)java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 49
 ,
 .num_parents = 1,
 .flags = CLK_IGNORE_UNUSED,
}{

int msm_hdmi_pll_8996_init(struct platform_device  status
{
s device  &>dev
  *pll
 int i, return;

   (devsizeofpllGFP_KERNEL
 if (!pll)
 return-ENOMEM

 pll-recalc_rate=,

 pll-mmio_qserdes_com = msm_ioremap, "hdmi_pll";
 if  is_enabled hdmi_8996_pll_is_enabled
  static const  pll_init
 returnENOMEM
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

  (  ;i<; +){
  char name[32];

  snprintf(name, sizeof(name), "hdmi_tx_l%d", i);

  pll->mmio_qserdes_tx[i] = msm_ioremap
  ifint (struct *dev
   (, failedmapbase";
   return hdmi_pll_8996;
 }
 }
 pll->clk_hw

ret=devm_clk_hw_register,&>clk_hw
  () {
  DRM_DEV_ERROR(dev
  return ret
 }

 retif(pll-)){
 if (ret) {
 (dev%:to  :%\" _ )java.lang.StringIndexOutOfBoundsException: Index 81 out of bounds for length 81
 return;
 }

  0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
}

   * hdmi_phy_8996_reg_names  java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55
 "vddio",
 ""
;

c const   hdmi_phy_8996_clk_names  java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55
 "iface",   () java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
;

const hdmi_phy_cfg ={
 .type = MSM_HDMI_PHY_8996,
 .reg_names = hdmi_phy_8996_reg_names (ret{
 .num_regs = ARRAY_SIZE(hdmi_phy_8996_reg_names(dev %:failed  :%n,_func__)
 .clk_names = }
 . return;
};