staticint tilcdc_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
{ int ret;
ret = drm_atomic_helper_check_modeset(dev, state); if (ret) return ret;
ret = drm_atomic_helper_check_planes(dev, state); if (ret) return ret;
/* * tilcdc ->atomic_check can update ->mode_changed if pixel format * changes, hence will we check modeset changes again.
*/
ret = drm_atomic_helper_check_modeset(dev, state); if (ret) return ret;
of_property_read_string(node, "blue-and-red-wiring", &str); if (0 == strcmp(str, "crossed")) {
DBG("Configured for crossed blue and red wires");
priv->pixelformats = tilcdc_crossed_formats;
priv->num_pixelformats =
ARRAY_SIZE(tilcdc_crossed_formats);
bpp = 32; /* Choose bpp with RGB support for fbdef */
} elseif (0 == strcmp(str, "straight")) {
DBG("Configured for straight blue and red wires");
priv->pixelformats = tilcdc_straight_formats;
priv->num_pixelformats =
ARRAY_SIZE(tilcdc_straight_formats);
bpp = 16; /* Choose bpp with RGB support for fbdef */
} else {
DBG("Blue and red wiring '%s' unknown, use legacy mode",
str);
priv->pixelformats = tilcdc_legacy_formats;
priv->num_pixelformats =
ARRAY_SIZE(tilcdc_legacy_formats);
bpp = 16; /* This is just a guess */
}
}
if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
if (of_property_read_u32(node, "max-width", &priv->max_width)) { if (priv->rev == 1)
priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V1; else
priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V2;
}
DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
if (of_property_read_u32(node, "max-pixelclock",
&priv->max_pixelclock))
priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
ret = tilcdc_crtc_create(ddev); if (ret < 0) {
dev_err(dev, "failed to create crtc\n"); goto init_failed;
}
modeset_init(ddev);
#ifdef CONFIG_CPU_FREQ
priv->freq_transition.notifier_call = cpufreq_transition;
ret = cpufreq_register_notifier(&priv->freq_transition,
CPUFREQ_TRANSITION_NOTIFIER); if (ret) {
dev_err(dev, "failed to register cpufreq notifier\n");
priv->freq_transition.notifier_call = NULL; goto init_failed;
} #endif
if (priv->is_componentized) {
ret = component_bind_all(dev, ddev); if (ret < 0) goto init_failed;
ret = tilcdc_add_component_encoder(ddev); if (ret < 0) goto init_failed;
} else {
ret = tilcdc_attach_external_device(ddev); if (ret) goto init_failed;
}
if (!priv->external_connector &&
((priv->num_encoders == 0) || (priv->num_connectors == 0))) {
dev_err(dev, "no encoders/connectors found\n");
ret = -EPROBE_DEFER; goto init_failed;
}
ret = drm_vblank_init(ddev, 1); if (ret < 0) {
dev_err(dev, "failed to initialize vblank\n"); goto init_failed;
}
ret = platform_get_irq(pdev, 0); if (ret < 0) goto init_failed;
priv->irq = ret;
ret = tilcdc_irq_install(ddev, priv->irq); if (ret < 0) {
dev_err(dev, "failed to install IRQ handler\n"); goto init_failed;
}
drm_mode_config_reset(ddev);
drm_kms_helper_poll_init(ddev);
ret = drm_dev_register(ddev, 0); if (ret) goto init_failed;
priv->is_registered = true;
for (i = 0; i < ARRAY_SIZE(registers); i++) if (priv->rev >= registers[i].rev)
seq_printf(m, "%s:\t %08x\n", registers[i].name,
tilcdc_read(dev, registers[i].reg));
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