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[
    {
        "BriefDescription": "CORE_SNOOP_RESPONSE.RSP_IFWDFE",
        "Counter": "0,1,2,3",
        "EventCode": "0xEF",
        "EventName": "CORE_SNOOP_RESPONSE.RSP_IFWDFE",
        "SampleAfterValue": "2000003",
        "UMask": "0x20"
    },
    {
        "BriefDescription": "CORE_SNOOP_RESPONSE.RSP_IFWDM",
        "Counter": "0,1,2,3",
        "EventCode": "0xEF",
        "EventName": "CORE_SNOOP_RESPONSE.RSP_IFWDM",
        "SampleAfterValue": "2000003",
        "UMask": "0x10"
    },
    {
        "BriefDescription": "CORE_SNOOP_RESPONSE.RSP_IHITFSE",
        "Counter": "0,1,2,3",
        "EventCode": "0xEF",
        "EventName": "CORE_SNOOP_RESPONSE.RSP_IHITFSE",
        "SampleAfterValue": "2000003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "CORE_SNOOP_RESPONSE.RSP_IHITI",
        "Counter": "0,1,2,3",
        "EventCode": "0xEF",
        "EventName": "CORE_SNOOP_RESPONSE.RSP_IHITI",
        "SampleAfterValue": "2000003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "CORE_SNOOP_RESPONSE.RSP_SFWDFE",
        "Counter": "0,1,2,3",
        "EventCode": "0xEF",
        "EventName": "CORE_SNOOP_RESPONSE.RSP_SFWDFE",
        "SampleAfterValue": "2000003",
        "UMask": "0x40"
    },
    {
        "BriefDescription": "CORE_SNOOP_RESPONSE.RSP_SFWDM",
        "Counter": "0,1,2,3",
        "EventCode": "0xEF",
        "EventName": "CORE_SNOOP_RESPONSE.RSP_SFWDM",
        "SampleAfterValue": "2000003",
        "UMask": "0x8"
    },
    {
        "BriefDescription": "CORE_SNOOP_RESPONSE.RSP_SHITFSE",
        "Counter": "0,1,2,3",
        "EventCode": "0xEF",
        "EventName": "CORE_SNOOP_RESPONSE.RSP_SHITFSE",
        "SampleAfterValue": "2000003",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "Counts number of cache lines that are dropped and not written back to L3 as they are deemed to be less likely to be reused shortly",
        "Counter": "0,1,2,3",
        "EventCode": "0xFE",
        "EventName": "IDI_MISC.WB_DOWNGRADE",
        "PublicDescription": "Counts number of cache lines that are dropped and not written back to L3 as they are deemed to be less likely to be reused shortly.",
        "SampleAfterValue": "100003",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "Counts number of cache lines that are allocated and written back to L3 with the intention that they are more likely to be reused shortly",
        "Counter": "0,1,2,3",
        "EventCode": "0xFE",
        "EventName": "IDI_MISC.WB_UPGRADE",
        "PublicDescription": "Counts number of cache lines that are allocated and written back to L3 with the intention that they are more likely to be reused shortly.",
        "SampleAfterValue": "100003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "L1D data line replacements",
        "Counter": "0,1,2,3",
        "EventCode": "0x51",
        "EventName": "L1D.REPLACEMENT",
        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
        "SampleAfterValue": "2000003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Number of times a request needed a FB entry but there was no entry available for it. That is the FB unavailability was dominant reason for blocking the request. A request includes cacheable/uncacheable demands that is load, store or SW prefetch.",
        "Counter": "0,1,2,3",
        "EventCode": "0x48",
        "EventName": "L1D_PEND_MISS.FB_FULL",
        "PublicDescription": "Number of times a request needed a FB (Fill Buffer) entry but there was no entry available for it. A request includes cacheable/uncacheable demands that are load, store or SW prefetch instructions.",
        "SampleAfterValue": "2000003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "L1D miss outstandings duration in cycles",
        "Counter": "0,1,2,3",
        "EventCode": "0x48",
        "EventName": "L1D_PEND_MISS.PENDING",
        "PublicDescription": "Counts duration of L1D miss outstanding, that is each cycle number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch.Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",
        "SampleAfterValue": "2000003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Cycles with L1D load Misses outstanding.",
        "Counter": "0,1,2,3",
        "CounterMask": "1",
        "EventCode": "0x48",
        "EventName": "L1D_PEND_MISS.PENDING_CYCLES",
        "PublicDescription": "Counts duration of L1D miss outstanding in cycles.",
        "SampleAfterValue": "2000003",
        "UMask": "0x1"
    },
    {
        "AnyThread": "1",
        "BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.",
        "Counter": "0,1,2,3",
        "CounterMask": "1",
        "EventCode": "0x48",
        "EventName": "L1D_PEND_MISS.PENDING_CYCLES_ANY",
        "SampleAfterValue": "2000003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "L2 cache lines filling L2",
        "Counter": "0,1,2,3",
        "EventCode": "0xF1",
        "EventName": "L2_LINES_IN.ALL",
        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",
        "SampleAfterValue": "100003",
        "UMask": "0x1f"
    },
    {
        "BriefDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines can be either in modified state or clean state. Modified lines may either be written back to L3 or directly written to memory and not allocated in L3.  Clean lines may either be allocated in L3 or dropped",
        "Counter": "0,1,2,3",
        "EventCode": "0xF2",
        "EventName": "L2_LINES_OUT.NON_SILENT",
        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines can be either in modified state or clean state. Modified lines may either be written back to L3 or directly written to memory and not allocated in L3.  Clean lines may either be allocated in L3 or dropped.",
        "SampleAfterValue": "200003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "Counts the number of lines that are silently dropped by L2 cache when triggered by an L2 cache fill. These lines are typically in Shared state. A non-threaded event.",
        "Counter": "0,1,2,3",
        "EventCode": "0xF2",
        "EventName": "L2_LINES_OUT.SILENT",
        "SampleAfterValue": "200003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Counts the number of lines that have been hardware prefetched but not used and now evicted by L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0xF2",
        "EventName": "L2_LINES_OUT.USELESS_HWPF",
        "SampleAfterValue": "200003",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "This event is deprecated. Refer to new event L2_LINES_OUT.USELESS_HWPF",
        "Counter": "0,1,2,3",
        "Deprecated": "1",
        "EventCode": "0xF2",
        "EventName": "L2_LINES_OUT.USELESS_PREF",
        "SampleAfterValue": "200003",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "L2 code requests",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.ALL_CODE_RD",
        "PublicDescription": "Counts the total number of L2 code requests.",
        "SampleAfterValue": "200003",
        "UMask": "0xe4"
    },
    {
        "BriefDescription": "Demand Data Read requests",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",
        "PublicDescription": "Counts the number of demand Data Read requests (including requests from L1D hardware prefetchers). These loads may hit or miss L2 cache. Only non rejected loads are counted.",
        "SampleAfterValue": "200003",
        "UMask": "0xe1"
    },
    {
        "BriefDescription": "Demand requests that miss L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.ALL_DEMAND_MISS",
        "PublicDescription": "Demand requests that miss L2 cache.",
        "SampleAfterValue": "200003",
        "UMask": "0x27"
    },
    {
        "BriefDescription": "Demand requests to L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.ALL_DEMAND_REFERENCES",
        "PublicDescription": "Demand requests to L2 cache.",
        "SampleAfterValue": "200003",
        "UMask": "0xe7"
    },
    {
        "BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.ALL_PF",
        "PublicDescription": "Counts the total number of requests from the L2 hardware prefetchers.",
        "SampleAfterValue": "200003",
        "UMask": "0xf8"
    },
    {
        "BriefDescription": "RFO requests to L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.ALL_RFO",
        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",
        "SampleAfterValue": "200003",
        "UMask": "0xe2"
    },
    {
        "BriefDescription": "L2 cache hits when fetching instructions, code reads.",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.CODE_RD_HIT",
        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",
        "SampleAfterValue": "200003",
        "UMask": "0xc4"
    },
    {
        "BriefDescription": "L2 cache misses when fetching instructions",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.CODE_RD_MISS",
        "PublicDescription": "Counts L2 cache misses when fetching instructions.",
        "SampleAfterValue": "200003",
        "UMask": "0x24"
    },
    {
        "BriefDescription": "Demand Data Read requests that hit L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",
        "PublicDescription": "Counts the number of demand Data Read requests, initiated by load instructions, that hit L2 cache",
        "SampleAfterValue": "200003",
        "UMask": "0xc1"
    },
    {
        "BriefDescription": "Demand Data Read miss L2, no rejects",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",
        "PublicDescription": "Counts the number of demand Data Read requests that miss L2 cache. Only not rejected loads are counted.",
        "SampleAfterValue": "200003",
        "UMask": "0x21"
    },
    {
        "BriefDescription": "All requests that miss L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.MISS",
        "PublicDescription": "All requests that miss L2 cache.",
        "SampleAfterValue": "200003",
        "UMask": "0x3f"
    },
    {
        "BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that hit L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.PF_HIT",
        "PublicDescription": "Counts requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that hit L2 cache.",
        "SampleAfterValue": "200003",
        "UMask": "0xd8"
    },
    {
        "BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that miss L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.PF_MISS",
        "PublicDescription": "Counts requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that miss L2 cache.",
        "SampleAfterValue": "200003",
        "UMask": "0x38"
    },
    {
        "BriefDescription": "All L2 requests",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.REFERENCES",
        "PublicDescription": "All L2 requests.",
        "SampleAfterValue": "200003",
        "UMask": "0xff"
    },
    {
        "BriefDescription": "RFO requests that hit L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.RFO_HIT",
        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",
        "SampleAfterValue": "200003",
        "UMask": "0xc2"
    },
    {
        "BriefDescription": "RFO requests that miss L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0x24",
        "EventName": "L2_RQSTS.RFO_MISS",
        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",
        "SampleAfterValue": "200003",
        "UMask": "0x22"
    },
    {
        "BriefDescription": "L2 writebacks that access L2 cache",
        "Counter": "0,1,2,3",
        "EventCode": "0xF0",
        "EventName": "L2_TRANS.L2_WB",
        "PublicDescription": "Counts L2 writebacks that access L2 cache.",
        "SampleAfterValue": "200003",
        "UMask": "0x40"
    },
    {
        "BriefDescription": "Core-originated cacheable demand requests missed L3",
        "Counter": "0,1,2,3",
        "Errata": "SKL057",
        "EventCode": "0x2E",
        "EventName": "LONGEST_LAT_CACHE.MISS",
        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches from L1 and L2. It does not include all misses to the L3.",
        "SampleAfterValue": "100003",
        "UMask": "0x41"
    },
    {
        "BriefDescription": "Core-originated cacheable demand requests that refer to L3",
        "Counter": "0,1,2,3",
        "Errata": "SKL057",
        "EventCode": "0x2E",
        "EventName": "LONGEST_LAT_CACHE.REFERENCE",
        "PublicDescription": "Counts core-originated cacheable requests to the  L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches from L1 and L2.  It does not include all accesses to the L3.",
        "SampleAfterValue": "100003",
        "UMask": "0x4f"
    },
    {
        "BriefDescription": "Retired load instructions.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD0",
        "EventName": "MEM_INST_RETIRED.ALL_LOADS",
        "PEBS": "1",
        "PublicDescription": "Counts all retired load instructions. This event accounts for SW prefetch instructions of PREFETCHNTA or PREFETCHT0/1/2 or PREFETCHW.",
        "SampleAfterValue": "2000003",
        "UMask": "0x81"
    },
    {
        "BriefDescription": "Retired store instructions.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD0",
        "EventName": "MEM_INST_RETIRED.ALL_STORES",
        "PEBS": "1",
        "PublicDescription": "Counts all retired store instructions.",
        "SampleAfterValue": "2000003",
        "UMask": "0x82"
    },
    {
        "BriefDescription": "All retired memory instructions.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD0",
        "EventName": "MEM_INST_RETIRED.ANY",
        "PEBS": "1",
        "PublicDescription": "Counts all retired memory instructions - loads and stores.",
        "SampleAfterValue": "2000003",
        "UMask": "0x83"
    },
    {
        "BriefDescription": "Retired load instructions with locked access.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD0",
        "EventName": "MEM_INST_RETIRED.LOCK_LOADS",
        "PEBS": "1",
        "SampleAfterValue": "100007",
        "UMask": "0x21"
    },
    {
        "BriefDescription": "Retired load instructions that split across a cacheline boundary.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD0",
        "EventName": "MEM_INST_RETIRED.SPLIT_LOADS",
        "PEBS": "1",
        "PublicDescription": "Counts retired load instructions that split across a cacheline boundary.",
        "SampleAfterValue": "100003",
        "UMask": "0x41"
    },
    {
        "BriefDescription": "Retired store instructions that split across a cacheline boundary.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD0",
        "EventName": "MEM_INST_RETIRED.SPLIT_STORES",
        "PEBS": "1",
        "PublicDescription": "Counts retired store instructions that split across a cacheline boundary.",
        "SampleAfterValue": "100003",
        "UMask": "0x42"
    },
    {
        "BriefDescription": "Retired load instructions that miss the STLB.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD0",
        "EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS",
        "PEBS": "1",
        "PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB (STLB).",
        "SampleAfterValue": "100003",
        "UMask": "0x11"
    },
    {
        "BriefDescription": "Retired store instructions that miss the STLB.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD0",
        "EventName": "MEM_INST_RETIRED.STLB_MISS_STORES",
        "PEBS": "1",
        "PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TLB (STLB).",
        "SampleAfterValue": "100003",
        "UMask": "0x12"
    },
    {
        "BriefDescription": "Retired load instructions which data sources were L3 and cross-core snoop hits in on-pkg core cache",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD2",
        "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT",
        "PEBS": "1",
        "PublicDescription": "Retired load instructions which data sources were L3 and cross-core snoop hits in on-pkg core cache.",
        "SampleAfterValue": "20011",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "Retired load instructions which data sources were HitM responses from shared L3",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD2",
        "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM",
        "PEBS": "1",
        "PublicDescription": "Retired load instructions which data sources were HitM responses from shared L3.",
        "SampleAfterValue": "20011",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "Retired load instructions which data sources were L3 hit and cross-core snoop missed in on-pkg core cache.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD2",
        "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS",
        "PEBS": "1",
        "SampleAfterValue": "20011",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Retired load instructions which data sources were hits in L3 without snoops required",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD2",
        "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE",
        "PEBS": "1",
        "PublicDescription": "Retired load instructions which data sources were hits in L3 without snoops required.",
        "SampleAfterValue": "100003",
        "UMask": "0x8"
    },
    {
        "BriefDescription": "Retired load instructions which data sources missed L3 but serviced from local dram",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD3",
        "EventName": "MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM",
        "PEBS": "1",
        "PublicDescription": "Retired load instructions which data sources missed L3 but serviced from local DRAM.",
        "SampleAfterValue": "100007",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Retired load instructions which data sources missed L3 but serviced from remote dram",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD3",
        "EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM",
        "PEBS": "1",
        "SampleAfterValue": "100007",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "Retired load instructions whose data sources was forwarded from a remote cache",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD3",
        "EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD",
        "PublicDescription": "Retired load instructions whose data sources was forwarded from a remote cache.",
        "SampleAfterValue": "100007",
        "UMask": "0x8"
    },
    {
        "BriefDescription": "Retired load instructions whose data sources was remote HITM",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD3",
        "EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM",
        "PEBS": "1",
        "PublicDescription": "Retired load instructions whose data sources was remote HITM.",
        "SampleAfterValue": "100007",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "Retired load instructions with remote Intel(R) Optane(TM) DC persistent memory as the data source where the data request missed all caches.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD3",
        "EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM",
        "PEBS": "1",
        "PublicDescription": "Counts retired load instructions with remote Intel(R) Optane(TM) DC persistent memory as the data source and the data request missed L3 (AppDirect or Memory Mode) and DRAM cache(Memory Mode).",
        "SampleAfterValue": "100007",
        "UMask": "0x10"
    },
    {
        "BriefDescription": "Retired instructions with at least 1 uncacheable load or lock.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD4",
        "EventName": "MEM_LOAD_MISC_RETIRED.UC",
        "PEBS": "1",
        "SampleAfterValue": "100007",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "Retired load instructions which data sources were load missed L1 but hit FB due to preceding miss to the same cache line with data not ready",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD1",
        "EventName": "MEM_LOAD_RETIRED.FB_HIT",
        "PEBS": "1",
        "PublicDescription": "Counts retired load instructions with at least one uop was load missed in L1 but hit FB (Fill Buffers) due to preceding miss to the same cache line with data not ready.",
        "SampleAfterValue": "100007",
        "UMask": "0x40"
    },
    {
        "BriefDescription": "Retired load instructions with L1 cache hits as data sources",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD1",
        "EventName": "MEM_LOAD_RETIRED.L1_HIT",
        "PEBS": "1",
        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source.",
        "SampleAfterValue": "2000003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Retired load instructions missed L1 cache as data sources",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD1",
        "EventName": "MEM_LOAD_RETIRED.L1_MISS",
        "PEBS": "1",
        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L1 cache.",
        "SampleAfterValue": "100003",
        "UMask": "0x8"
    },
    {
        "BriefDescription": "Retired load instructions with L2 cache hits as data sources",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD1",
        "EventName": "MEM_LOAD_RETIRED.L2_HIT",
        "PEBS": "1",
        "PublicDescription": "Retired load instructions with L2 cache hits as data sources.",
        "SampleAfterValue": "100003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "Retired load instructions missed L2 cache as data sources",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD1",
        "EventName": "MEM_LOAD_RETIRED.L2_MISS",
        "PEBS": "1",
        "PublicDescription": "Retired load instructions missed L2 cache as data sources.",
        "SampleAfterValue": "50021",
        "UMask": "0x10"
    },
    {
        "BriefDescription": "Retired load instructions with L3 cache hits as data sources",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD1",
        "EventName": "MEM_LOAD_RETIRED.L3_HIT",
        "PEBS": "1",
        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L3 cache.",
        "SampleAfterValue": "50021",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "Retired load instructions missed L3 cache as data sources",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD1",
        "EventName": "MEM_LOAD_RETIRED.L3_MISS",
        "PEBS": "1",
        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L3 cache.",
        "SampleAfterValue": "100007",
        "UMask": "0x20"
    },
    {
        "BriefDescription": "Retired load instructions with local Intel(R) Optane(TM) DC persistent memory as the data source where the data request missed all caches.",
        "Counter": "0,1,2,3",
        "Data_LA": "1",
        "EventCode": "0xD1",
        "EventName": "MEM_LOAD_RETIRED.LOCAL_PMM",
        "PEBS": "1",
        "PublicDescription": "Counts retired load instructions with local Intel(R) Optane(TM) DC persistent memory as the data source and the data request missed L3 (AppDirect or Memory Mode) and DRAM cache(Memory Mode).",
        "SampleAfterValue": "100003",
        "UMask": "0x80"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F803C0491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x10003C0491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x8003C0491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x4003C0491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1003C0491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x8007C0491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_MISS OCR.ALL_DATA_RD.L3_HIT.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x2003C0491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_NONE OCR.ALL_DATA_RD.L3_HIT.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x803C0491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP  OCR.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80080491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE  OCR.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000080491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD  OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800080491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD  OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400080491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED  OCR.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100080491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200080491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80080491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP  OCR.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80200491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE  OCR.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000200491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD  OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800200491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD  OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400200491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED  OCR.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100200491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200200491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80200491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP  OCR.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80040491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE  OCR.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000040491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD  OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800040491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD  OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400040491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED  OCR.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100040491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200040491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80040491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP  OCR.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80100491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE  OCR.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000100491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD  OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800100491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD  OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400100491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED  OCR.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100100491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200100491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80100491",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F803C0490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x10003C0490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x8003C0490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x4003C0490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1003C0490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x8007C0490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x2003C0490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x803C0490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP  OCR.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80080490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE  OCR.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000080490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD  OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800080490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD  OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400080490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED  OCR.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100080490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200080490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80080490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP  OCR.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80200490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE  OCR.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000200490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD  OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800200490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD  OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400200490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED  OCR.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100200490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200200490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80200490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP  OCR.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80040490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE  OCR.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000040490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD  OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800040490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD  OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400040490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED  OCR.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100040490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200040490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80040490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP  OCR.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80100490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE  OCR.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000100490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD  OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800100490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD  OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400100490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED  OCR.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100100490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200100490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80100490",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F803C0120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x10003C0120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x8003C0120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x4003C0120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1003C0120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x8007C0120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_MISS OCR.ALL_PF_RFO.L3_HIT.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x2003C0120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_NONE OCR.ALL_PF_RFO.L3_HIT.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x803C0120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP  OCR.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80080120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE  OCR.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000080120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD  OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800080120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD  OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400080120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED  OCR.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100080120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200080120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80080120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP  OCR.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80200120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE  OCR.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000200120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD  OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800200120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD  OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400200120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED  OCR.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100200120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200200120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80200120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP  OCR.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80040120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE  OCR.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x1000040120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD  OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x800040120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD  OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x400040120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED  OCR.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x100040120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x200040120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_NONE",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_NONE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x80040120",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP  OCR.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3F80100120",
        "SampleAfterValue": "100003",
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[ Dauer der Verarbeitung: 0.10 Sekunden  (vorverarbeitet)  ]