<p><a id="biBFranco2006" name="biBFranco2006"></a></p>
<p class='BibEntry'>
[<span class='BibKey'>FSAJ06</span>] <b class='BibAuthor'>Franco, L., Subirats, J., Anthony, M. and Jerez, J.</b>,
<i class='BibTitle'>A New Constructive Approach for Creating All Linearly Separable (Threshold) Functions</i>,
in <i class='BibBooktitle'>The 2006 IEEE International Joint Conference on Neural Network Proceedings</i>
(<span class='BibYear'>2006</span>),
<span class='BibPages'>4791--4796</span>.
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<p><a id="biBGeche2010" name="biBGeche2010"></a></p>
<p class='BibEntry'>
[<span class='BibKey'>Gec10</span>] <b class='BibAuthor'>Geche, F.</b>,
<i class='BibTitle'>Analysis of Discrete Functions and Logical Schemes Synthesis in Neurobasis (in Ukrainian)</i>,
<span class='BibPublisher'>Uzhhorod National University</span>
(<span class='BibYear'>2010</span>).
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<p><a id="biBGecheMulesa2017" name="biBGecheMulesa2017"></a></p>
<p class='BibEntry'>
[<span class='BibKey'>GMB17</span>] <b class='BibAuthor'>Geche, F., Mulesa, O. and Buchok, V.</b>,
<i class='BibTitle'>Verification of realizability of boolean functions by a neural element with a threshold activation function</i>,
<span class='BibJournal'>Eastern European Journal of Enterprise Technologies</span>,
<em class='BibVolume'>1</em>
(<span class='BibYear'>2017</span>),
<span class='BibPages'>30-40</span>.
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<p><a id="biBGecheRobotyshyn83" name="biBGecheRobotyshyn83"></a></p>
<p class='BibEntry'>
[<span class='BibKey'>GPR83</span>] <b class='BibAuthor'>Geche, F., Polivko, V. and Robotishin, V.</b>,
<i class='BibTitle'>Realization of boolean functions using threshold elements</i>,
<span class='BibJournal'>Kibernetika (Kiev)</span> (<span class='BibNumber'>6</span>)
(<span class='BibYear'>1983</span>),
<span class='BibPages'>62--67</span>.
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<p><a id="biBGowda11" name="biBGowda11"></a></p>
<p class='BibEntry'>
[<span class='BibKey'>GVKB11</span>] <b class='BibAuthor'>Gowda, T., Vrudhula, S., Kulkarni, N. and Berezowski, K.</b>,
<i class='BibTitle'>Identification of Threshold Functions and Synthesis of Threshold Networks</i>,
<span class='BibJournal'>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</span>,
<em class='BibVolume'>30</em>
(<span class='BibYear'>2011</span>),
<span class='BibPages'>665--677</span>.
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<p><a id="biBHorvath16" name="biBHorvath16"></a></p>
<p class='BibEntry'>
[<span class='BibKey'>HST16</span>] <b class='BibAuthor'>Horvath, E., Seselja, B. and Tepavcevic, A.</b>,
<i class='BibTitle'>A note on lattice variant of thresholdness of Boolean functions</i>,
<span class='BibJournal'>Miskolc Mathematical Notes</span>,
<em class='BibVolume'>17</em>
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<span class='BibPages'>293--304</span>.
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<p><a id="biBKulkarni16" name="biBKulkarni16"></a></p>
<p class='BibEntry'>
[<span class='BibKey'>KYSV16</span>] <b class='BibAuthor'>Kulkarni, N., Yang, J., Seo, J. and Vrudhula, S.</b>,
<i class='BibTitle'>Reducing Power, Leakage, and Area of Standard-Cell ASICs Using Threshold Logic Flip-Flops</i>,
<span class='BibJournal'>IEEE Transactions on Very Large Scale Integration (VLSI) Systems</span>,
<em class='BibVolume'>24</em> (<span class='BibNumber'>9</span>)
(<span class='BibYear'>2016</span>),
<span class='BibPages'>2873--2886</span>.
</p>
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