Quelle c1_Defs_riscv.hpp Sprache: C

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#ifndef CPU_RISCV_C1_DEFS_RISCV_HPP
#define CPU_RISCV_C1_DEFS_RISCV_HPP

// native word offsets from memory address (little endian)
enum {
  pd_lo_word_offset_in_bytes = 0,
  pd_hi_word_offset_in_bytes = BytesPerWord
};

// explicit rounding operations are required to implement the strictFP mode
enum {
  pd_strict_fp_requires_explicit_rounding = false
};

// registers
enum {
  pd_nof_cpu_regs_frame_map = Register::number_of_registers,       // number of registers used during code emission
  pd_nof_fpu_regs_frame_map = FloatRegister::number_of_registers,  // number of float registers used during code emission

  // caller saved
  pd_nof_caller_save_cpu_regs_frame_map = 13, // number of registers killed by calls
  pd_nof_caller_save_fpu_regs_frame_map = 32, // number of float registers killed by calls

  pd_first_callee_saved_reg = pd_nof_caller_save_cpu_regs_frame_map,
  pd_last_callee_saved_reg = 21,

  pd_last_allocatable_cpu_reg = pd_nof_caller_save_cpu_regs_frame_map - 1,

  pd_nof_cpu_regs_reg_alloc
    = pd_nof_caller_save_cpu_regs_frame_map,  // number of registers that are visible to register allocator
  pd_nof_fpu_regs_reg_alloc = 32,  // number of float registers that are visible to register allocator

  pd_nof_cpu_regs_linearscan = 32, // number of registers visible to linear scan
  pd_nof_fpu_regs_linearscan = pd_nof_fpu_regs_frame_map, // number of float registers visible to linear scan
  pd_nof_xmm_regs_linearscan = 0, // don't have vector registers

  pd_first_cpu_reg  = 0,
  pd_last_cpu_reg   = pd_nof_cpu_regs_reg_alloc - 1,
  pd_first_byte_reg = 0,
  pd_last_byte_reg  = pd_nof_cpu_regs_reg_alloc - 1,

  pd_first_fpu_reg  = pd_nof_cpu_regs_frame_map,
  pd_last_fpu_reg   = pd_first_fpu_reg + 31,

  pd_first_callee_saved_fpu_reg_1 = 8 + pd_first_fpu_reg,
  pd_last_callee_saved_fpu_reg_1  = 9 + pd_first_fpu_reg,
  pd_first_callee_saved_fpu_reg_2 = 18 + pd_first_fpu_reg,
  pd_last_callee_saved_fpu_reg_2  = 27 + pd_first_fpu_reg
};

// Encoding of float value in debug info.  This is true on x86 where
// floats are extended to doubles when stored in the stack, false for
// RISCV where floats and doubles are stored in their native form.
enum {
  pd_float_saved_as_double = false
};

#endif // CPU_RISCV_C1_DEFS_RISCV_HPP

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