struct dw_i3c_master { struct i3c_master_controller base; struct device *dev;
u16 maxdevs;
u16 datstartaddr;
u32 free_pos; struct { struct list_head list; struct dw_i3c_xfer *cur;
spinlock_t lock;
} xferqueue; struct dw_i3c_master_caps caps; void __iomem *regs; struct reset_control *core_rst; struct clk *core_clk; struct clk *pclk; char version[5]; char type[5];
u32 sir_rej_mask; bool i2c_slv_prsnt;
u32 dev_addr;
u32 i3c_pp_timing;
u32 i3c_od_timing;
u32 ext_lcnt_timing;
u32 bus_free_timing;
u32 i2c_fm_timing;
u32 i2c_fmp_timing;
u32 quirks; /* * Per-device hardware data, used to manage the device address table * (DAT) * * Locking: the devs array may be referenced in IRQ context while * processing an IBI. However, IBIs (for a specific device, which * implies a specific DAT entry) can only happen while interrupts are * requested for that device, which is serialised against other * insertions/removals from the array by the global i3c infrastructure. * So, devs_lock protects against concurrent updates to devs->ibi_dev * between request_ibi/free_ibi and the IBI irq event.
*/ struct dw_i3c_dat_entry devs[DW_I3C_MAX_DEVS];
spinlock_t devs_lock;
/* platform-specific data */ conststruct dw_i3c_platform_ops *platform_ops;
struct work_struct hj_work;
};
struct dw_i3c_platform_ops { /* * Called on early bus init: the i3c has been set up, but before any * transactions have taken place. Platform implementations may use to * perform actual device enabling with the i3c core ready.
*/ int (*init)(struct dw_i3c_master *i3c);
/* * Initialise a DAT entry to enable/disable IBIs. Allows the platform * to perform any device workarounds on the DAT entry before * inserting into the hardware table. * * Called with the DAT lock held; must not sleep.
*/ void (*set_dat_ibi)(struct dw_i3c_master *i3c, struct i3c_dev_desc *dev, bool enable, u32 *reg);
};
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