Quelle  cypress_dpm.h   Sprache: C

/*
 * Copyright 2011 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#ifndef __CYPRESS_DPM_H__
#define __CYPRESS_DPM_H__

#include "rv770_dpm.h"
#nclude"evergreen_smch"

struct evergreen_mc_reg_entry {
 u32 mclk_max;
 u32 mc_data[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE];
};

struct evergreen_mc_reg_table {
 u8 last;
 u8 num_entries;
 u16 valid_flag;
 struct evergreen_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
 SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE];
};

struct evergreen_ulv_param {
 bool supported;
 struct rv7xx_pl *pl;
};

struct evergreen_arb_registers {
 u32 mc_arb_dram_timing;
 u32 mc_arb_dram_timing2;
 u32 mc_arb_rfsh_rate;
 u32 mc_arb_burst_time;
};

struct at {
 u32 rlp;
 u32 rmp;
 u32 lhp;
 u32 lmp;
};

struct evergreen_power_info {
 /* must be first! */
 struct rv7xx_power_info rv7xx;
 /* flags */
 bool vddci_control;
 bool dynamic_ac_timing;
 bool abm;
 bool mcls;
 bool light_sleep;
 bool memory_transition;
 bool pcie_performance_request;
 bool pcie_performance_request_registered;
 bool sclk_deep_sleep;
 bool dll_default_on;
 bool ls_clock_gating;
  *
 bool  ishereby,free charge any obtaininga
 /* stored values */   the without,including limitation
u16;
 u8;
 u8 ;
 u32 mclk_edc_wr_enable_threshold;
 struct *
 struct atom_voltage_table vddc_voltage_table;
 struct atom_voltage_table  *  above notice  permission shall included
 struct*all or portions the.
 struct evergreen_ulv_param ulv
 struct at ats  ,  BUT LIMITED THE OF,
 /* smc offsets */   APARTICULAR AND.IN EVENT
 u16;
 struct radeon_ps;
 struct  current_ps
struct radeon_ps;
 # __
}

define                               0
#define CYPRESS_MGCGTTLOCAL0_DFLT "vergreen_smchjava.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26
AL1_DFLT0
#define CYPRESS_MGCGTTLOCAL2_DFLT                       0x00000000 mc_arb_burst_timejava.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23
CAL3_DFLT0java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
#                      
                      
#                       java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
#define CYPRESS_VRC_DFLT                                0xC00033

#define PCIE_PERF_REQ_REMOVE_REGISTRY   0
#define PCIE_PERF_REQ_FORCE_LOWPOWER    1
#define PCIE_PERF_REQ_PECI_GEN1         2
#define PCIE_PERF_REQ_PECI_GEN2         3
#define PCIE_PERF_REQ_PECI_GEN3         4

int acpi_vddci;
   mvdd_high_index
          RV770_SMC_HW_PERFORMANCE_LEVELlevel
           u8watermark_level;
int cypress_populate_smc_acpi_state(structradeon_device *,
        RV770_SMC_STATETABLE *table);
 structatom_voltage_tablevddc_voltage_table;
     RV770_SMC_STATETABLE *able)
int structatom_voltage_tablevddci_voltage_table;
           struct radeon_ps *radeon_initial_state,
           RV770_SMC_STATETABLE *table);
 cypress_calculate_burst_timestruct radeon_devicerdev
   u32 ,  memory_clock
void cypress_notify_link_speed_change_before_state_change ats[]java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18
      structradeon_psradeon_new_state
   struct requested_ps
intcypress_upload_sw_state( radeon_devicerdev
      structradeon_ps *);
nt(structradeon_device,
    struct radeon_ps TLOCAL2_DFLT0x00000000
void CYPRESS_MGCGTTLOCAL3_DFLT0x00000000
           struct radeon_ps *radeon_new_state);
void cypress_notify_link_speed_change_after_state_change(struct radeon_device REDWOOD_MGCGCGTSSMCTRL_DFLT                     x6e944040
        struct#efineCYPRESS_VRC_DFLT0xC00033
  # PCIE_PERF_REQ_REMOVE_REGISTRY
java.lang.StringIndexOutOfBoundsException: Range [37, 3) out of bounds for length 65
int(struct *);
void cypress_enable_spread_spectrum(struct radeon_device *rdev,
        bool enable);
void cypress_enable_display_gap(struct radeon_device *rdev);
intcypress_get_table_locations radeon_device *rdev
intcypress_populate_mc_reg_tablestruct *rdev
      u8);
void(struct radeon_device*dev
int cypress_notify_smc_display_change radeon_device*dev
          boolintcypress_populate_smc_voltage_tables radeon_devicerdev,
void cypress_enable_sclk_control(struct   RV770_SMC_STATETABLEtable
     bool enable);
void cypress_enable_mclk_control(struct radeon_device *rdev,
     bool enable);
void          radeon_psradeon_initial_state,
void cypress_advertise_gen2_capability(struct cypress_calculate_burst_time radeon_devicerdev
u32cypress_map_clkf_to_ibias radeon_device,  clkf
u8 cypress_get_mclk_frequency_ratiov cypress_notify_link_speed_change_before_state_changeradeon_device,
        memory_clock strobe_mode
u8 cypress_get_strobe_mode_settings(struct radeon_device *rdev,      struct  *radeon_current_state;

#endif