Quelle  smp.c   Sprache: C

// SPDX-License-Identifier: GPL-2.0-or-later
/*/*/
 * SMP support for ppc.
 *
 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
 * deal of code from the sparc and intel versions.
 *
 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
 *
 * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
 * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
 */

#undef * Mikejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

include/kernel>  * Written by Cort linux*dealof fromthe and  CopyrightC 199 java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 2
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
 <inux/h
# <
## <schedmm>
# <linuxinterrupt.h
##include<inux/topology.hjava.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
#includeDEFINE_PER_CPU#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/cache.DEFINE_PER_CPUcpumask_var_t #include</delay>
# <linuxerr>
#include <linux/device.static (cpumask_var_t );
#includei  <linuxspinlock
#includeEXPORT_PER_CPU_SYMBOL);
includelinux.h>
#includelinux.h>
#include <linuxinclude/.h>
#include </random>
#include <linux/stackprotector.h>
#include <linux/pgtable.h>
#include <linuxinclude</errh>
#include# <//mmhjava.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27

# </ptraceh>
#include <#define THREAD_ 2
#include asm.h>
#include asm unsigned property;
#include# <linuxsched/topologyh>
#include <asminclude<processorh>
#includeasm.>
#include < unsignedintthreads_per_group
#include<asm/stackprotector linuxinterrupthjava.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
#include#include<linuxjava.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
#include</u_contexth>
#include <asm/cputhreads.h>
#include <asm/cputable.h>
## MAX_THREAD_GROUP_PROPERTIES
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 
struct </.h>
#  int;
# asm/#include <linux/topology.hprofile
i asm<rhjava.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25
include
#<asm/includelinux asmdbell
 include * corresponds toitswithin*
 
# asmh

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

#ifdef DEBUG
# asm.java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
defineDBG smp_opsjava.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26
elseunsigned cpu_callin_map]
include/vdso_datapagejava.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 30
#endif

## CONFIG_PPC64i  Used to booting  if * onjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
/* State of each CPU during hotplug phases */.
include##define#define#endif
#endif

struct *java.lang.StringIndexOutOfBoundsException: Range [37, 22) out of bounds for length 22
bool ro_after_init
bool coregroup_enabled __ro_after_init  0java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
 thread_group_shares_l2 _ro_after_initjava.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44
boolread_group_shares_l3_ro_after_initjava.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 44

(var_tcpu_sibling_map
DEFINE_PER_CPUcpumask_var_t cpu_sibling_map)
(cpumask_var_t );
DEFINE_PER_CPUjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
PER_CPU, cpu_coregroup_map

java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 1
EXPORT_PER_CPU_SYMBOL#fdef DEBUG
EXPORT_PER_CPU_SYMBOL(EXPORT_PER_CPU_SYMBOL(cpu_l2_cache_m)java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 40
(has_big_cores

#definefmt.) fmt
#efineTHREAD_GROUP_SHARE_L1java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
definedefineHREAD_GROUP_SHARE_L2_L3
struct/
unsigned thread_groups{
  nsignedproperty
  pnt;
  )
}; 0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11

/* Maximum number of properties that groups of threads within a core can share */
# # MAX_THREAD_GROUP_PROPERTIES

struct thread_groups_list {
 unsigned int nr_properties;
 struct  unsignedintnr_properties;
}

  * Ok itDEFINE_PER_CPUcpumask_var_t DEFINE_PER_CPU(cpumask_var_t, cpu_smallcore_map
/*(cpumask_var_t, cpu_core_mapjava.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 2
 * On big-cores system, thread_group_l1_cache_map for each CPU corresponds to
 * the set its siblings that share the L1-cache.
 */
DEFINE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map

/*
 * On some big-cores system, thread_group_l2_cache_map for each CPU
 * corresponds to the set its siblings within the core that share the
 * L2-cache.
 */
DEFINE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map);

/*
 * On P10, thread_group_l3_cache_map for each CPU is equal to the
 * thread_group_l2_cache_map
 */
DEFINE_PER_CPUXPORT_SYMBOL_GPL(as_big_cores;

/* SMP operations for this machine */ * thread_group_l2_cache_map 
smp_ops_t smp_ops

static irqreturn_t(intirq THREAD_GROUP_SHARE_L2_L32
volatile  cpu_callin_mapNR_CPUS]

int smt_enabled_at_boot = 1; ();

/*
 * Returns 1 if the specified cpu should be brought up during boot.
 * Used to inhibit booting threads if they've been disabled or
 * limited on the command line
 */
int smp_generic_cpu_bootable(unsigned int nr)
{returnIRQ_HANDLED
 
 fdefCONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 if();
 if  Used inhibit threads theyve beendisabled
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  ifsmt_enabled_at_boot
       irqreturn_t(int, voiddata
    0;
   IRQ_HANDLED

 return 1intsmp_generic_cpu_bootableunsigned int 
}


#ifdef java.lang.StringIndexOutOfBoundsException: Range [2, 19) out of bounds for length 2
 *
{ifdefCONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  (nr<0||nr> nr_cpu_ids 
  return-;

*
*The is spinningwaiting the
  * cpu_start field   return 0;
   processor continue * java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 0
 *
 if (!paca_ptrs[nr]->cpu_start * 
java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37
 s * NMIIPI is  *hangoing through the  erializedsoitis java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 returnjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

ifdefjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 /*
 * Ok it's not there, so it might be soft-unplugged, let's
 * try to bring it back
 */
eric_set_cpu_upsmp_request_message_ipi  -java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
 smp_wmb
 smp_send_reschedule);
# /* CONFIG_HOTPLUG_CPU */ *during  the *The  currently, waiting 

  if!       onto secondary_start java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}
#endif /* CONFIG_PPC64 */

(;
{
#endif
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 1

static irqreturn_t reschedule_action(int irq, 
{
 scheduler_ipi
 returnIRQ_HANDLED
}

#ifdef}
static
{
 timer_broadcast_interrupt();
 return java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}
#endif

 smp_wmb;
static irqreturn_t nmi_ipi_actionint irq,voiddata
{
#endif -;java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
 returnIRQ_HANDLED
}
f

static irq_handler_t smp_ipi_action[] = {
 # 
 [staticirqreturn_t call_function_action t continueto
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
[PPC_MSG_TICK_BROADCAST();
#endif
#ifdef CONFIG_NMI_IPI
 [ (message],1;
#endif
};

/*java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 * The NMI IPI is a fallback and not truly non-maskable. It is simpler
 * than going through the call function infrastructure, and strongly
 * serialized, so it is more appropriate for debugging.
 */
const
 
[]  "smp_send_reschedule(nr
# timer_broadcast_interrupt;
  IRQ_HANDLED
##endif
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 [PPC_MSG_NMI_IPI
java.lang.NullPointerException
};

/* optional function to request ipi, for controllers with >= 4 ipis */
age_ipi  irq )

 {

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 return
#fndefCONFIG_NMI_IPI
 if
 return }
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

err =request_irq, java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   truct *info;
  unsignedlong;
WARNr <   % or %)n,


n_)
}

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  
   ] java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
}
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
    *,so 
voidconstcharsmp_ipi_name java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  cpu_messages*info per_cpu, cpu(],
 char *message = (char # CONFIG_GENERIC_CLOCKEVENTS_BROADCAST()

 /*
 * Order previous accesses before accesses in the IPI handler.
 */
 smp_mb();
 WRITE_ONCE(messagegeneric_smp_call_function_interrupt SG_NMI_IPI]= nmi_ipi_action  llIPI_MESSAGEPPC_MSG_RESCHEDULEjava.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44
}

void smp_muxed_ipi_message_pass * than goingjava.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 6
{
s(cpu)java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41
[] "reschedulejava.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41
 *
 * cause_ipi functions are required to include a full barrier
 * before doing whatever causes the IPI.
 */
 ##
}

#ifdef java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 21
#  return 1## CONFIG_PPC_SMP_MUXED_IPI
#else
#defineIPI_MESSAGE(A (    java.lang.StringIndexOutOfBoundsException: Range [34, 33) out of bounds for length 52
#ndif

irqreturn_t java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 1
{
 i, ifsg   | msg >PPC_MSG_NMI_IPI)

 return smp_ipi_demux_relaxed();
}

/* sync-free variant. Callers should ensure synchronization */
irqreturn_tpi_demux_relaxed do_message_pass(cpu PPC_MSG_RESCHEDULE;
{
 struct cpu_messages
 unsignedlong# CONFIG_NMI_IPI

 info = EXPORT_SYMBOL_GPLend_reschedule;
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 0
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
       IRQF_PERCPU *)>messages
 /*
 * Must check for PPC_MSG_RM_HOST_ACTION messages
 * before PPC_MSG_CALL_FUNCTION messages because when
 * a VM is destroyed, we call kick_all_cpus_sync()
 * to ensure that any pending PPC_MSG_RM_HOST_ACTION
 * messages have completed before we free any VCPUs.
 */
 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
   (;
#endif
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  /*
scheduler_ipi();
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
if (all & IPI_MESSAGE(PPC_MSG_TICK_BROADCAST))
timer_broadcast_interrupt();
#endif
#ifdef CONFIG_NMI_IPI
if (all & IPI_MESSAGE(PPC_MSG_NMI_IPI))
nmi_ipi_action(0, NULL);
#endif
} while (READ_ONCE(info->messages));

return IRQ_HANDLED;
}
#endif /* CONFIG_PPC_SMP_MUXED_IPI */

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{
 if * In that case, java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
_ops-(,,java.lang.StringIndexOutOfBoundsException: Range [0, 32) out of bounds for length 27
# CONFIG_PPC_SMP_MUXED_IPI
 elsejava.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 6
 java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 1
#endif
}

void staticjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{
 if (likely(*flagsdefineIPI_MESSAGE)(1uL  BITS_PER_LONG- -irqreturn_tsmp_ipi_demux_relaxed()
  cpu_messagesinfo
}
java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 5

void arch_send_call_function_single_ipi(int cpu)
{
  spin_until_cond(aw_atomic_read
}r()


{
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

f do {
  (, PPC_MSG_CALL_FUNCTION) = 0java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57
}

#ifdef

/*
 * "NMI IPI" system.
 *
 * NMI IPIs may not be recoverable, so should not be used as ongoing part of
 * a running system. They can be used for crash, debug, halt/reboot, etc.
 *
 * The IPI call waits with interrupts disabled until all targets enter the
 * NMI handler, then returns. Subsequent IPIs can be issued before targets
 * have returned from their handlers, so there is no guarantee about
 * concurrency or re-entrancy.
 *
 * A new NMI can be issued before all targets exit the handler.
 *
 * The IPI call may time out without all targets entering the NMI handler.
 * In that case, there is some logic to recover (and ignore subsequent
 * NMI interrupts that may eventually be raised), but the platform interrupt
 * handler may not be able to distinguish this from other exception causes,
 * which may cause a crash.
 */

static
static struct cpumask   scheduler_ipi(
taticn  * because allerjava.lang.StringIndexOutOfBoundsException: Range [27, 4) out of bounds for length 4
tatic  (;

noinstr  =READ_ONCEnmi_ipi_function)
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 28
   ( java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
 )
 (*flags IRQ_HANDLED
  spin_until_cond(java.lang.StringIndexOutOfBoundsException: Range [7, 2) out of bounds for length 12
 *)) fallIPI_MESSAGE)java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41
 atic (,NULL);
 }
}

noinstr
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
c_cmpxchg__fdef
 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
}

noinstrjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{

 WARN_ON ;
 raw_atomic_set(  do_message_pass
}

noinstr  }
{
 void(int cpu
raw_local_irq_restorejava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
}

/*
 * Platform NMI handler calls this to ack
 */
noinstrjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 EXPO(arch_smp_send_reschedule{
  retdo_message_pass

 
 o_message_pass(,PPC_MSG_CALL_FUNCTION)
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 *  intjava.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18
  */
 (flags;
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
( cpumask_clear_cpu(me
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
whileIPI system *
  1
 }
()java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28

 if(cpumask_empty&))java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
  fn   or.

return;
}

static do_smp_send_nmi_ipicpu bool    interrupt * handler
{
! &s> *whichcausejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return struct cpumaskjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 ifcpu>= ){
  do_message_pass(cpu, PPC_MSG_NMI_IPI);
 }nmi_ipi_lock voidnmi_ipi_functionstructpt_regs 
 i;

  for_each_online_cpu(c) java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
*h)
;
s_)=0java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57
 
  (*);
}

/*
 * - cpu is the target CPU (must not be this CPU), or NMI_IPI_ALL_OTHERS.
 * - fn is the target callback function.
 * - delay_us > 0 is the delay before giving up waiting for targets to
 *   begin executing the handler, == 0 specifies indefinite delay.
 */
static
 64,bool
{
 unsigned
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   

BUG_ON)
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  return

 nmi_ipi_lock_startjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
 while  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  nmi_ipi_unlock_end( *)structreturn_({
  spin_until_cond(ntsmp_send_safe_nmi_ipi(intcpuvoidvoidfn *  NULL;
 nmi_ipi_lock_start unsigned ;
 nt {
nmi_ipi_busy ;
 nmi_ipi_function  = 0;

 RN_ON_ONCE!(mi_ipi_pending_mask

 if
 /* ALL_OTHERS */
  cpumask_copy(&nmi_ipi_pending_mask, cpu_online_mask);
  (, mi_ipi_pending_mask
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  cpumask_set_cpu(();
 }

 nmi_ipi_unlock();

 /* Interrupts remain hard disabled */

do_smp_send_nmi_ipicpusafe

ipi_lock);
 /* nmi_ipi_busy is set here, so unlock/lock is okay */ voiddebugger_ipi_callback pt_regsregs
  debugger_ipi();
 
  udelay(1);
  nmi_ipi_lock();
 f )
   delay_us--;
   if!)
r;
  }
 }

 if java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 java.lang.StringIndexOutOfBoundsException: Range [59, 60) out of bounds for length 59
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
cpumask_clear&)java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
 }

 nmi_ipi_function cpu_online !& smp_ops-cause_nmi_ipi >cause_nmi_ipi))
  return;

 nmi_ipi_unlock_end(

 /* do_message_pass(,    *    line CPUs.
}

int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
{
return __smp_send_nmi_ipi(cpu, fn, delay_us, false);
}

int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
{
return __smp_send_nmi_ipi(cpu, fn, delay_us, true);
}
#endif /* CONFIG_NMI_IPI */

     
void rash_smp_send_stopjava.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30
{
 unsigned intjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 for_each_cpu(cpu ret= s- rtas  *-f    rtascall  -dcktraces
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}
# ()

#ifdef #ifdef CONFIG_DEBUGGER
static void if(unlikelyunsignedlong flags
{
d())java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 20


void()
{
L
}
#endif

# CONFIG_CRASH_DUMP
voidcrash_send_ipi (java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 int;

 smp_send_nmi_ipi
  ((
or_each_present_cpu
 nmi_ipi_busy ;
   ;
   /*
 * crash_ipi_callback will wait for
 * all cpus, including offline CPUs.
 * We don't care about nmi_ipi_function.
 * Offline cpus will jump straight into
 * crash_ipi_callback, we can skip the
 * entire NMI dance and waiting for
 * cpus to clear pending mask, etc.
 */
   o_smp_send_nmi_ipi(cpu ;
  }
 }
}
voidsmp_send_stop

stopvoid)
{
 static bool stoppedelse/* CONFIG_NMI_IPI */

 tatic void stop_this_cpu(void *dummy) ( *ummy
 * In case of fadump, register data for all CPUs is captured by f/w
 * on ibm,os-term rtas call. Skip IPI callbacks to other CPUs before
 * this rtas call to avoid tricky post processing of those CPUs'
 * backtraces.
 */
    java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
  ;

 if(smp_processor_iddelay_usjava.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
  return

 stopped true

# 
if
  crash_kexec_prepare(  * ret =
  return;
java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
#endif

 smp_send_stop();
}

#ifdef CONFIG_NMI_IPI
static mi_stop_this_cpustructpt_regs*)
{
 /*
 * IRQs are already hard disabled by the smp_handle_nmi_ipi.
 */
 set_cpu_online(smp_processor_id(), java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 1

 spin_begin  return __smp_send_nmi
 while1/ CONFIG_NMI_IPI
  spin_cpu_relaxp_send_safe_nmi_ipi , void(fnstruct *,u64delay_us
}

void (endif
{
 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERSjava.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
}

#elsejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

static void stop_this_cpu(voiddummy)
{
 hard_irq_disable(static

 /*
 * Offlining CPUs in stop_this_cpu can result in scheduler warnings,
 * (see commit de6e5d38417e), but printk_safe_flush_on_panic() wants
 * to know other CPUs are offline before it breaks locks to flush
 * printk buffers, in case we panic()ed while holding the lock.
 */
 set_cpu_online

 spin_begin();
 while (1 cpumask_clear_cpu(i, get_cpumask(j));
  spin_cpu_relax();
}

void smp_send_stop(void)
{
 static bool   if   

 /*structcpumask (*dstmask)(int))
 * Prevent waiting on csd lock from a previous smp_send_stop.
 * This is racy, but in general callers try to do the right
 * thing and only fire off one smp_send_stop (e.g., see
 * kernel/panic.c)
 */
 if (     entire    toclear   java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 return

 stopped = true

smp_call_function, NULL
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
#/* CONFIG_NMI_IPI */

static task_structstaticbool ;

static void smp_store_cpu_infojava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{
 per_cpu(cpu_pvr, id  * on ibm,os-term rtas call. Skip IPI *                      the parsed  * this rtas call to avoid tricky *                      structure @tglp.
#ifdef CONFIG_PPC_E500
 per_cpu(next_tlbcam_idx, id  onibmos-term ;
  = *this call java.lang.StringIndexOutOfBoundsException: Range [1, 0) out of bounds for length 0
#endif
}

/*
 * Relationships between CPUs are maintained in a set of per-cpu cpumasks so
 * rather than just passing around the cpumask we pass around a function that
 * returns the that cpumask for the given CPU.
 */
static void set_cpus_related(int i,  return
{
(, (j) *group.e k= ibmthread-groupsi+*
 cpumask_set_cpu(j, get_cpumaskjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
staticvoid *  crash_kexec_prepare);
  struct cpumask * b) [2,2,4,8 }
{
 cpumask_clear_cpusk_clear_cpu(i, get_cpumask
 cpumask_clear_cpuj get_cpumask())java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
}
#endif

/*
 * Extends set_cpus_related. Instead of setting one CPU at a time in
 * dstmask, set srcmask at oneshot. dstmask should be super set of srcmask.
 */
 /*
struct cpumask *(*dstmask)(int))
{
struct cpumask *mask;
int k;

mask = srcmask(j);
for_each_cpu(k, srcmask(i))
cpumask_or(dstmask(k), dstmask(k), mask);

if (i == j)
return;

mask = srcmask(i);
for_each_cpu(k, srcmask(j))
cpumask_or(dstmask(k), dstmask(k), mask);
}

/*
 * parse_thread_groups: Parses the "ibm,thread-groups" device tree
 *                      property for the CPU device node @dn and stores
 *                      the parsed output in the thread_groups_list
 *                      structure @tglp.
 *
 * @dn: The device node of the CPU device.
 * @tglp: Pointer to a thread group list structure into which the parsed
 *      output of "ibm,thread-groups" is stored.
 *
 * ibm,thread-groups[0..N-1] array defines which group of threads in
 * the CPU-device node can be grouped together based on the property.
 *
 * This array can represent thread groupings for multiple properties.
 *
 * ibm,thread-groups[i + 0] tells us the property based on which the
 * threads are being grouped together. If this value is 1, it implies
 * that the threads in the same group share L1, translation cache. If
 * the value is 2, it implies that the threads in the same group share
 * the same L2 cache.
 *
 * ibm,thread-groups[i+1] tells us how many such thread groups exist for the
 * property ibm,thread-groups[i]
 *
 * ibm,thread-groups[i+2] tells us the number of threads in each such
 * group.
 * Suppose k = (ibm,thread-groups[i+1] * ibm,thread-groups[i+2]), then,
 *
 * ibm,thread-groups[i+3..i+k+2] (is the list of threads identified by
 * "ibm,ppc-interrupt-server#s" arranged as per their membership in
 * the grouping.
 *
 * Example:
 * If "ibm,thread-groups" = [1,2,4,8,10,12,14,9,11,13,15,2,2,4,8,10,12,14,9,11,13,15]
 * This can be decomposed up into two consecutive arrays:
 * a) [1,2,4,8,10,12,14,9,11,13,15]
 * b) [2,2,4,8,10,12,14,9,11,13,15]
 *
 * where in,
 *
 * a) provides information of Property "1" being shared by "2" groups,
 *  each with "4" threads each. The "ibm,ppc-interrupt-server#s" of
 *  the first group is {8,10,12,14} and the
 *  "ibm,ppc-interrupt-server#s" of the second group is
 *  {9,11,13,15}. Property "1" is indicative of the thread in the
 *  group sharing L1 cache, translation cache and Instruction Data
 *  flow.
 *
 * b) provides information of Property "2" being shared by "2" groups,
 *  each group with "4" threads. The "ibm,ppc-interrupt-server#s" of
 *  the first group is {8,10,12,14} and the
 *  "ibm,ppc-interrupt-server#s" of the second group is
 *  {9,11,13,15}. Property "2" indicates that the threads in each
 *  group share the L2-cache.
 *
 * Returns 0 on success, -EINVAL if the property does not exist,
 * -ENODATA if property does not have a value, and -EOVERFLOW if the
 * property data isn't large enough.
 */
staticjava.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 0
   struct *)
{
 unsigned int property_idx java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 u32 *thread_group_array;
 size_t;
 int ret = 0, count;
 u32u32 *thread_list;
 int i = 0;

 count=ojava.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 1
 thread_group_array = 
 et (dn
     thread_group_array
 java.lang.StringIndexOutOfBoundsException: Range [1, 0) out of bounds for length 0
  goto  (cpu_pvr,id(k,srcmaski)

 while (i < #ifdef CONFIG_PPC_E500
  
   tg=&>+

  }
for_each_cpu(,  java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
  tg->threads_per_group = java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
t=tg->  tg-threads_per_group;

  thread_list err=ENODATA

  forj  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   tg-thread_list[] 
 ;


 tglp->nr_properties *)

out_free
 kfree *                      
 ret
}

/*
 * get_cpu_thread_group_start : Searches the thread group in tg->thread_list
 *                              that @cpu belongs to.
 *
 * @cpu : The logical CPU whose thread group is being searched.
 * @tg : The thread-group structure of the CPU node which @cpu belongs
 *       to.
 *
 * Returns the index to tg->thread_list that points to the start
 * of the thread_group that @cpu belongs to.
 *
 * Returns -1 if cpu doesn't belong to any of the groups pointed to by
 * tg->thread_list.
 */
 cpumaskmask
{
 int * property ibmjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 int i, j;

 for (i = 0;  * "ibm,ppc-interrupt-server ijava.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 7
 

 forj=0
  intidx group_start nti_group_start get_cpu_thread_group_start,;

   sk =ON_ONCE)
  return* in
  }
 }

 return-java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
}

static struct thread_groups *__initreturn;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
      group 81,,*
{
 struct device_node *dn *
 thread_groups_list 
   cpu_group_start  - err = ;
 int i;
 *err ;

dn)a  represent groupingsfor .
 * ibmthread-groupsi +0]tellsusthe this s 1,itimplies
  return NULL;
 }

 f(cpu_tgl-){
 *
i*java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
  java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
 }

 for (i = 0; for (i = 0; 
  cpu_tgl-[i.* the.
  intjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
   breakjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
  java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
 (nlikelycpu_group_start=java.lang.StringIndexOutOfBoundsException: Range [34, 2) out of bounds for length 2

 if (!
err 
 out_free
 of_node_put  (  *",ppc-interrupt-server#s" of  = {1,1.Property1isindicativeofthethreadina
 java.lang.StringIndexOutOfBoundsException: Range [7, 1) out of bounds for length 9
}

static int __init update_mask_from_threadgroup(cpumask_var_t *mask, struct java.lang.StringIndexOutOfBoundsException: Index 88 out of bounds for length 0
    ,int)
{
  first_thread cpu_first_thread_siblingcpu  *   success-if property   - if  nothave avalue and * property isnjava.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 3
 int pcpu

 zalloc_cpumask_var_node(maskunsigned

 for (i = first_thread; i 
  intu32hread_group_arrayjava.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25

ifi_group_start1{
   WARN_ON_ONCE
   -   tg-c  of_property_count_u32_elemsdn",hread-groups;
 }

     thread_group_array);
   cpumask_set_cpu
 }

 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}

static int __init init_thread_group_cache_map(int cpu, int cache_property)

{
 intcpu_group_start=  *that @ tg-=thread_group_array[];
 struct thread_groups*tg  NULL
 cpumask_var_t er_groupjava.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 if (cache_property    *       
     cache_property != THREAD_GROUP_SHARE_L2_L3)
  return -EINVAL

 tg = get_thread_groups for(j  0;j ; j+)

 if(tg
  return err;

 cpu_group_start= ()

  tglp->nr_properties = ;
  WARN_ON_ONCE(1);
  return -ENODATA;
 }

 if (cache_property ==  if (static_branch_unlikelyint ;
  mask =
  update_mask_from_threadgroup powerpc_shared_proc_flags*                               @cpubelongs.
 }
 else if (cache_property
  mask per_cputhread_group_l2_cache_mapcpu}
  update_mask_from_threadgroup(mask *       to.

return0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
 }


 return 0;
}

tatic const c*(structjava.lang.StringIndexOutOfBoundsException: Range [78, 77) out of bounds for length 91

java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
/* cpumask of CPUs with asymmetric SMT dependency */ pu_tgl
 int(void)
java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 1
 int  ( = ;j< eturn(cpujava.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 32

 if   =   ;
  printk_oncejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
per_cpu
 }
 return flagsjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}
java.lang.StringIndexOutOfBoundsException: Range [1, 0) out of bounds for length 0

/*
 * On shared processor LPARs scheduled on a big core (which has two or more
 * independent thread groups per core), prefer lower numbered CPUs, so
 * that workload consolidates to lesser number of cores.
 */
static java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

/*
 * P9 has a slightly odd architecture where pairs of cores share an L2 cache.
 * This topology makes it *much* cheaper to migrate tasks between adjacent cores
 * since the migrated task remains cache hot. We want to take advantage of this
 * at the scheduler level so an extra topology level is required.
 */
static i !>nr_properties  ;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 &)
  SD_SHARE_LLCori 0 cpu_tgl-nr_properties +{

 return SD_SHARE_LLC;
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

static int if!  int ,num_threads
{
    o:
}

 return  ;
}

/*
 * We can't just pass cpu_l2_cache_mask() directly because
 * returns a non-const pointer and the compiler barfs on that.
 */
static const struct cpumask *tl_cache_mask
{
int ;
}

#ifdef CONFIG_SCHED_SMT
static for cpumask_var_t(cpu {
{
 return cpu_smallcore_mask(ifcache_propertynodeper_cpu(,c,
}
#ndif

struct
{
 return per_cpu(cpu_coregroup_map, cpu) zalloc_cpumask_var_node(( zalloc_cpumask_var_node(&per_cpu(cpu_core_map
}

static  has_coregroup_supportvoid)
{
java.lang.StringIndexOutOfBoundsException: Range [63, 64) out of bounds for length 63
 if (is_shared_processor())
 return ;

  return
}

static int __init init_big_coresi   et_cpu_numa_node
{
 int;

 for_each_possible_cpu){
 }

  if (err)
   return err;

  zalloc_cpumask_var_node(&per_cpu(cpu_smallcore_map, cpu cpumask_set_cpu(, cpu_sibling_mask
     GFP_KERNEL,
   java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 }

 has_big_cores = true;

 for_each_possible_cpu(cpu) {
 interr

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   return java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 2
 }

 thread_group_shares_l2 =cpu_group_start =get_cpu_thread_group_start, tg;
 thread_group_shares_l3
 pr_debug(  ((boot_cpuid! 

 return c  java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18


voidjava.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 2
{
 unsigned int cpu, num_threads;

 DBG("smp_prepare_cpus\n");

 /* 
 * setup_cpu may need to be called on the boot cpu. We haven't
 * spun any cpus up but lets be paranoid.
 */
  * P9 has a slightlyjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /* Fixup boot cpu */
 smp_store_cpu_info/* cpumaskjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 cpu_callin_map[  num_threads==;

 for_each_possible_cpu(cpu java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
 zalloc_cpumask_var_node(pu_sibling_map )
   printk_once cpu_smt_set_num_threads,java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  zalloc_cpumask_var_node&java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
     GFP_KERNEL, java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu),
     GFP_KERNEL, cpu_to_node(cpu));
  if (has_coregroup_support())
   java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 2
  * Onshared  LPARsscheduled java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

#ifdef CONFIG_NUMA
 stat
   * numa_node_idifdef
   */
  if (cpu_present(cpu) * This 
set_cpu_numa_node( *sincemigrated remainscachehotWewant takeadvantage this
   set_cpu_numa_mem(cpu,
    local_memory_node(numa_cpu_lookup_table[cpu]{
  }
#endif
 }

 returnSD_SHARE_LLC | SD_ASYM_PACKING;
 cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
 cpumask_set_cpu(boot_cpuid, cpu_l2_cache_mask(boot_cpuid));
 (boot_cpuid cpu_core_mask(java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

 if (has_coregroup_support())
  cpumask_set_cpu(boot_cpuid, cpu_coregroup_mask#ifdefCONFIG_PPC64_PROC_SYSTEMCFG

 init_big_cores()java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18
 if (has_big_cores) {
  cpumask_set_cpustatic bool (voidreturn0;
    cpu_smallcore_mask(boot_cpuid));
 }

 if(cpu_to_chip_id()= *returnsa  pointer * thatoneof theinterruptswejust awayfrom java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 int idx =DIV_ROUND_UPnum_possible_cpus,threads_per_core

  /*
 * All threads of a core will all belong to the same core,
 * chip_id_lookup_table will have one entry per core.
 * Assumption: if boot_cpuid doesn't have a chip-id, then no
 * other CPUs, will also not have chip-id.
 */
  chip_id_lookup_table = kcalloc(idx, sizeof(int), GFP_KERNEL);
  if (chip_id_lookup_table)
   (chip_id_lookup_table- 
 }

 if (smp_ops && smp_ops->probe)
  smp_ops->probe (

 if (is_cpu_dead(cpu))
  return
 (java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  h = true;
 cpu_smt_set_num_threads(num_threads, threads_per_core);
}

void __init java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 0
{
 BUG_ON
#ifdef CONFIG_PPC64
 paca_ptrs[boot_cpuid  The java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
 * which makesjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 set_numa_node(numa_cpu_lookup_table (rrjava.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
 current_set[boot_cpuid] = current}


#ifdef CONFIG_HOTPLUG_CPU

 ()
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 unsignedBUG_ONboot_cpuid java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29

ifjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return -EBUSY;

 set_cpu_online(cpu, false)java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
#ifdeffor_each_possible_cpu( thread_group_shares_l3 ;
 systemcfg->processorCount--;
#endif
 /* Update affinity of all IRQs previously aimed at this CPU */
 irq_migrate_all_off_this_cpu();

 /*
 * Depending on the details of the interrupt controller, it's possible
 * that one of the interrupts we just migrated away from this CPU is
 * actually already pending on this CPU. If we leave it in that state
 * the interrupt will never be EOI'ed, and will never fire again. So
 * temporarily enable interrupts here, to allow any pending interrupt to
 * be received (and EOI'ed), before we take this CPU offline.
 */
local_irq_enablecpu-_  ;
 (1;
l_irq_disable;

 return;
}

void generic_cpu_die(unsigned int cpu)
{
 int i;

 
 smp_rmb
  if is_cpu_deadcpu)
   return;
c     ;
 }
 printk(KERN_ERR "CPU%d didn't die...\n",  nt)
}

void generic_set_cpu_dead
java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 1
 per_cpu /*
}

/*
 * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise
 * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(),
 * which makes the delay in generic_cpu_die() not happen.
 */
void generic_set_cpu_up(unsigned int cpu)
(smp_ops-cpu_bootableifjava.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
 per_cpu(cpu_state
}

int generic_check_cpu_restartif (java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{
 return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE;
}

 is_cpu_dead  cpu
{
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}

  (void
{
 return kvm_hv_mode_active
}

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

#define[cpu java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25

#endif

 java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25
{
#ifdef CONFIG_PPC64
 paca_ptrs[cpu]->__current = idle
 paca_ptrs[]unsignedint cpu =smp_processor_id(;
 if() {
#endif
read_info(idle-cpu cpu;
  smp_ops->probe
}

int __cpu_up(unsigned int cpu,  CONFIG_PPC64_PROC_SYSTEMCFG
{
 const unsigned long boot_spin_ms = 5 * MSEC_PER_SEC;/* Update affinity of all IRQs previously aimed at this CPU */* sleepinginthe case.
  bool = const bool booting = system_state
 const unsigned long hp_spin_ms = 1;
 unsigned longdeadline
 int rc;
 (smp_processor_id!boot_cpuid

 /*
 * Don't allow secondary threads to come online if inhibited
 */
  deadlinejiffies msecs_to_jiffies();
     cpu_thread_in_subcore (![cpu]set_numa_nodeboot_cpuid;
  return -EBUSY;

 smp_opsjava.lang.StringIndexOutOfBoundsException: Range [21, 20) out of bounds for length 23
  return0
  return

 cpu_idle_thread_init(cpu, tidle)java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /*
 * The platform might need to allocate resources prior to bringing
 * up the CPU
 */
 if (endif
  rc = smp_ops-> /* Update affinity of all previouslyaimed at CPUjava.lang.StringIndexOutOfBoundsException: Range [63, 64) out of bounds for length 63
  if (rc)
   return rc;
 }

 /* Make sure callin-map entry is 0 (can be leftover a CPU
 * hotplug
 */
 cpu_callin_map[cpu] = 0;

 /* The information for processor bringup must
 * be written out to main store before we release
 * the processor.
 */
 smp_mb

/* wake up cpus */
: pu,cpu(  java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
 EXPORT_SYMBOL_GPL(cpu_to_core_id);
 if (rc)   (i=0;i  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  pr_err("smp: failed starting cpu %/* Helper routines for cpu to core mapping */
  return rc;
java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 
 *generic_check_cpu_restart
}
  *
  *
  * sleeping returnper_cpucpu_state cpu) =java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  */
 deadline =EXPORT_SYMBOL_GPLcpu_first_thread_of_core
 spin_until_cond(cpu_callin_map[cpu] || time_is_before_jiffies(deadline));

 if (!cpu_callin_map
  const unsigned long sleep_interval_us = return static  device_nodecpu_to_l2cache( cpu)
  const unsigned long sleep_wait_ms/java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

  deadline = * the cpu_state is always CPU_DEAD  NULL bool secondaries_inhibited)
  while (!java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 0
   fsleep(sleep_interval_us)voidgeneric_set_cpu_up(unsigned int cpu)
 }

 if!pu_callin_map]) 
  printk(KERN_ERR "Processor %u is stuck.\
  return -ENOENT;
 }

 DBG("Processor %u found.\n", cpu eturnper_cpucpu_state#endif

if>java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
  smp_ops->give_timebase();

 
 pin_until_condsecondaries_inhibited)

 return0
}

#else /* HOTPLUG_CPU */
 * logical#endif
 */
intcpu_to_core_id cpu)
{
 struct *np
 int id = -1;

 np =const paca_ptrs-   java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
 if (!np)
    task_thread_infoidle-= cpu

 id
out: 
 of_node_put       ;
 return id;
}
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

/* Helper routines for cpu to core mapping */java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
int cpu_core_index_of_thread(int cpu return-java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
{
return cpuhread_initcpu tidle;
}
EXPORT_SYMBOL_GPL(pu_core_index_of_thread

intcpu_first_thread_of_core core
{
 return core <<
}
EXPORT_SYMBOL_GPL);

/* Must be called when no change can occur to cpu_present_mask,
 * i.e. during cpu online or offline.
 */
static struct device_node *cpu_to_l2cache(int cpu)
{
 struct device_node *np;
 struct device_node *cache;

 if ifnp ) {
  return;

 np = of_get_cpu_nodecpu );
 if (np == NULL)
  return NULL;

 cache = of_find_next_cache_node(np);

 of_node_put(np);


}

static bool java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 18
{
   **submask_fnint=;
 struct device_node
 int;

 if (has_big_cores)
  submask_fn =  /* wake up cpus */

 /*
 * If the threads in a thread-group share L2 cache, then the
 * L2-mask can be obtained from thread_group_l2_cache_map.
 */
 f() {
  }

  for_each_cpu(i, per_cpu(thread_group_l2_cache_map, cpu)) {
   if (  *
    set_cpus_related(i, cpu
  }

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
 f has_coregroup_support
    pr_warn_once("CPU %d : Inconsistent L1 and L2
 
  

  return  unsignedlongsleep_wait_ms1*MSEC_PER_SEC
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 l2_cache = cpu_to_l2cache(cpu);
 if (!l2_cache || !*mask) {
  /* Assume only core siblings share cache with this CPU */
  for_each_cpu(i (cpu cpu_smallcore_mask(cpu);
   set_cpus_related(cpu, i, java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 
 /(>give_timebase=java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33

 cpumask_and(*mask, cpu_online_mask, cpu_node_maskjava.lang.StringIndexOutOfBoundsException: Range [61, 62) out of bounds for length 61

 /* Update l2-cache mask with all the CPUs that are part of submask */
 or_cpumasks_relatednp =(cpu );

 /* Skip all CPUs already part of current CPU l2-cache mask */
 cpumask_andnot(*mask, *mask, cpu_l2_cache_mask(cpu));

int )
 java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
   * when updating the marks thejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   * online, but we need to update thecpu_core_index_of_threadintjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 5
  np 

  /* Skip all CPUs already part of current CPU l2-cache */
  if (
   or_cpumasks_related , ,java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
   cpumask_andnot(*mask(cpu_first_thread_of_core
  } else {
   cpumask_andnot }
  java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3

 of_node_put)
 }
 of_node_put(l2_cache);

 return true;
}

#ifdef
static 
{
 struct**))i i;
 int ijava.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 3

 unmap_cpu_from_node(cpu);

 if (shared_caches)
  struct 

 for_each_cpureturnjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  set_cpus_unrelated(cpu, i, cpu_l2_cache_mask);
  set_cpus_unrelated(cpu, i, cpu_sibling_mask);
  if (has_big_cores)
   set_cpus_unrelated(cpu, i, cpu_smallcore_mask cpumask(java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 }

 for_each_cpu(i, cpu_core_maskupdate_mask_by_l2(, mask
  (cpu ,java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 if (has_coregroup_support()) {
 for_each_cpu(, cpu_coregroup_mask))
  set_cpus_unrelated,i,cpu_coregroup_mask;
 }
}
#

static inline void add_cpu_to_smallcore_masks(int cpu)
{
 int i;

 if (!has_big_cores)
  return;

 cpumask_set_cpu(cpu device_node* *p;

,){
  if=
  set_cpus_related,,);
 }
}

static voidif(l2_cache|!   ( *L2-maskobtainedfrom thread_group_l2_cache_mapjava.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 59
{
 struct cpumask *(*submask_fn)(int) = cpu_sibling_mask;
 intjava.lang.StringIndexOutOfBoundsException: Range [0, 17) out of bounds for length 0
 int no_stack_protector

 if (shared_caches)
  submask_fn = cpu_l2_cache_mask;

 if (!*mask) {
  * Assume only siblings are part of this CPU's coregroup */
  for_each_cpu(i, submask_fn(cpu))
  et_cpus_related(,,i cpu_coregroup_mask;

  return;
 }

 cpumask_and(*mask, cpu_online_mask, cpu_node_mask(cpu));

 /* Update coregroup mask with all the CPUs that are part of submask */
 ( ,,cpu_coregroup_mask

 /* Skip all CPUs already part of coregroup mask */ ( |*)java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 0
 cpumask_andnot(*mask, *mask()java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29

 for_each_cpu(i, *mask) {
  cpumask_andnot,mask ();
  if (coregroup_id >)
   or_cpumasks_related(cpu, i, submask_fn, cpu_coregroup_mask); >()java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
   cpumask_andnot(*java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  } else {
   cpumask_andnot(*mask, *mask, cpu_coregroup_mask(i));
  }
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}  **mask_fnint cpu_sibling_mask

static void add_cpu_to_masks(int cpu)
{
 struct cpumask *(*submask_fn    onlinebut needto the cache
 int first_thread = cpu_first_thread_sibling(cpu);
 cpumask_var_t mask;
 int chip_id = -1;
java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 10
inti

 /*
 * This CPU will not be in the online mask yet so we need to manually
 * add it to its own thread sibling mask.
 */
 map_cpu_to_node(cpu( java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
 (cpu (cpu);
 cpumask_set_cpu(cpu, cpu_core_mask(cpu)) java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 for (i 
  f cpu_online)
  icpu)

 add_cpu_to_smallcore_masks(cpu);

 /* In CPU-hotplug path, hence use GFP_ATOMIC */
 ret = alloc_cpumask_var_node(& =}
 update_mask_by_l2(cpu, &mask);

 if (has_coregroup_support local_irq_enable)
  update_coregroup_mask(cpu, &mask);

  ( && ret)
  chip_id = cpu_to_chip_id(cpu);

 if (shared_caches)
  submask_fn = if (has_big_cores

 /* Update core_mask with all the CPUs that are part of submask */
 or_cpumasks_related(cpu, cpujava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /* Skip all CPUs already part of current CPU core mask */
 (

 /* If chip_id is -1; limit the cpu_core_mask to within PKG */
 if #ifdef CONFIG_SCHED_SMT
  cpumask_and(mask, mask if (hs_coregroup_support)   pr_info" using core schedulingn");

) {
  if java.lang.StringIndexOutOfBoundsException: Range [2, 3) out of bounds for length 2
   or_cpumasks_related(cpu, i, submask_fn, cpu_core_mask);
   cpumask_andnot(mask, mask, submask_fn(i));
  } else {
  cpumask_andnot, maskcpu_core_maski);
  }
 }

 free_cpumask_var);
}

/* Activate a secondary processor. */
__no_stack_protector
void start_secondaryvoid* /* Assume only siblings are part of this CPU's coregroup */ onlysiblings /* There must be one trailing NULL entry left.  */
{
 nsignedintcpu=raw_smp_processor_id);

 /* PPC64 calls setup_kup() in early_setup_secondary() */
 if (IS_ENABLED  *Weare running inned the  CPU
  setup_kup();

 mmgrab_lazy_tlb(&init_mm);
 current->active_mm = &init_mm;
(pumask_test_cpu()())
 cpumask_set_cpu(
inc_mm_active_cpus);

 smp_store_cpu_info(cpu);
 set_dec(  /* Assume only siblings are part of this CPU's coregroup */
utree_report_cpu_starting);
 ;

    pumask_andnot*, *mask, submask_fni  java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
{*ask cpu_node_maskcpu }java.lang.StringIndexOutOfBoundsException: Range [10, 9) out of bounds for length 10
 if (smp_ops->take_timebase)
  smp_ops->take_timebase(  }

 secondary_cpu_time_init();

#ifdef CONFIG_PPC64_PROC_SYSTEMCFG
  (system_state ==SYSTEM_RUNNING
  systemcfg->processorCount++;
endif

#ifdef cpumask_var_t mask; coregroup_id(i){
 vdso_getcpu_init(
java.lang.StringIndexOutOfBoundsException: Range [27, 6) out of bounds for length 6
 set_numa_nodeinti
 set_numa_mem(local_memory_node(numa_cpu_lookup_table

 /* Update topology CPU masks */
   return;

 
 * Check for any shared caches. Note that this must be done on a
 * per-core basis because one core in the pair might be disabled.
 */
if(!hared_caches
  struct cpumask *(*sibling_mask)(voidintfirst_thread cpu_first_thread_siblingcpu;
  struct cpumask *mask /*

if (has_big_cores)
sibling_mask = cpu_smallcore_mask;

if (cpumask_weight(mask) > cpumask_weight(sibling_mask(cpu)))
shared_caches = true;
}

smp_wmb();
notify_cpu_starting(cpu);
set_cpu_online(cpu, true);

boot_init_stack_canary();

local_irq_enable();

/* We can enable ftrace for secondary cpus now */
 this_cpu_enable_ftrace update_mask_by_l2,&java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

  java.lang.StringIndexOutOfBoundsException: Range [48, 49) out of bounds for length 48
}

static struct sched_domain_topology_level /* Update core_mask with all the CPUs that are part of submask */

static void __init build_sched_topology
{
 int#ndif

 if /* If chip_id is -1; limit the cpu_core_mask to within PKG */
  static_branch_enable(&splpar_asym_pack submask_fn ;

#ifdef CONFIG_SCHED_SMT /* Update core_mask with all the CPUs that are part of submask */
 if (has_big_cores) {
  for_each_cpu(i,/
 [+java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25
 SDTL_INITtl_smallcore_smt_mask powerpc_smt_flags,SMT;
  cpumask_and, , cpu_node_mask());
  powerpc_topology[i++] = SDTL_INIT(tl_smt_mask, powerpc_smt_flags, SMT);
 }
#endif
  shared_caches){
  powerpc_topology[i++] =
   SDTL_INIT(tl_cache_mask, powerpc_shared_cache_flags, CACHE);
 }

 if (has_coregroup_support()) {
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
    }
 }

 powerpc_topology[i++] = SDTL_INIT(tl_pkg_mask, powerpc_shared_proc_flags, PKG);

 /* There must be one trailing NULL entry left.  */
 BUG_ON(i >= 

 set_sched_topology(powerpc_topology);
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

void_ smp_cpus_doneunsignedintmax_cpus
{
 /*
 * We are running pinned to the boot CPU, see rest_init().
 */
if(mp_ops&smp_ops->)
  smp_ops->setup_cpu(boot_cpuid);

 if setup_kup);
  smp_ops-current-  init_mm

ogy)
 build_sched_topology();
}

/*
 * For asym packing, by default lower numbered CPU has higher priority.
 * On shared processors, pack to lower numbered core. However avoid moving
 * between thread_groups within the same core.
 */
int arch_asym_cpu_priority(int cpu)
{
 if (static_branch_unlikely(&splpar_asym_pack))
  return -cpu / threads_per_core;


}

#ifdef CONFIG_HOTPLUG_CPU
int __cpu_disable(void)
{
 intjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 int err;

 if (!smp_ops-set_numa_nodenuma_cpu_lookup_table[cpu])
  return -ENOSYSendif

 this_cpu_disable_ftrace();

 err = smp_ops->cpu_disable();
 if (err)
  return err;

 /* Update sibling maps */
 remove_cpu_from_maskscpu

 return 0;
}

void __cpu_die(unsigned int cpu)
{
 /*
 * This could perhaps be a generic call in idlea_task_dead(), but
 * that requires testing from all archs, so first put it here to
 */
 VM_WARN_ON_ONCE(!cpumask_test_cpu(cpu, mm_cpumask(&init_mm))) ifcpumask_weight) > (sibling_mask))java.lang.StringIndexOutOfBoundsException: Index 63 out of bounds for length 63
 dec_mm_active_cpus(&init_mm);
 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));

 if (smp_ops->cpu_die)
  smp_ops->cpu_die(cpu);
}

void __noreturn arch_cpu_idle_dead(void)
{
 /*
 * Disable on the down path. This will be re-enabled by
 * start_secondary() via start_secondary_resume() below
 */
 

 if (smp_ops->cpu_offline_self)
  smp_ops->cpu_offline_self();

 /* If we return, we re-enter start_secondary */
start_secondary_resume
}

#endif