/* * Copyright (c) 2016, Alliance for Open Media. All rights reserved. * * This source code is subject to the terms of the BSD 2 Clause License and * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License * was not distributed with this source code in the LICENSE file, you can * obtain it at www.aomedia.org/license/software. If the Alliance for Open * Media Patent License 1.0 was not distributed with this source code in the * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
*/
/* Implementation dependent return value. Result must be finalised with v64_sad_u8_sum().
The result for more than 32 v64_sad_u8() calls is undefined. */
SIMD_INLINE sad64_internal v64_sad_u8(sad64_internal s, v64 a, v64 b) { return _mm_add_epi64(s, _mm_sad_epu8(a, b));
}
SIMD_INLINE v64 v64_min_s16(v64 a, v64 b) { return _mm_min_epi16(a, b); }
SIMD_INLINE v64 v64_max_s16(v64 a, v64 b) { return _mm_max_epi16(a, b); }
SIMD_INLINE v64 v64_cmpgt_s8(v64 a, v64 b) { return _mm_cmpgt_epi8(a, b); }
SIMD_INLINE v64 v64_cmplt_s8(v64 a, v64 b) { return _mm_cmplt_epi8(a, b); }
SIMD_INLINE v64 v64_cmpeq_8(v64 a, v64 b) { return _mm_cmpeq_epi8(a, b); }
SIMD_INLINE v64 v64_cmpgt_s16(v64 a, v64 b) { return _mm_cmpgt_epi16(a, b); }
SIMD_INLINE v64 v64_cmplt_s16(v64 a, v64 b) { return _mm_cmplt_epi16(a, b); }
SIMD_INLINE v64 v64_cmpeq_16(v64 a, v64 b) { return _mm_cmpeq_epi16(a, b); }
SIMD_INLINE v64 v64_shl_8(v64 a, unsignedint c) { return _mm_and_si128(_mm_set1_epi8((char)(0xff << c)),
_mm_sll_epi16(a, _mm_cvtsi32_si128((int)c)));
}
SIMD_INLINE v64 v64_shr_u8(v64 a, unsignedint c) { return _mm_and_si128(_mm_set1_epi8((char)(0xff >> c)),
_mm_srl_epi16(a, _mm_cvtsi32_si128((int)c)));
}
SIMD_INLINE v64 v64_shr_s8(v64 a, unsignedint c) { return _mm_packs_epi16(
_mm_sra_epi16(_mm_unpacklo_epi8(a, a), _mm_cvtsi32_si128((int)(c + 8))),
a);
}
SIMD_INLINE v64 v64_shl_16(v64 a, unsignedint c) { return _mm_sll_epi16(a, _mm_cvtsi32_si128((int)c));
}
SIMD_INLINE v64 v64_shr_u16(v64 a, unsignedint c) { return _mm_srl_epi16(a, _mm_cvtsi32_si128((int)c));
}
SIMD_INLINE v64 v64_shr_s16(v64 a, unsignedint c) { return _mm_sra_epi16(a, _mm_cvtsi32_si128((int)c));
}
SIMD_INLINE v64 v64_shl_32(v64 a, unsignedint c) { return _mm_sll_epi32(a, _mm_cvtsi32_si128((int)c));
}
SIMD_INLINE v64 v64_shr_u32(v64 a, unsignedint c) { return _mm_srl_epi32(a, _mm_cvtsi32_si128((int)c));
}
SIMD_INLINE v64 v64_shr_s32(v64 a, unsignedint c) { return _mm_sra_epi32(a, _mm_cvtsi32_si128((int)c));
}
/* These intrinsics require immediate values, so we must use #defines
to enforce that. */ #define v64_shl_n_byte(a, c) _mm_slli_si128(a, c) #define v64_shr_n_byte(a, c) _mm_srli_si128(_mm_unpacklo_epi64(a, a), c + 8) #define v64_shl_n_8(a, c) \
_mm_and_si128(_mm_set1_epi8((char)(0xff << (c))), _mm_slli_epi16(a, c)) #define v64_shr_n_u8(a, c) \
_mm_and_si128(_mm_set1_epi8((char)(0xff >> (c))), _mm_srli_epi16(a, c)) #define v64_shr_n_s8(a, c) \
_mm_packs_epi16(_mm_srai_epi16(_mm_unpacklo_epi8(a, a), (c) + 8), a) #define v64_shl_n_16(a, c) _mm_slli_epi16(a, c) #define v64_shr_n_u16(a, c) _mm_srli_epi16(a, c) #define v64_shr_n_s16(a, c) _mm_srai_epi16(a, c) #define v64_shl_n_32(a, c) _mm_slli_epi32(a, c) #define v64_shr_n_u32(a, c) _mm_srli_epi32(a, c) #define v64_shr_n_s32(a, c) _mm_srai_epi32(a, c)
#endif// AOM_AOM_DSP_SIMD_V64_INTRINSICS_X86_H_
Messung V0.5
¤ Dauer der Verarbeitung: 0.0 Sekunden
(vorverarbeitet)
¤
Die Informationen auf dieser Webseite wurden
nach bestem Wissen sorgfältig zusammengestellt. Es wird jedoch weder Vollständigkeit, noch Richtigkeit,
noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.