// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2017 MediaTek Inc. * Author: Weiyi Lu <weiyi.lu@mediatek.com> #include <linux/clk-provider.h>#include <linux/platform_device.h>#include "clk-mtk.h" #include "clk-gate.h" #include <dt-bindings/clock/mt2712-clk.h>static const struct mtk_gate_regs mm0_cg_regs = {0 x104,0 x108,0 x100,static const struct mtk_gate_regs mm1_cg_regs = {0 x114,0 x118,0 x110,static const struct mtk_gate_regs mm2_cg_regs = {0 x224,0 x228,0 x220,#define GATE_MM0(_id, _name, _parent, _shift) \#define GATE_MM1(_id, _name, _parent, _shift) \#define GATE_MM2(_id, _name, _parent, _shift) \static const struct mtk_gate mm_clks[] = {/* MM0 */ "mm_smi_common" , "mm_sel" , 0 ),"mm_smi_larb0" , "mm_sel" , 1 ),"mm_cam_mdp" , "mm_sel" , 2 ),"mm_mdp_rdma0" , "mm_sel" , 3 ),"mm_mdp_rdma1" , "mm_sel" , 4 ),"mm_mdp_rsz0" , "mm_sel" , 5 ),"mm_mdp_rsz1" , "mm_sel" , 6 ),"mm_mdp_rsz2" , "mm_sel" , 7 ),"mm_mdp_tdshp0" , "mm_sel" , 8 ),"mm_mdp_tdshp1" , "mm_sel" , 9 ),"mm_mdp_crop" , "mm_sel" , 10 ),"mm_mdp_wdma" , "mm_sel" , 11 ),"mm_mdp_wrot0" , "mm_sel" , 12 ),"mm_mdp_wrot1" , "mm_sel" , 13 ),"mm_fake_eng" , "mm_sel" , 14 ),"mm_mutex_32k" , "clk32k" , 15 ),"mm_disp_ovl0" , "mm_sel" , 16 ),"mm_disp_ovl1" , "mm_sel" , 17 ),"mm_disp_rdma0" , "mm_sel" , 18 ),"mm_disp_rdma1" , "mm_sel" , 19 ),"mm_disp_rdma2" , "mm_sel" , 20 ),"mm_disp_wdma0" , "mm_sel" , 21 ),"mm_disp_wdma1" , "mm_sel" , 22 ),"mm_disp_color0" , "mm_sel" , 23 ),"mm_disp_color1" , "mm_sel" , 24 ),"mm_disp_aal" , "mm_sel" , 25 ),"mm_disp_gamma" , "mm_sel" , 26 ),"mm_disp_ufoe" , "mm_sel" , 27 ),"mm_disp_split0" , "mm_sel" , 28 ),"mm_disp_od" , "mm_sel" , 31 ),/* MM1 */ "mm_pwm0_mm" , "mm_sel" , 0 ),"mm_pwm0_26m" , "pwm_sel" , 1 ),"mm_pwm1_mm" , "mm_sel" , 2 ),"mm_pwm1_26m" , "pwm_sel" , 3 ),"mm_dsi0_engine" , "mm_sel" , 4 ),"mm_dsi0_digital" , "dsi0_lntc" , 5 ),"mm_dsi1_engine" , "mm_sel" , 6 ),"mm_dsi1_digital" , "dsi1_lntc" , 7 ),"mm_dpi_pixel" , "vpll_dpix" , 8 ),"mm_dpi_engine" , "mm_sel" , 9 ),"mm_dpi1_pixel" , "vpll3_dpix" , 10 ),"mm_dpi1_engine" , "mm_sel" , 11 ),"mm_lvds_pixel" , "vpll_dpix" , 16 ),"mm_lvds_cts" , "lvdstx" , 17 ),"mm_smi_larb4" , "mm_sel" , 18 ),"mm_smi_common1" , "mm_sel" , 21 ),"mm_smi_larb5" , "mm_sel" , 22 ),"mm_mdp_rdma2" , "mm_sel" , 23 ),"mm_mdp_tdshp2" , "mm_sel" , 24 ),"mm_disp_ovl2" , "mm_sel" , 25 ),"mm_disp_wdma2" , "mm_sel" , 26 ),"mm_disp_color2" , "mm_sel" , 27 ),"mm_disp_aal1" , "mm_sel" , 28 ),"mm_disp_od1" , "mm_sel" , 29 ),"mm_lvds1_pixel" , "vpll3_dpix" , 30 ),"mm_lvds1_cts" , "lvdstx3" , 31 ),/* MM2 */ "mm_smi_larb7" , "mm_sel" , 0 ),"mm_mdp_rdma3" , "mm_sel" , 1 ),"mm_mdp_wrot2" , "mm_sel" , 2 ),"mm_dsi2" , "mm_sel" , 3 ),"mm_dsi2_digital" , "dsi0_lntc" , 4 ),"mm_dsi3" , "mm_sel" , 5 ),"mm_dsi3_digital" , "dsi1_lntc" , 6 ),static const struct mtk_clk_desc mm_desc = {static const struct platform_device_id clk_mt2712_mm_id_table[] = {"clk-mt2712-mm" , .driver_data = (kernel_ulong_t)&mm_desc },/* sentinel */ } static struct platform_driver clk_mt2712_mm_drv = {"clk-mt2712-mm" ,"MediaTek MT2712 MultiMedia ddp clocks driver" );"GPL" );
Messung V0.5 in Prozent C=96 H=99 G=97
¤ Diese beiden folgenden Angebotsgruppen bietet das Unternehmen0.15Angebot
(Wie Sie bei der Firma Beratungs- und Dienstleistungen beauftragen können 2026-06-07)
¤ *Eine klare Vorstellung vom Zielzustand
