/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2020 The Linux Foundation. All rights reserved.
 */

#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM7325_H
#define _DT_BINDINGS_QCOM_SPMI_VADC_PM7325_H

#ifndef PM7325_SID
#define PM7325_SID     1
#endif

#include <dt-bindings/iio/qcom,spmi-vadc.h>

/* ADC channels for PM7325_ADC for PMIC7 */
#define PM7325_ADC7_REF_GND   (PM7325_SID << 8 | ADC7_REF_GND)
#define PM7325_ADC7_1P25VREF   (PM7325_SID << 8 | ADC7_1P25VREF)
#define PM7325_ADC7_VREF_VADC   (PM7325_SID << 8 | ADC7_VREF_VADC)
#define PM7325_ADC7_DIE_TEMP   (PM7325_SID << 8 | ADC7_DIE_TEMP)

#define PM7325_ADC7_AMUX_THM1   (PM7325_SID << 8 | ADC7_AMUX_THM1)
#define PM7325_ADC7_AMUX_THM2   (PM7325_SID << 8 | ADC7_AMUX_THM2)
#define PM7325_ADC7_AMUX_THM3   (PM7325_SID << 8 | ADC7_AMUX_THM3)
#define PM7325_ADC7_AMUX_THM4   (PM7325_SID << 8 | ADC7_AMUX_THM4)
#define PM7325_ADC7_AMUX_THM5   (PM7325_SID << 8 | ADC7_AMUX_THM5)
#define PM7325_ADC7_GPIO1   (PM7325_SID << 8 | ADC7_GPIO1)
#define PM7325_ADC7_GPIO2   (PM7325_SID << 8 | ADC7_GPIO2)
#define PM7325_ADC7_GPIO3   (PM7325_SID << 8 | ADC7_GPIO3)
#define PM7325_ADC7_GPIO4   (PM7325_SID << 8 | ADC7_GPIO4)

/* 30k pull-up1 */
#define PM7325_ADC7_AMUX_THM1_30K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM1_30K_PU)
#define PM7325_ADC7_AMUX_THM2_30K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM2_30K_PU)
#define PM7325_ADC7_AMUX_THM3_30K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM3_30K_PU)
#define PM7325_ADC7_AMUX_THM4_30K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM4_30K_PU)
#define PM7325_ADC7_AMUX_THM5_30K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM5_30K_PU)
#define PM7325_ADC7_GPIO1_30K_PU  (PM7325_SID << 8 | ADC7_GPIO1_30K_PU)
#define PM7325_ADC7_GPIO2_30K_PU  (PM7325_SID << 8 | ADC7_GPIO2_30K_PU)
#define PM7325_ADC7_GPIO3_30K_PU  (PM7325_SID << 8 | ADC7_GPIO3_30K_PU)
#define PM7325_ADC7_GPIO4_30K_PU  (PM7325_SID << 8 | ADC7_GPIO4_30K_PU)

/* 100k pull-up2 */
#define PM7325_ADC7_AMUX_THM1_100K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM1_100K_PU)
#define PM7325_ADC7_AMUX_THM2_100K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM2_100K_PU)
#define PM7325_ADC7_AMUX_THM3_100K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM3_100K_PU)
#define PM7325_ADC7_AMUX_THM4_100K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM4_100K_PU)
#define PM7325_ADC7_AMUX_THM5_100K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM5_100K_PU)
#define PM7325_ADC7_GPIO1_100K_PU  (PM7325_SID << 8 | ADC7_GPIO1_100K_PU)
#define PM7325_ADC7_GPIO2_100K_PU  (PM7325_SID << 8 | ADC7_GPIO2_100K_PU)
#define PM7325_ADC7_GPIO3_100K_PU  (PM7325_SID << 8 | ADC7_GPIO3_100K_PU)
#define PM7325_ADC7_GPIO4_100K_PU  (PM7325_SID << 8 | ADC7_GPIO4_100K_PU)

/* 400k pull-up3 */
#define PM7325_ADC7_AMUX_THM1_400K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM1_400K_PU)
#define PM7325_ADC7_AMUX_THM2_400K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM2_400K_PU)
#define PM7325_ADC7_AMUX_THM3_400K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM3_400K_PU)
#define PM7325_ADC7_AMUX_THM4_400K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM4_400K_PU)
#define PM7325_ADC7_AMUX_THM5_400K_PU  (PM7325_SID << 8 | ADC7_AMUX_THM5_400K_PU)
#define PM7325_ADC7_GPIO1_400K_PU  (PM7325_SID << 8 | ADC7_GPIO1_400K_PU)
#define PM7325_ADC7_GPIO2_400K_PU  (PM7325_SID << 8 | ADC7_GPIO2_400K_PU)
#define PM7325_ADC7_GPIO3_400K_PU  (PM7325_SID << 8 | ADC7_GPIO3_400K_PU)
#define PM7325_ADC7_GPIO4_400K_PU  (PM7325_SID << 8 | ADC7_GPIO4_400K_PU)

/* 1/3 Divider */
#define PM7325_ADC7_GPIO4_DIV3   (PM7325_SID << 8 | ADC7_GPIO4_DIV3)

#define PM7325_ADC7_VPH_PWR   (PM7325_SID << 8 | ADC7_VPH_PWR)

#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM7325_H */