Quelle  pvr_rogue_cr_defs.h   Sprache: C

/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
/* Copyright (c) 2023 Imagination Technologies Ltd. */

/*  *** Autogenerated C -- do not edit ***  */

#ifndef PVR_ROGUE_CR_DEFS_H
#define PVR_ROGUE_CR_DEFS_H

/* clang-format off */

#define ROGUE_CR_DEFS_REVISION 1

/* Register ROGUE_CR_RASTERISATION_INDIRECT */
#define ROGUE_CR_RASTERISATION_INDIRECT 0x8238U
#define ROGUE_CR_RASTERISATION_INDIRECT_MASKFULL 0x000000000000000FULL
#define ROGUE_CR_RASTERISATION_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_RASTERISATION_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFF0U

/* Register ROGUE_CR_PBE_INDIRECT */
#define ROGUE_CR_PBE_INDIRECT 0x83E0U
#define ROGUE_CR_PBE_INDIRECT_MASKFULL 0x000000000000000FULL
#define ROGUE_CR_PBE_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_PBE_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFF0U

/* Register ROGUE_CR_PBE_PERF_INDIRECT */
#define ROGUE_CR_PBE_PERF_INDIRECT 0x83D8U
#define ROGUE_CR_PBE_PERF_INDIRECT_MASKFULL 0x000000000000000FULL
#define ROGUE_CR_PBE_PERF_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_PBE_PERF_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFF0U

/* Register ROGUE_CR_TPU_PERF_INDIRECT */
#define ROGUE_CR_TPU_PERF_INDIRECT 0x83F0U
#define ROGUE_CR_TPU_PERF_INDIRECT_MASKFULL 0x0000000000000007ULL
#define ROGUE_CR_TPU_PERF_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_TPU_PERF_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFF8U

/* Register ROGUE_CR_RASTERISATION_PERF_INDIRECT */
#define ROGUE_CR_RASTERISATION_PERF_INDIRECT 0x8318U
#define ROGUE_CR_RASTERISATION_PERF_INDIRECT_MASKFULL 0x000000000000000FULL
#define ROGUE_CR_RASTERISATION_PERF_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_RASTERISATION_PERF_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFF0U

/* Register ROGUE_CR_TPU_MCU_L0_PERF_INDIRECT */
#define ROGUE_CR_TPU_MCU_L0_PERF_INDIRECT 0x8028U
#define ROGUE_CR_TPU_MCU_L0_PERF_INDIRECT_MASKFULL 0x0000000000000007ULL
#define ROGUE_CR_TPU_MCU_L0_PERF_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_TPU_MCU_L0_PERF_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFF8U

/* Register ROGUE_CR_USC_PERF_INDIRECT */
#define ROGUE_CR_USC_PERF_INDIRECT 0x8030U
#define ROGUE_CR_USC_PERF_INDIRECT_MASKFULL 0x000000000000000FULL
#define ROGUE_CR_USC_PERF_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_USC_PERF_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFF0U

/* Register ROGUE_CR_BLACKPEARL_INDIRECT */
#define ROGUE_CR_BLACKPEARL_INDIRECT 0x8388U
#define ROGUE_CR_BLACKPEARL_INDIRECT_MASKFULL 0x0000000000000003ULL
#define ROGUE_CR_BLACKPEARL_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_BLACKPEARL_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFFCU

/* Register ROGUE_CR_BLACKPEARL_PERF_INDIRECT */
#define ROGUE_CR_BLACKPEARL_PERF_INDIRECT 0x83F8U
#define ROGUE_CR_BLACKPEARL_PERF_INDIRECT_MASKFULL 0x0000000000000003ULL
#define ROGUE_CR_BLACKPEARL_PERF_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_BLACKPEARL_PERF_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFFCU

/* Register ROGUE_CR_TEXAS3_PERF_INDIRECT */
#define ROGUE_CR_TEXAS3_PERF_INDIRECT 0x83D0U
#define ROGUE_CR_TEXAS3_PERF_INDIRECT_MASKFULL 0x0000000000000007ULL
#define ROGUE_CR_TEXAS3_PERF_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_TEXAS3_PERF_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFF8U

/* Register ROGUE_CR_TEXAS_PERF_INDIRECT */
#define ROGUE_CR_TEXAS_PERF_INDIRECT 0x8288U
#define ROGUE_CR_TEXAS_PERF_INDIRECT_MASKFULL 0x0000000000000003ULL
#define ROGUE_CR_TEXAS_PERF_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_TEXAS_PERF_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFFCU

/* Register ROGUE_CR_BX_TU_PERF_INDIRECT */
#define ROGUE_CR_BX_TU_PERF_INDIRECT 0xC900U
#define ROGUE_CR_BX_TU_PERF_INDIRECT_MASKFULL 0x0000000000000003ULL
#define ROGUE_CR_BX_TU_PERF_INDIRECT_ADDRESS_SHIFT 0U
#define ROGUE_CR_BX_TU_PERF_INDIRECT_ADDRESS_CLRMSK 0xFFFFFFFCU

/* Register ROGUE_CR_CLK_CTRL */
#define ROGUE_CR_CLK_CTRL 0x0000U
#define ROGUE_CR_CLK_CTRL__PBE2_XE__MASKFULL 0xFFFFFF003F3FFFFFULL
#define ROGUE_CR_CLK_CTRL__S7_TOP__MASKFULL 0xCFCF03000F3F3F0FULL
#define ROGUE_CR_CLK_CTRL_MASKFULL 0xFFFFFF003F3FFFFFULL
#define ROGUE_CR_CLK_CTRL_BIF_TEXAS_SHIFT 62U
#define ROGUE_CR_CLK_CTRL_BIF_TEXAS_CLRMSK 0x3FFFFFFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_BIF_TEXAS_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_BIF_TEXAS_ON 0x4000000000000000ULL
#define ROGUE_CR_CLK_CTRL_BIF_TEXAS_AUTO 0x8000000000000000ULL
#define ROGUE_CR_CLK_CTRL_IPP_SHIFT 60U
#define ROGUE_CR_CLK_CTRL_IPP_CLRMSK 0xCFFFFFFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_IPP_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_IPP_ON 0x1000000000000000ULL
#define ROGUE_CR_CLK_CTRL_IPP_AUTO 0x2000000000000000ULL
#define ROGUE_CR_CLK_CTRL_FBC_SHIFT 58U
#define ROGUE_CR_CLK_CTRL_FBC_CLRMSK 0xF3FFFFFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_FBC_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_FBC_ON 0x0400000000000000ULL
#define ROGUE_CR_CLK_CTRL_FBC_AUTO 0x0800000000000000ULL
#define ROGUE_CR_CLK_CTRL_FBDC_SHIFT 56U
#define ROGUE_CR_CLK_CTRL_FBDC_CLRMSK 0xFCFFFFFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_FBDC_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_FBDC_ON 0x0100000000000000ULL
#define ROGUE_CR_CLK_CTRL_FBDC_AUTO 0x0200000000000000ULL
#define ROGUE_CR_CLK_CTRL_FB_TLCACHE_SHIFT 54U
#define ROGUE_CR_CLK_CTRL_FB_TLCACHE_CLRMSK 0xFF3FFFFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_FB_TLCACHE_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_FB_TLCACHE_ON 0x0040000000000000ULL
#define ROGUE_CR_CLK_CTRL_FB_TLCACHE_AUTO 0x0080000000000000ULL
#define ROGUE_CR_CLK_CTRL_USCS_SHIFT 52U
#define ROGUE_CR_CLK_CTRL_USCS_CLRMSK 0xFFCFFFFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_USCS_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_USCS_ON 0x0010000000000000ULL
#define ROGUE_CR_CLK_CTRL_USCS_AUTO 0x0020000000000000ULL
#define ROGUE_CR_CLK_CTRL_PBE_SHIFT 50U
#define ROGUE_CR_CLK_CTRL_PBE_CLRMSK 0xFFF3FFFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_PBE_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_PBE_ON 0x0004000000000000ULL
#define ROGUE_CR_CLK_CTRL_PBE_AUTO 0x0008000000000000ULL
#define ROGUE_CR_CLK_CTRL_MCU_L1_SHIFT 48U
#define ROGUE_CR_CLK_CTRL_MCU_L1_CLRMSK 0xFFFCFFFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_MCU_L1_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_MCU_L1_ON 0x0001000000000000ULL
#define ROGUE_CR_CLK_CTRL_MCU_L1_AUTO 0x0002000000000000ULL
#define ROGUE_CR_CLK_CTRL_CDM_SHIFT 46U
#define ROGUE_CR_CLK_CTRL_CDM_CLRMSK 0xFFFF3FFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_CDM_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_CDM_ON 0x0000400000000000ULL
#define ROGUE_CR_CLK_CTRL_CDM_AUTO 0x0000800000000000ULL
#define ROGUE_CR_CLK_CTRL_SIDEKICK_SHIFT 44U
#define ROGUE_CR_CLK_CTRL_SIDEKICK_CLRMSK 0xFFFFCFFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_SIDEKICK_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_SIDEKICK_ON 0x0000100000000000ULL
#define ROGUE_CR_CLK_CTRL_SIDEKICK_AUTO 0x0000200000000000ULL
#define ROGUE_CR_CLK_CTRL_BIF_SIDEKICK_SHIFT 42U
#define ROGUE_CR_CLK_CTRL_BIF_SIDEKICK_CLRMSK 0xFFFFF3FFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_BIF_SIDEKICK_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_BIF_SIDEKICK_ON 0x0000040000000000ULL
#define ROGUE_CR_CLK_CTRL_BIF_SIDEKICK_AUTO 0x0000080000000000ULL
#define ROGUE_CR_CLK_CTRL_BIF_SHIFT 40U
#define ROGUE_CR_CLK_CTRL_BIF_CLRMSK 0xFFFFFCFFFFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_BIF_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_BIF_ON 0x0000010000000000ULL
#define ROGUE_CR_CLK_CTRL_BIF_AUTO 0x0000020000000000ULL
#define ROGUE_CR_CLK_CTRL_TPU_MCU_DEMUX_SHIFT 28U
#define ROGUE_CR_CLK_CTRL_TPU_MCU_DEMUX_CLRMSK 0xFFFFFFFFCFFFFFFFULL
#define ROGUE_CR_CLK_CTRL_TPU_MCU_DEMUX_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_TPU_MCU_DEMUX_ON 0x0000000010000000ULL
#define ROGUE_CR_CLK_CTRL_TPU_MCU_DEMUX_AUTO 0x0000000020000000ULL
#define ROGUE_CR_CLK_CTRL_MCU_L0_SHIFT 26U
#define ROGUE_CR_CLK_CTRL_MCU_L0_CLRMSK 0xFFFFFFFFF3FFFFFFULL
#define ROGUE_CR_CLK_CTRL_MCU_L0_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_MCU_L0_ON 0x0000000004000000ULL
#define ROGUE_CR_CLK_CTRL_MCU_L0_AUTO 0x0000000008000000ULL
#define ROGUE_CR_CLK_CTRL_TPU_SHIFT 24U
#define ROGUE_CR_CLK_CTRL_TPU_CLRMSK 0xFFFFFFFFFCFFFFFFULL
#define ROGUE_CR_CLK_CTRL_TPU_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_TPU_ON 0x0000000001000000ULL
#define ROGUE_CR_CLK_CTRL_TPU_AUTO 0x0000000002000000ULL
#define ROGUE_CR_CLK_CTRL_USC_SHIFT 20U
#define ROGUE_CR_CLK_CTRL_USC_CLRMSK 0xFFFFFFFFFFCFFFFFULL
#define ROGUE_CR_CLK_CTRL_USC_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_USC_ON 0x0000000000100000ULL
#define ROGUE_CR_CLK_CTRL_USC_AUTO 0x0000000000200000ULL
#define ROGUE_CR_CLK_CTRL_TLA_SHIFT 18U
#define ROGUE_CR_CLK_CTRL_TLA_CLRMSK 0xFFFFFFFFFFF3FFFFULL
#define ROGUE_CR_CLK_CTRL_TLA_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_TLA_ON 0x0000000000040000ULL
#define ROGUE_CR_CLK_CTRL_TLA_AUTO 0x0000000000080000ULL
#define ROGUE_CR_CLK_CTRL_SLC_SHIFT 16U
#define ROGUE_CR_CLK_CTRL_SLC_CLRMSK 0xFFFFFFFFFFFCFFFFULL
#define ROGUE_CR_CLK_CTRL_SLC_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_SLC_ON 0x0000000000010000ULL
#define ROGUE_CR_CLK_CTRL_SLC_AUTO 0x0000000000020000ULL
#define ROGUE_CR_CLK_CTRL_UVS_SHIFT 14U
#define ROGUE_CR_CLK_CTRL_UVS_CLRMSK 0xFFFFFFFFFFFF3FFFULL
#define ROGUE_CR_CLK_CTRL_UVS_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_UVS_ON 0x0000000000004000ULL
#define ROGUE_CR_CLK_CTRL_UVS_AUTO 0x0000000000008000ULL
#define ROGUE_CR_CLK_CTRL_PDS_SHIFT 12U
#define ROGUE_CR_CLK_CTRL_PDS_CLRMSK 0xFFFFFFFFFFFFCFFFULL
#define ROGUE_CR_CLK_CTRL_PDS_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_PDS_ON 0x0000000000001000ULL
#define ROGUE_CR_CLK_CTRL_PDS_AUTO 0x0000000000002000ULL
#define ROGUE_CR_CLK_CTRL_VDM_SHIFT 10U
#define ROGUE_CR_CLK_CTRL_VDM_CLRMSK 0xFFFFFFFFFFFFF3FFULL
#define ROGUE_CR_CLK_CTRL_VDM_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_VDM_ON 0x0000000000000400ULL
#define ROGUE_CR_CLK_CTRL_VDM_AUTO 0x0000000000000800ULL
#define ROGUE_CR_CLK_CTRL_PM_SHIFT 8U
#define ROGUE_CR_CLK_CTRL_PM_CLRMSK 0xFFFFFFFFFFFFFCFFULL
#define ROGUE_CR_CLK_CTRL_PM_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_PM_ON 0x0000000000000100ULL
#define ROGUE_CR_CLK_CTRL_PM_AUTO 0x0000000000000200ULL
#define ROGUE_CR_CLK_CTRL_GPP_SHIFT 6U
#define ROGUE_CR_CLK_CTRL_GPP_CLRMSK 0xFFFFFFFFFFFFFF3FULL
#define ROGUE_CR_CLK_CTRL_GPP_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_GPP_ON 0x0000000000000040ULL
#define ROGUE_CR_CLK_CTRL_GPP_AUTO 0x0000000000000080ULL
#define ROGUE_CR_CLK_CTRL_TE_SHIFT 4U
#define ROGUE_CR_CLK_CTRL_TE_CLRMSK 0xFFFFFFFFFFFFFFCFULL
#define ROGUE_CR_CLK_CTRL_TE_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_TE_ON 0x0000000000000010ULL
#define ROGUE_CR_CLK_CTRL_TE_AUTO 0x0000000000000020ULL
#define ROGUE_CR_CLK_CTRL_TSP_SHIFT 2U
#define ROGUE_CR_CLK_CTRL_TSP_CLRMSK 0xFFFFFFFFFFFFFFF3ULL
#define ROGUE_CR_CLK_CTRL_TSP_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_TSP_ON 0x0000000000000004ULL
#define ROGUE_CR_CLK_CTRL_TSP_AUTO 0x0000000000000008ULL
#define ROGUE_CR_CLK_CTRL_ISP_SHIFT 0U
#define ROGUE_CR_CLK_CTRL_ISP_CLRMSK 0xFFFFFFFFFFFFFFFCULL
#define ROGUE_CR_CLK_CTRL_ISP_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_CTRL_ISP_ON 0x0000000000000001ULL
#define ROGUE_CR_CLK_CTRL_ISP_AUTO 0x0000000000000002ULL

/* Register ROGUE_CR_CLK_STATUS */
#define ROGUE_CR_CLK_STATUS 0x0008U
#define ROGUE_CR_CLK_STATUS__PBE2_XE__MASKFULL 0x00000001FFF077FFULL
#define ROGUE_CR_CLK_STATUS__S7_TOP__MASKFULL 0x00000001B3101773ULL
#define ROGUE_CR_CLK_STATUS_MASKFULL 0x00000001FFF077FFULL
#define ROGUE_CR_CLK_STATUS_MCU_FBTC_SHIFT 32U
#define ROGUE_CR_CLK_STATUS_MCU_FBTC_CLRMSK 0xFFFFFFFEFFFFFFFFULL
#define ROGUE_CR_CLK_STATUS_MCU_FBTC_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_MCU_FBTC_RUNNING 0x0000000100000000ULL
#define ROGUE_CR_CLK_STATUS_BIF_TEXAS_SHIFT 31U
#define ROGUE_CR_CLK_STATUS_BIF_TEXAS_CLRMSK 0xFFFFFFFF7FFFFFFFULL
#define ROGUE_CR_CLK_STATUS_BIF_TEXAS_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_BIF_TEXAS_RUNNING 0x0000000080000000ULL
#define ROGUE_CR_CLK_STATUS_IPP_SHIFT 30U
#define ROGUE_CR_CLK_STATUS_IPP_CLRMSK 0xFFFFFFFFBFFFFFFFULL
#define ROGUE_CR_CLK_STATUS_IPP_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_IPP_RUNNING 0x0000000040000000ULL
#define ROGUE_CR_CLK_STATUS_FBC_SHIFT 29U
#define ROGUE_CR_CLK_STATUS_FBC_CLRMSK 0xFFFFFFFFDFFFFFFFULL
#define ROGUE_CR_CLK_STATUS_FBC_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_FBC_RUNNING 0x0000000020000000ULL
#define ROGUE_CR_CLK_STATUS_FBDC_SHIFT 28U
#define ROGUE_CR_CLK_STATUS_FBDC_CLRMSK 0xFFFFFFFFEFFFFFFFULL
#define ROGUE_CR_CLK_STATUS_FBDC_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_FBDC_RUNNING 0x0000000010000000ULL
#define ROGUE_CR_CLK_STATUS_FB_TLCACHE_SHIFT 27U
#define ROGUE_CR_CLK_STATUS_FB_TLCACHE_CLRMSK 0xFFFFFFFFF7FFFFFFULL
#define ROGUE_CR_CLK_STATUS_FB_TLCACHE_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_FB_TLCACHE_RUNNING 0x0000000008000000ULL
#define ROGUE_CR_CLK_STATUS_USCS_SHIFT 26U
#define ROGUE_CR_CLK_STATUS_USCS_CLRMSK 0xFFFFFFFFFBFFFFFFULL
#define ROGUE_CR_CLK_STATUS_USCS_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_USCS_RUNNING 0x0000000004000000ULL
#define ROGUE_CR_CLK_STATUS_PBE_SHIFT 25U
#define ROGUE_CR_CLK_STATUS_PBE_CLRMSK 0xFFFFFFFFFDFFFFFFULL
#define ROGUE_CR_CLK_STATUS_PBE_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_PBE_RUNNING 0x0000000002000000ULL
#define ROGUE_CR_CLK_STATUS_MCU_L1_SHIFT 24U
#define ROGUE_CR_CLK_STATUS_MCU_L1_CLRMSK 0xFFFFFFFFFEFFFFFFULL
#define ROGUE_CR_CLK_STATUS_MCU_L1_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_MCU_L1_RUNNING 0x0000000001000000ULL
#define ROGUE_CR_CLK_STATUS_CDM_SHIFT 23U
#define ROGUE_CR_CLK_STATUS_CDM_CLRMSK 0xFFFFFFFFFF7FFFFFULL
#define ROGUE_CR_CLK_STATUS_CDM_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_CDM_RUNNING 0x0000000000800000ULL
#define ROGUE_CR_CLK_STATUS_SIDEKICK_SHIFT 22U
#define ROGUE_CR_CLK_STATUS_SIDEKICK_CLRMSK 0xFFFFFFFFFFBFFFFFULL
#define ROGUE_CR_CLK_STATUS_SIDEKICK_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_SIDEKICK_RUNNING 0x0000000000400000ULL
#define ROGUE_CR_CLK_STATUS_BIF_SIDEKICK_SHIFT 21U
#define ROGUE_CR_CLK_STATUS_BIF_SIDEKICK_CLRMSK 0xFFFFFFFFFFDFFFFFULL
#define ROGUE_CR_CLK_STATUS_BIF_SIDEKICK_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_BIF_SIDEKICK_RUNNING 0x0000000000200000ULL
#define ROGUE_CR_CLK_STATUS_BIF_SHIFT 20U
#define ROGUE_CR_CLK_STATUS_BIF_CLRMSK 0xFFFFFFFFFFEFFFFFULL
#define ROGUE_CR_CLK_STATUS_BIF_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_BIF_RUNNING 0x0000000000100000ULL
#define ROGUE_CR_CLK_STATUS_TPU_MCU_DEMUX_SHIFT 14U
#define ROGUE_CR_CLK_STATUS_TPU_MCU_DEMUX_CLRMSK 0xFFFFFFFFFFFFBFFFULL
#define ROGUE_CR_CLK_STATUS_TPU_MCU_DEMUX_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_TPU_MCU_DEMUX_RUNNING 0x0000000000004000ULL
#define ROGUE_CR_CLK_STATUS_MCU_L0_SHIFT 13U
#define ROGUE_CR_CLK_STATUS_MCU_L0_CLRMSK 0xFFFFFFFFFFFFDFFFULL
#define ROGUE_CR_CLK_STATUS_MCU_L0_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_MCU_L0_RUNNING 0x0000000000002000ULL
#define ROGUE_CR_CLK_STATUS_TPU_SHIFT 12U
#define ROGUE_CR_CLK_STATUS_TPU_CLRMSK 0xFFFFFFFFFFFFEFFFULL
#define ROGUE_CR_CLK_STATUS_TPU_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_TPU_RUNNING 0x0000000000001000ULL
#define ROGUE_CR_CLK_STATUS_USC_SHIFT 10U
#define ROGUE_CR_CLK_STATUS_USC_CLRMSK 0xFFFFFFFFFFFFFBFFULL
#define ROGUE_CR_CLK_STATUS_USC_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_USC_RUNNING 0x0000000000000400ULL
#define ROGUE_CR_CLK_STATUS_TLA_SHIFT 9U
#define ROGUE_CR_CLK_STATUS_TLA_CLRMSK 0xFFFFFFFFFFFFFDFFULL
#define ROGUE_CR_CLK_STATUS_TLA_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_TLA_RUNNING 0x0000000000000200ULL
#define ROGUE_CR_CLK_STATUS_SLC_SHIFT 8U
#define ROGUE_CR_CLK_STATUS_SLC_CLRMSK 0xFFFFFFFFFFFFFEFFULL
#define ROGUE_CR_CLK_STATUS_SLC_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_SLC_RUNNING 0x0000000000000100ULL
#define ROGUE_CR_CLK_STATUS_UVS_SHIFT 7U
#define ROGUE_CR_CLK_STATUS_UVS_CLRMSK 0xFFFFFFFFFFFFFF7FULL
#define ROGUE_CR_CLK_STATUS_UVS_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_UVS_RUNNING 0x0000000000000080ULL
#define ROGUE_CR_CLK_STATUS_PDS_SHIFT 6U
#define ROGUE_CR_CLK_STATUS_PDS_CLRMSK 0xFFFFFFFFFFFFFFBFULL
#define ROGUE_CR_CLK_STATUS_PDS_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_PDS_RUNNING 0x0000000000000040ULL
#define ROGUE_CR_CLK_STATUS_VDM_SHIFT 5U
#define ROGUE_CR_CLK_STATUS_VDM_CLRMSK 0xFFFFFFFFFFFFFFDFULL
#define ROGUE_CR_CLK_STATUS_VDM_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_VDM_RUNNING 0x0000000000000020ULL
#define ROGUE_CR_CLK_STATUS_PM_SHIFT 4U
#define ROGUE_CR_CLK_STATUS_PM_CLRMSK 0xFFFFFFFFFFFFFFEFULL
#define ROGUE_CR_CLK_STATUS_PM_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_PM_RUNNING 0x0000000000000010ULL
#define ROGUE_CR_CLK_STATUS_GPP_SHIFT 3U
#define ROGUE_CR_CLK_STATUS_GPP_CLRMSK 0xFFFFFFFFFFFFFFF7ULL
#define ROGUE_CR_CLK_STATUS_GPP_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_GPP_RUNNING 0x0000000000000008ULL
#define ROGUE_CR_CLK_STATUS_TE_SHIFT 2U
#define ROGUE_CR_CLK_STATUS_TE_CLRMSK 0xFFFFFFFFFFFFFFFBULL
#define ROGUE_CR_CLK_STATUS_TE_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_TE_RUNNING 0x0000000000000004ULL
#define ROGUE_CR_CLK_STATUS_TSP_SHIFT 1U
#define ROGUE_CR_CLK_STATUS_TSP_CLRMSK 0xFFFFFFFFFFFFFFFDULL
#define ROGUE_CR_CLK_STATUS_TSP_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_TSP_RUNNING 0x0000000000000002ULL
#define ROGUE_CR_CLK_STATUS_ISP_SHIFT 0U
#define ROGUE_CR_CLK_STATUS_ISP_CLRMSK 0xFFFFFFFFFFFFFFFEULL
#define ROGUE_CR_CLK_STATUS_ISP_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_STATUS_ISP_RUNNING 0x0000000000000001ULL

/* Register ROGUE_CR_CORE_ID */
#define ROGUE_CR_CORE_ID__PBVNC 0x0020U
#define ROGUE_CR_CORE_ID__PBVNC__MASKFULL 0xFFFFFFFFFFFFFFFFULL
#define ROGUE_CR_CORE_ID__PBVNC__BRANCH_ID_SHIFT 48U
#define ROGUE_CR_CORE_ID__PBVNC__BRANCH_ID_CLRMSK 0x0000FFFFFFFFFFFFULL
#define ROGUE_CR_CORE_ID__PBVNC__VERSION_ID_SHIFT 32U
#define ROGUE_CR_CORE_ID__PBVNC__VERSION_ID_CLRMSK 0xFFFF0000FFFFFFFFULL
#define ROGUE_CR_CORE_ID__PBVNC__NUMBER_OF_SCALABLE_UNITS_SHIFT 16U
#define ROGUE_CR_CORE_ID__PBVNC__NUMBER_OF_SCALABLE_UNITS_CLRMSK 0xFFFFFFFF0000FFFFULL
#define ROGUE_CR_CORE_ID__PBVNC__CONFIG_ID_SHIFT 0U
#define ROGUE_CR_CORE_ID__PBVNC__CONFIG_ID_CLRMSK 0xFFFFFFFFFFFF0000ULL

/* Register ROGUE_CR_CORE_ID */
#define ROGUE_CR_CORE_ID 0x0018U
#define ROGUE_CR_CORE_ID_MASKFULL 0x00000000FFFFFFFFULL
#define ROGUE_CR_CORE_ID_ID_SHIFT 16U
#define ROGUE_CR_CORE_ID_ID_CLRMSK 0x0000FFFFU
#define ROGUE_CR_CORE_ID_CONFIG_SHIFT 0U
#define ROGUE_CR_CORE_ID_CONFIG_CLRMSK 0xFFFF0000U

/* Register ROGUE_CR_CORE_REVISION */
#define ROGUE_CR_CORE_REVISION 0x0020U
#define ROGUE_CR_CORE_REVISION_MASKFULL 0x00000000FFFFFFFFULL
#define ROGUE_CR_CORE_REVISION_DESIGNER_SHIFT 24U
#define ROGUE_CR_CORE_REVISION_DESIGNER_CLRMSK 0x00FFFFFFU
#define ROGUE_CR_CORE_REVISION_MAJOR_SHIFT 16U
#define ROGUE_CR_CORE_REVISION_MAJOR_CLRMSK 0xFF00FFFFU
#define ROGUE_CR_CORE_REVISION_MINOR_SHIFT 8U
#define ROGUE_CR_CORE_REVISION_MINOR_CLRMSK 0xFFFF00FFU
#define ROGUE_CR_CORE_REVISION_MAINTENANCE_SHIFT 0U
#define ROGUE_CR_CORE_REVISION_MAINTENANCE_CLRMSK 0xFFFFFF00U

/* Register ROGUE_CR_DESIGNER_REV_FIELD1 */
#define ROGUE_CR_DESIGNER_REV_FIELD1 0x0028U
#define ROGUE_CR_DESIGNER_REV_FIELD1_MASKFULL 0x00000000FFFFFFFFULL
#define ROGUE_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_SHIFT 0U
#define ROGUE_CR_DESIGNER_REV_FIELD1_DESIGNER_REV_FIELD1_CLRMSK 0x00000000U

/* Register ROGUE_CR_DESIGNER_REV_FIELD2 */
#define ROGUE_CR_DESIGNER_REV_FIELD2 0x0030U
#define ROGUE_CR_DESIGNER_REV_FIELD2_MASKFULL 0x00000000FFFFFFFFULL
#define ROGUE_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_SHIFT 0U
#define ROGUE_CR_DESIGNER_REV_FIELD2_DESIGNER_REV_FIELD2_CLRMSK 0x00000000U

/* Register ROGUE_CR_CHANGESET_NUMBER */
#define ROGUE_CR_CHANGESET_NUMBER 0x0040U
#define ROGUE_CR_CHANGESET_NUMBER_MASKFULL 0xFFFFFFFFFFFFFFFFULL
#define ROGUE_CR_CHANGESET_NUMBER_CHANGESET_NUMBER_SHIFT 0U
#define ROGUE_CR_CHANGESET_NUMBER_CHANGESET_NUMBER_CLRMSK 0x0000000000000000ULL

/* Register ROGUE_CR_CLK_XTPLUS_CTRL */
#define ROGUE_CR_CLK_XTPLUS_CTRL 0x0080U
#define ROGUE_CR_CLK_XTPLUS_CTRL_MASKFULL 0x0000003FFFFF0000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_TDM_SHIFT 36U
#define ROGUE_CR_CLK_XTPLUS_CTRL_TDM_CLRMSK 0xFFFFFFCFFFFFFFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_TDM_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_TDM_ON 0x0000001000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_TDM_AUTO 0x0000002000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_ASTC_SHIFT 34U
#define ROGUE_CR_CLK_XTPLUS_CTRL_ASTC_CLRMSK 0xFFFFFFF3FFFFFFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_ASTC_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_ASTC_ON 0x0000000400000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_ASTC_AUTO 0x0000000800000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_IPF_SHIFT 32U
#define ROGUE_CR_CLK_XTPLUS_CTRL_IPF_CLRMSK 0xFFFFFFFCFFFFFFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_IPF_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_IPF_ON 0x0000000100000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_IPF_AUTO 0x0000000200000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_COMPUTE_SHIFT 30U
#define ROGUE_CR_CLK_XTPLUS_CTRL_COMPUTE_CLRMSK 0xFFFFFFFF3FFFFFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_COMPUTE_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_COMPUTE_ON 0x0000000040000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_COMPUTE_AUTO 0x0000000080000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_PIXEL_SHIFT 28U
#define ROGUE_CR_CLK_XTPLUS_CTRL_PIXEL_CLRMSK 0xFFFFFFFFCFFFFFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_PIXEL_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_PIXEL_ON 0x0000000010000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_PIXEL_AUTO 0x0000000020000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_VERTEX_SHIFT 26U
#define ROGUE_CR_CLK_XTPLUS_CTRL_VERTEX_CLRMSK 0xFFFFFFFFF3FFFFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_VERTEX_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_VERTEX_ON 0x0000000004000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_VERTEX_AUTO 0x0000000008000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_USCPS_SHIFT 24U
#define ROGUE_CR_CLK_XTPLUS_CTRL_USCPS_CLRMSK 0xFFFFFFFFFCFFFFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_USCPS_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_USCPS_ON 0x0000000001000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_USCPS_AUTO 0x0000000002000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_PDS_SHARED_SHIFT 22U
#define ROGUE_CR_CLK_XTPLUS_CTRL_PDS_SHARED_CLRMSK 0xFFFFFFFFFF3FFFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_PDS_SHARED_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_PDS_SHARED_ON 0x0000000000400000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_PDS_SHARED_AUTO 0x0000000000800000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_BIF_BLACKPEARL_SHIFT 20U
#define ROGUE_CR_CLK_XTPLUS_CTRL_BIF_BLACKPEARL_CLRMSK 0xFFFFFFFFFFCFFFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_BIF_BLACKPEARL_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_BIF_BLACKPEARL_ON 0x0000000000100000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_BIF_BLACKPEARL_AUTO 0x0000000000200000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_USC_SHARED_SHIFT 18U
#define ROGUE_CR_CLK_XTPLUS_CTRL_USC_SHARED_CLRMSK 0xFFFFFFFFFFF3FFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_USC_SHARED_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_USC_SHARED_ON 0x0000000000040000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_USC_SHARED_AUTO 0x0000000000080000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_GEOMETRY_SHIFT 16U
#define ROGUE_CR_CLK_XTPLUS_CTRL_GEOMETRY_CLRMSK 0xFFFFFFFFFFFCFFFFULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_GEOMETRY_OFF 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_GEOMETRY_ON 0x0000000000010000ULL
#define ROGUE_CR_CLK_XTPLUS_CTRL_GEOMETRY_AUTO 0x0000000000020000ULL

/* Register ROGUE_CR_CLK_XTPLUS_STATUS */
#define ROGUE_CR_CLK_XTPLUS_STATUS 0x0088U
#define ROGUE_CR_CLK_XTPLUS_STATUS_MASKFULL 0x00000000000007FFULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_TDM_SHIFT 10U
#define ROGUE_CR_CLK_XTPLUS_STATUS_TDM_CLRMSK 0xFFFFFFFFFFFFFBFFULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_TDM_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_TDM_RUNNING 0x0000000000000400ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_IPF_SHIFT 9U
#define ROGUE_CR_CLK_XTPLUS_STATUS_IPF_CLRMSK 0xFFFFFFFFFFFFFDFFULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_IPF_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_IPF_RUNNING 0x0000000000000200ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_COMPUTE_SHIFT 8U
#define ROGUE_CR_CLK_XTPLUS_STATUS_COMPUTE_CLRMSK 0xFFFFFFFFFFFFFEFFULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_COMPUTE_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_COMPUTE_RUNNING 0x0000000000000100ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_ASTC_SHIFT 7U
#define ROGUE_CR_CLK_XTPLUS_STATUS_ASTC_CLRMSK 0xFFFFFFFFFFFFFF7FULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_ASTC_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_ASTC_RUNNING 0x0000000000000080ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_PIXEL_SHIFT 6U
#define ROGUE_CR_CLK_XTPLUS_STATUS_PIXEL_CLRMSK 0xFFFFFFFFFFFFFFBFULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_PIXEL_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_PIXEL_RUNNING 0x0000000000000040ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_VERTEX_SHIFT 5U
#define ROGUE_CR_CLK_XTPLUS_STATUS_VERTEX_CLRMSK 0xFFFFFFFFFFFFFFDFULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_VERTEX_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_VERTEX_RUNNING 0x0000000000000020ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_USCPS_SHIFT 4U
#define ROGUE_CR_CLK_XTPLUS_STATUS_USCPS_CLRMSK 0xFFFFFFFFFFFFFFEFULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_USCPS_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_USCPS_RUNNING 0x0000000000000010ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_PDS_SHARED_SHIFT 3U
#define ROGUE_CR_CLK_XTPLUS_STATUS_PDS_SHARED_CLRMSK 0xFFFFFFFFFFFFFFF7ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_PDS_SHARED_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_PDS_SHARED_RUNNING 0x0000000000000008ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_BIF_BLACKPEARL_SHIFT 2U
#define ROGUE_CR_CLK_XTPLUS_STATUS_BIF_BLACKPEARL_CLRMSK 0xFFFFFFFFFFFFFFFBULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_BIF_BLACKPEARL_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_BIF_BLACKPEARL_RUNNING 0x0000000000000004ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_USC_SHARED_SHIFT 1U
#define ROGUE_CR_CLK_XTPLUS_STATUS_USC_SHARED_CLRMSK 0xFFFFFFFFFFFFFFFDULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_USC_SHARED_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_USC_SHARED_RUNNING 0x0000000000000002ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_GEOMETRY_SHIFT 0U
#define ROGUE_CR_CLK_XTPLUS_STATUS_GEOMETRY_CLRMSK 0xFFFFFFFFFFFFFFFEULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_GEOMETRY_GATED 0x0000000000000000ULL
#define ROGUE_CR_CLK_XTPLUS_STATUS_GEOMETRY_RUNNING 0x0000000000000001ULL

/* Register ROGUE_CR_SOFT_RESET */
#define ROGUE_CR_SOFT_RESET 0x0100U
#define ROGUE_CR_SOFT_RESET__PBE2_XE__MASKFULL 0xFFEFFFFFFFFFFC3DULL
#define ROGUE_CR_SOFT_RESET_MASKFULL 0x00E7FFFFFFFFFC3DULL
#define ROGUE_CR_SOFT_RESET_PHANTOM3_CORE_SHIFT 63U
#define ROGUE_CR_SOFT_RESET_PHANTOM3_CORE_CLRMSK 0x7FFFFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_PHANTOM3_CORE_EN 0x8000000000000000ULL
#define ROGUE_CR_SOFT_RESET_PHANTOM2_CORE_SHIFT 62U
#define ROGUE_CR_SOFT_RESET_PHANTOM2_CORE_CLRMSK 0xBFFFFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_PHANTOM2_CORE_EN 0x4000000000000000ULL
#define ROGUE_CR_SOFT_RESET_BERNADO2_CORE_SHIFT 61U
#define ROGUE_CR_SOFT_RESET_BERNADO2_CORE_CLRMSK 0xDFFFFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_BERNADO2_CORE_EN 0x2000000000000000ULL
#define ROGUE_CR_SOFT_RESET_JONES_CORE_SHIFT 60U
#define ROGUE_CR_SOFT_RESET_JONES_CORE_CLRMSK 0xEFFFFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_JONES_CORE_EN 0x1000000000000000ULL
#define ROGUE_CR_SOFT_RESET_TILING_CORE_SHIFT 59U
#define ROGUE_CR_SOFT_RESET_TILING_CORE_CLRMSK 0xF7FFFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_TILING_CORE_EN 0x0800000000000000ULL
#define ROGUE_CR_SOFT_RESET_TE3_SHIFT 58U
#define ROGUE_CR_SOFT_RESET_TE3_CLRMSK 0xFBFFFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_TE3_EN 0x0400000000000000ULL
#define ROGUE_CR_SOFT_RESET_VCE_SHIFT 57U
#define ROGUE_CR_SOFT_RESET_VCE_CLRMSK 0xFDFFFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_VCE_EN 0x0200000000000000ULL
#define ROGUE_CR_SOFT_RESET_VBS_SHIFT 56U
#define ROGUE_CR_SOFT_RESET_VBS_CLRMSK 0xFEFFFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_VBS_EN 0x0100000000000000ULL
#define ROGUE_CR_SOFT_RESET_DPX1_CORE_SHIFT 55U
#define ROGUE_CR_SOFT_RESET_DPX1_CORE_CLRMSK 0xFF7FFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_DPX1_CORE_EN 0x0080000000000000ULL
#define ROGUE_CR_SOFT_RESET_DPX0_CORE_SHIFT 54U
#define ROGUE_CR_SOFT_RESET_DPX0_CORE_CLRMSK 0xFFBFFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_DPX0_CORE_EN 0x0040000000000000ULL
#define ROGUE_CR_SOFT_RESET_FBA_SHIFT 53U
#define ROGUE_CR_SOFT_RESET_FBA_CLRMSK 0xFFDFFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_FBA_EN 0x0020000000000000ULL
#define ROGUE_CR_SOFT_RESET_FB_CDC_SHIFT 51U
#define ROGUE_CR_SOFT_RESET_FB_CDC_CLRMSK 0xFFF7FFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_FB_CDC_EN 0x0008000000000000ULL
#define ROGUE_CR_SOFT_RESET_SH_SHIFT 50U
#define ROGUE_CR_SOFT_RESET_SH_CLRMSK 0xFFFBFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_SH_EN 0x0004000000000000ULL
#define ROGUE_CR_SOFT_RESET_VRDM_SHIFT 49U
#define ROGUE_CR_SOFT_RESET_VRDM_CLRMSK 0xFFFDFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_VRDM_EN 0x0002000000000000ULL
#define ROGUE_CR_SOFT_RESET_MCU_FBTC_SHIFT 48U
#define ROGUE_CR_SOFT_RESET_MCU_FBTC_CLRMSK 0xFFFEFFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_MCU_FBTC_EN 0x0001000000000000ULL
#define ROGUE_CR_SOFT_RESET_PHANTOM1_CORE_SHIFT 47U
#define ROGUE_CR_SOFT_RESET_PHANTOM1_CORE_CLRMSK 0xFFFF7FFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_PHANTOM1_CORE_EN 0x0000800000000000ULL
#define ROGUE_CR_SOFT_RESET_PHANTOM0_CORE_SHIFT 46U
#define ROGUE_CR_SOFT_RESET_PHANTOM0_CORE_CLRMSK 0xFFFFBFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_PHANTOM0_CORE_EN 0x0000400000000000ULL
#define ROGUE_CR_SOFT_RESET_BERNADO1_CORE_SHIFT 45U
#define ROGUE_CR_SOFT_RESET_BERNADO1_CORE_CLRMSK 0xFFFFDFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_BERNADO1_CORE_EN 0x0000200000000000ULL
#define ROGUE_CR_SOFT_RESET_BERNADO0_CORE_SHIFT 44U
#define ROGUE_CR_SOFT_RESET_BERNADO0_CORE_CLRMSK 0xFFFFEFFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_BERNADO0_CORE_EN 0x0000100000000000ULL
#define ROGUE_CR_SOFT_RESET_IPP_SHIFT 43U
#define ROGUE_CR_SOFT_RESET_IPP_CLRMSK 0xFFFFF7FFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_IPP_EN 0x0000080000000000ULL
#define ROGUE_CR_SOFT_RESET_BIF_TEXAS_SHIFT 42U
#define ROGUE_CR_SOFT_RESET_BIF_TEXAS_CLRMSK 0xFFFFFBFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_BIF_TEXAS_EN 0x0000040000000000ULL
#define ROGUE_CR_SOFT_RESET_TORNADO_CORE_SHIFT 41U
#define ROGUE_CR_SOFT_RESET_TORNADO_CORE_CLRMSK 0xFFFFFDFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_TORNADO_CORE_EN 0x0000020000000000ULL
#define ROGUE_CR_SOFT_RESET_DUST_H_CORE_SHIFT 40U
#define ROGUE_CR_SOFT_RESET_DUST_H_CORE_CLRMSK 0xFFFFFEFFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_DUST_H_CORE_EN 0x0000010000000000ULL
#define ROGUE_CR_SOFT_RESET_DUST_G_CORE_SHIFT 39U
#define ROGUE_CR_SOFT_RESET_DUST_G_CORE_CLRMSK 0xFFFFFF7FFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_DUST_G_CORE_EN 0x0000008000000000ULL
#define ROGUE_CR_SOFT_RESET_DUST_F_CORE_SHIFT 38U
#define ROGUE_CR_SOFT_RESET_DUST_F_CORE_CLRMSK 0xFFFFFFBFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_DUST_F_CORE_EN 0x0000004000000000ULL
#define ROGUE_CR_SOFT_RESET_DUST_E_CORE_SHIFT 37U
#define ROGUE_CR_SOFT_RESET_DUST_E_CORE_CLRMSK 0xFFFFFFDFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_DUST_E_CORE_EN 0x0000002000000000ULL
#define ROGUE_CR_SOFT_RESET_DUST_D_CORE_SHIFT 36U
#define ROGUE_CR_SOFT_RESET_DUST_D_CORE_CLRMSK 0xFFFFFFEFFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_DUST_D_CORE_EN 0x0000001000000000ULL
#define ROGUE_CR_SOFT_RESET_DUST_C_CORE_SHIFT 35U
#define ROGUE_CR_SOFT_RESET_DUST_C_CORE_CLRMSK 0xFFFFFFF7FFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_DUST_C_CORE_EN 0x0000000800000000ULL
#define ROGUE_CR_SOFT_RESET_MMU_SHIFT 34U
#define ROGUE_CR_SOFT_RESET_MMU_CLRMSK 0xFFFFFFFBFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_MMU_EN 0x0000000400000000ULL
#define ROGUE_CR_SOFT_RESET_BIF1_SHIFT 33U
#define ROGUE_CR_SOFT_RESET_BIF1_CLRMSK 0xFFFFFFFDFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_BIF1_EN 0x0000000200000000ULL
#define ROGUE_CR_SOFT_RESET_GARTEN_SHIFT 32U
#define ROGUE_CR_SOFT_RESET_GARTEN_CLRMSK 0xFFFFFFFEFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_GARTEN_EN 0x0000000100000000ULL
#define ROGUE_CR_SOFT_RESET_CPU_SHIFT 32U
#define ROGUE_CR_SOFT_RESET_CPU_CLRMSK 0xFFFFFFFEFFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_CPU_EN 0x0000000100000000ULL
#define ROGUE_CR_SOFT_RESET_RASCAL_CORE_SHIFT 31U
#define ROGUE_CR_SOFT_RESET_RASCAL_CORE_CLRMSK 0xFFFFFFFF7FFFFFFFULL
#define ROGUE_CR_SOFT_RESET_RASCAL_CORE_EN 0x0000000080000000ULL
#define ROGUE_CR_SOFT_RESET_DUST_B_CORE_SHIFT 30U
#define ROGUE_CR_SOFT_RESET_DUST_B_CORE_CLRMSK 0xFFFFFFFFBFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_DUST_B_CORE_EN 0x0000000040000000ULL
#define ROGUE_CR_SOFT_RESET_DUST_A_CORE_SHIFT 29U
#define ROGUE_CR_SOFT_RESET_DUST_A_CORE_CLRMSK 0xFFFFFFFFDFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_DUST_A_CORE_EN 0x0000000020000000ULL
#define ROGUE_CR_SOFT_RESET_FB_TLCACHE_SHIFT 28U
#define ROGUE_CR_SOFT_RESET_FB_TLCACHE_CLRMSK 0xFFFFFFFFEFFFFFFFULL
#define ROGUE_CR_SOFT_RESET_FB_TLCACHE_EN 0x0000000010000000ULL
#define ROGUE_CR_SOFT_RESET_SLC_SHIFT 27U
#define ROGUE_CR_SOFT_RESET_SLC_CLRMSK 0xFFFFFFFFF7FFFFFFULL
#define ROGUE_CR_SOFT_RESET_SLC_EN 0x0000000008000000ULL
#define ROGUE_CR_SOFT_RESET_TLA_SHIFT 26U
#define ROGUE_CR_SOFT_RESET_TLA_CLRMSK 0xFFFFFFFFFBFFFFFFULL
#define ROGUE_CR_SOFT_RESET_TLA_EN 0x0000000004000000ULL
#define ROGUE_CR_SOFT_RESET_UVS_SHIFT 25U
#define ROGUE_CR_SOFT_RESET_UVS_CLRMSK 0xFFFFFFFFFDFFFFFFULL
#define ROGUE_CR_SOFT_RESET_UVS_EN 0x0000000002000000ULL
#define ROGUE_CR_SOFT_RESET_TE_SHIFT 24U
#define ROGUE_CR_SOFT_RESET_TE_CLRMSK 0xFFFFFFFFFEFFFFFFULL
#define ROGUE_CR_SOFT_RESET_TE_EN 0x0000000001000000ULL
#define ROGUE_CR_SOFT_RESET_GPP_SHIFT 23U
#define ROGUE_CR_SOFT_RESET_GPP_CLRMSK 0xFFFFFFFFFF7FFFFFULL
#define ROGUE_CR_SOFT_RESET_GPP_EN 0x0000000000800000ULL
#define ROGUE_CR_SOFT_RESET_FBDC_SHIFT 22U
#define ROGUE_CR_SOFT_RESET_FBDC_CLRMSK 0xFFFFFFFFFFBFFFFFULL
#define ROGUE_CR_SOFT_RESET_FBDC_EN 0x0000000000400000ULL
#define ROGUE_CR_SOFT_RESET_FBC_SHIFT 21U
#define ROGUE_CR_SOFT_RESET_FBC_CLRMSK 0xFFFFFFFFFFDFFFFFULL
#define ROGUE_CR_SOFT_RESET_FBC_EN 0x0000000000200000ULL
#define ROGUE_CR_SOFT_RESET_PM_SHIFT 20U
#define ROGUE_CR_SOFT_RESET_PM_CLRMSK 0xFFFFFFFFFFEFFFFFULL
#define ROGUE_CR_SOFT_RESET_PM_EN 0x0000000000100000ULL
#define ROGUE_CR_SOFT_RESET_PBE_SHIFT 19U
#define ROGUE_CR_SOFT_RESET_PBE_CLRMSK 0xFFFFFFFFFFF7FFFFULL
#define ROGUE_CR_SOFT_RESET_PBE_EN 0x0000000000080000ULL
#define ROGUE_CR_SOFT_RESET_USC_SHARED_SHIFT 18U
#define ROGUE_CR_SOFT_RESET_USC_SHARED_CLRMSK 0xFFFFFFFFFFFBFFFFULL
#define ROGUE_CR_SOFT_RESET_USC_SHARED_EN 0x0000000000040000ULL
#define ROGUE_CR_SOFT_RESET_MCU_L1_SHIFT 17U
#define ROGUE_CR_SOFT_RESET_MCU_L1_CLRMSK 0xFFFFFFFFFFFDFFFFULL
#define ROGUE_CR_SOFT_RESET_MCU_L1_EN 0x0000000000020000ULL
#define ROGUE_CR_SOFT_RESET_BIF_SHIFT 16U
#define ROGUE_CR_SOFT_RESET_BIF_CLRMSK 0xFFFFFFFFFFFEFFFFULL
#define ROGUE_CR_SOFT_RESET_BIF_EN 0x0000000000010000ULL
#define ROGUE_CR_SOFT_RESET_CDM_SHIFT 15U
#define ROGUE_CR_SOFT_RESET_CDM_CLRMSK 0xFFFFFFFFFFFF7FFFULL
#define ROGUE_CR_SOFT_RESET_CDM_EN 0x0000000000008000ULL
#define ROGUE_CR_SOFT_RESET_VDM_SHIFT 14U
#define ROGUE_CR_SOFT_RESET_VDM_CLRMSK 0xFFFFFFFFFFFFBFFFULL
#define ROGUE_CR_SOFT_RESET_VDM_EN 0x0000000000004000ULL
#define ROGUE_CR_SOFT_RESET_TESS_SHIFT 13U
#define ROGUE_CR_SOFT_RESET_TESS_CLRMSK 0xFFFFFFFFFFFFDFFFULL
#define ROGUE_CR_SOFT_RESET_TESS_EN 0x0000000000002000ULL
#define ROGUE_CR_SOFT_RESET_PDS_SHIFT 12U
#define ROGUE_CR_SOFT_RESET_PDS_CLRMSK 0xFFFFFFFFFFFFEFFFULL
#define ROGUE_CR_SOFT_RESET_PDS_EN 0x0000000000001000ULL
#define ROGUE_CR_SOFT_RESET_ISP_SHIFT 11U
#define ROGUE_CR_SOFT_RESET_ISP_CLRMSK 0xFFFFFFFFFFFFF7FFULL
#define ROGUE_CR_SOFT_RESET_ISP_EN 0x0000000000000800ULL
#define ROGUE_CR_SOFT_RESET_TSP_SHIFT 10U
#define ROGUE_CR_SOFT_RESET_TSP_CLRMSK 0xFFFFFFFFFFFFFBFFULL
#define ROGUE_CR_SOFT_RESET_TSP_EN 0x0000000000000400ULL
#define ROGUE_CR_SOFT_RESET_SYSARB_SHIFT 5U
#define ROGUE_CR_SOFT_RESET_SYSARB_CLRMSK 0xFFFFFFFFFFFFFFDFULL
#define ROGUE_CR_SOFT_RESET_SYSARB_EN 0x0000000000000020ULL
#define ROGUE_CR_SOFT_RESET_TPU_MCU_DEMUX_SHIFT 4U
#define ROGUE_CR_SOFT_RESET_TPU_MCU_DEMUX_CLRMSK 0xFFFFFFFFFFFFFFEFULL
#define ROGUE_CR_SOFT_RESET_TPU_MCU_DEMUX_EN 0x0000000000000010ULL
#define ROGUE_CR_SOFT_RESET_MCU_L0_SHIFT 3U
#define ROGUE_CR_SOFT_RESET_MCU_L0_CLRMSK 0xFFFFFFFFFFFFFFF7ULL
#define ROGUE_CR_SOFT_RESET_MCU_L0_EN 0x0000000000000008ULL
#define ROGUE_CR_SOFT_RESET_TPU_SHIFT 2U
#define ROGUE_CR_SOFT_RESET_TPU_CLRMSK 0xFFFFFFFFFFFFFFFBULL
#define ROGUE_CR_SOFT_RESET_TPU_EN 0x0000000000000004ULL
#define ROGUE_CR_SOFT_RESET_USC_SHIFT 0U
#define ROGUE_CR_SOFT_RESET_USC_CLRMSK 0xFFFFFFFFFFFFFFFEULL
#define ROGUE_CR_SOFT_RESET_USC_EN 0x0000000000000001ULL

/* Register ROGUE_CR_SOFT_RESET2 */
#define ROGUE_CR_SOFT_RESET2 0x0108U
#define ROGUE_CR_SOFT_RESET2_MASKFULL 0x00000000001FFFFFULL
#define ROGUE_CR_SOFT_RESET2_SPFILTER_SHIFT 12U
#define ROGUE_CR_SOFT_RESET2_SPFILTER_CLRMSK 0xFFE00FFFU
#define ROGUE_CR_SOFT_RESET2_TDM_SHIFT 11U
#define ROGUE_CR_SOFT_RESET2_TDM_CLRMSK 0xFFFFF7FFU
#define ROGUE_CR_SOFT_RESET2_TDM_EN 0x00000800U
#define ROGUE_CR_SOFT_RESET2_ASTC_SHIFT 10U
#define ROGUE_CR_SOFT_RESET2_ASTC_CLRMSK 0xFFFFFBFFU
#define ROGUE_CR_SOFT_RESET2_ASTC_EN 0x00000400U
#define ROGUE_CR_SOFT_RESET2_BLACKPEARL_SHIFT 9U
#define ROGUE_CR_SOFT_RESET2_BLACKPEARL_CLRMSK 0xFFFFFDFFU
#define ROGUE_CR_SOFT_RESET2_BLACKPEARL_EN 0x00000200U
#define ROGUE_CR_SOFT_RESET2_USCPS_SHIFT 8U
#define ROGUE_CR_SOFT_RESET2_USCPS_CLRMSK 0xFFFFFEFFU
#define ROGUE_CR_SOFT_RESET2_USCPS_EN 0x00000100U
#define ROGUE_CR_SOFT_RESET2_IPF_SHIFT 7U
#define ROGUE_CR_SOFT_RESET2_IPF_CLRMSK 0xFFFFFF7FU
#define ROGUE_CR_SOFT_RESET2_IPF_EN 0x00000080U
#define ROGUE_CR_SOFT_RESET2_GEOMETRY_SHIFT 6U
#define ROGUE_CR_SOFT_RESET2_GEOMETRY_CLRMSK 0xFFFFFFBFU
#define ROGUE_CR_SOFT_RESET2_GEOMETRY_EN 0x00000040U
#define ROGUE_CR_SOFT_RESET2_USC_SHARED_SHIFT 5U
#define ROGUE_CR_SOFT_RESET2_USC_SHARED_CLRMSK 0xFFFFFFDFU
#define ROGUE_CR_SOFT_RESET2_USC_SHARED_EN 0x00000020U
#define ROGUE_CR_SOFT_RESET2_PDS_SHARED_SHIFT 4U
#define ROGUE_CR_SOFT_RESET2_PDS_SHARED_CLRMSK 0xFFFFFFEFU
#define ROGUE_CR_SOFT_RESET2_PDS_SHARED_EN 0x00000010U
#define ROGUE_CR_SOFT_RESET2_BIF_BLACKPEARL_SHIFT 3U
#define ROGUE_CR_SOFT_RESET2_BIF_BLACKPEARL_CLRMSK 0xFFFFFFF7U
#define ROGUE_CR_SOFT_RESET2_BIF_BLACKPEARL_EN 0x00000008U
#define ROGUE_CR_SOFT_RESET2_PIXEL_SHIFT 2U
#define ROGUE_CR_SOFT_RESET2_PIXEL_CLRMSK 0xFFFFFFFBU
#define ROGUE_CR_SOFT_RESET2_PIXEL_EN 0x00000004U
#define ROGUE_CR_SOFT_RESET2_CDM_SHIFT 1U
#define ROGUE_CR_SOFT_RESET2_CDM_CLRMSK 0xFFFFFFFDU
#define ROGUE_CR_SOFT_RESET2_CDM_EN 0x00000002U
#define ROGUE_CR_SOFT_RESET2_VERTEX_SHIFT 0U
#define ROGUE_CR_SOFT_RESET2_VERTEX_CLRMSK 0xFFFFFFFEU
#define ROGUE_CR_SOFT_RESET2_VERTEX_EN 0x00000001U

/* Register ROGUE_CR_EVENT_STATUS */
#define ROGUE_CR_EVENT_STATUS 0x0130U
#define ROGUE_CR_EVENT_STATUS__ROGUEXE__MASKFULL 0x00000000E01DFFFFULL
#define ROGUE_CR_EVENT_STATUS__SIGNALS__MASKFULL 0x00000000E007FFFFULL
#define ROGUE_CR_EVENT_STATUS_MASKFULL 0x00000000FFFFFFFFULL
#define ROGUE_CR_EVENT_STATUS_TDM_FENCE_FINISHED_SHIFT 31U
#define ROGUE_CR_EVENT_STATUS_TDM_FENCE_FINISHED_CLRMSK 0x7FFFFFFFU
#define ROGUE_CR_EVENT_STATUS_TDM_FENCE_FINISHED_EN 0x80000000U
#define ROGUE_CR_EVENT_STATUS_TDM_BUFFER_STALL_SHIFT 30U
#define ROGUE_CR_EVENT_STATUS_TDM_BUFFER_STALL_CLRMSK 0xBFFFFFFFU
#define ROGUE_CR_EVENT_STATUS_TDM_BUFFER_STALL_EN 0x40000000U
#define ROGUE_CR_EVENT_STATUS_COMPUTE_SIGNAL_FAILURE_SHIFT 29U
#define ROGUE_CR_EVENT_STATUS_COMPUTE_SIGNAL_FAILURE_CLRMSK 0xDFFFFFFFU
#define ROGUE_CR_EVENT_STATUS_COMPUTE_SIGNAL_FAILURE_EN 0x20000000U
#define ROGUE_CR_EVENT_STATUS_DPX_OUT_OF_MEMORY_SHIFT 28U
#define ROGUE_CR_EVENT_STATUS_DPX_OUT_OF_MEMORY_CLRMSK 0xEFFFFFFFU
#define ROGUE_CR_EVENT_STATUS_DPX_OUT_OF_MEMORY_EN 0x10000000U
#define ROGUE_CR_EVENT_STATUS_DPX_MMU_PAGE_FAULT_SHIFT 27U
#define ROGUE_CR_EVENT_STATUS_DPX_MMU_PAGE_FAULT_CLRMSK 0xF7FFFFFFU
#define ROGUE_CR_EVENT_STATUS_DPX_MMU_PAGE_FAULT_EN 0x08000000U
#define ROGUE_CR_EVENT_STATUS_RPM_OUT_OF_MEMORY_SHIFT 26U
#define ROGUE_CR_EVENT_STATUS_RPM_OUT_OF_MEMORY_CLRMSK 0xFBFFFFFFU
#define ROGUE_CR_EVENT_STATUS_RPM_OUT_OF_MEMORY_EN 0x04000000U
#define ROGUE_CR_EVENT_STATUS_FBA_FC3_FINISHED_SHIFT 25U
#define ROGUE_CR_EVENT_STATUS_FBA_FC3_FINISHED_CLRMSK 0xFDFFFFFFU
#define ROGUE_CR_EVENT_STATUS_FBA_FC3_FINISHED_EN 0x02000000U
#define ROGUE_CR_EVENT_STATUS_FBA_FC2_FINISHED_SHIFT 24U
#define ROGUE_CR_EVENT_STATUS_FBA_FC2_FINISHED_CLRMSK 0xFEFFFFFFU
#define ROGUE_CR_EVENT_STATUS_FBA_FC2_FINISHED_EN 0x01000000U
#define ROGUE_CR_EVENT_STATUS_FBA_FC1_FINISHED_SHIFT 23U
#define ROGUE_CR_EVENT_STATUS_FBA_FC1_FINISHED_CLRMSK 0xFF7FFFFFU
#define ROGUE_CR_EVENT_STATUS_FBA_FC1_FINISHED_EN 0x00800000U
#define ROGUE_CR_EVENT_STATUS_FBA_FC0_FINISHED_SHIFT 22U
#define ROGUE_CR_EVENT_STATUS_FBA_FC0_FINISHED_CLRMSK 0xFFBFFFFFU
#define ROGUE_CR_EVENT_STATUS_FBA_FC0_FINISHED_EN 0x00400000U
#define ROGUE_CR_EVENT_STATUS_RDM_FC3_FINISHED_SHIFT 21U
#define ROGUE_CR_EVENT_STATUS_RDM_FC3_FINISHED_CLRMSK 0xFFDFFFFFU
#define ROGUE_CR_EVENT_STATUS_RDM_FC3_FINISHED_EN 0x00200000U
#define ROGUE_CR_EVENT_STATUS_RDM_FC2_FINISHED_SHIFT 20U
#define ROGUE_CR_EVENT_STATUS_RDM_FC2_FINISHED_CLRMSK 0xFFEFFFFFU
#define ROGUE_CR_EVENT_STATUS_RDM_FC2_FINISHED_EN 0x00100000U
#define ROGUE_CR_EVENT_STATUS_SAFETY_SHIFT 20U
#define ROGUE_CR_EVENT_STATUS_SAFETY_CLRMSK 0xFFEFFFFFU
#define ROGUE_CR_EVENT_STATUS_SAFETY_EN 0x00100000U
#define ROGUE_CR_EVENT_STATUS_RDM_FC1_FINISHED_SHIFT 19U
#define ROGUE_CR_EVENT_STATUS_RDM_FC1_FINISHED_CLRMSK 0xFFF7FFFFU
#define ROGUE_CR_EVENT_STATUS_RDM_FC1_FINISHED_EN 0x00080000U
#define ROGUE_CR_EVENT_STATUS_SLAVE_REQ_SHIFT 19U
#define ROGUE_CR_EVENT_STATUS_SLAVE_REQ_CLRMSK 0xFFF7FFFFU
#define ROGUE_CR_EVENT_STATUS_SLAVE_REQ_EN 0x00080000U
#define ROGUE_CR_EVENT_STATUS_RDM_FC0_FINISHED_SHIFT 18U
#define ROGUE_CR_EVENT_STATUS_RDM_FC0_FINISHED_CLRMSK 0xFFFBFFFFU
#define ROGUE_CR_EVENT_STATUS_RDM_FC0_FINISHED_EN 0x00040000U
#define ROGUE_CR_EVENT_STATUS_TDM_CONTEXT_STORE_FINISHED_SHIFT 18U
#define ROGUE_CR_EVENT_STATUS_TDM_CONTEXT_STORE_FINISHED_CLRMSK 0xFFFBFFFFU
#define ROGUE_CR_EVENT_STATUS_TDM_CONTEXT_STORE_FINISHED_EN 0x00040000U
#define ROGUE_CR_EVENT_STATUS_SHG_FINISHED_SHIFT 17U
#define ROGUE_CR_EVENT_STATUS_SHG_FINISHED_CLRMSK 0xFFFDFFFFU
#define ROGUE_CR_EVENT_STATUS_SHG_FINISHED_EN 0x00020000U
#define ROGUE_CR_EVENT_STATUS_SPFILTER_SIGNAL_UPDATE_SHIFT 17U
#define ROGUE_CR_EVENT_STATUS_SPFILTER_SIGNAL_UPDATE_CLRMSK 0xFFFDFFFFU
#define ROGUE_CR_EVENT_STATUS_SPFILTER_SIGNAL_UPDATE_EN 0x00020000U
#define ROGUE_CR_EVENT_STATUS_COMPUTE_BUFFER_STALL_SHIFT 16U
#define ROGUE_CR_EVENT_STATUS_COMPUTE_BUFFER_STALL_CLRMSK 0xFFFEFFFFU
#define ROGUE_CR_EVENT_STATUS_COMPUTE_BUFFER_STALL_EN 0x00010000U
#define ROGUE_CR_EVENT_STATUS_USC_TRIGGER_SHIFT 15U
#define ROGUE_CR_EVENT_STATUS_USC_TRIGGER_CLRMSK 0xFFFF7FFFU
#define ROGUE_CR_EVENT_STATUS_USC_TRIGGER_EN 0x00008000U
#define ROGUE_CR_EVENT_STATUS_ZLS_FINISHED_SHIFT 14U
#define ROGUE_CR_EVENT_STATUS_ZLS_FINISHED_CLRMSK 0xFFFFBFFFU
#define ROGUE_CR_EVENT_STATUS_ZLS_FINISHED_EN 0x00004000U
#define ROGUE_CR_EVENT_STATUS_GPIO_ACK_SHIFT 13U
#define ROGUE_CR_EVENT_STATUS_GPIO_ACK_CLRMSK 0xFFFFDFFFU
#define ROGUE_CR_EVENT_STATUS_GPIO_ACK_EN 0x00002000U
#define ROGUE_CR_EVENT_STATUS_GPIO_REQ_SHIFT 12U
#define ROGUE_CR_EVENT_STATUS_GPIO_REQ_CLRMSK 0xFFFFEFFFU
#define ROGUE_CR_EVENT_STATUS_GPIO_REQ_EN 0x00001000U
#define ROGUE_CR_EVENT_STATUS_POWER_ABORT_SHIFT 11U
#define ROGUE_CR_EVENT_STATUS_POWER_ABORT_CLRMSK 0xFFFFF7FFU
#define ROGUE_CR_EVENT_STATUS_POWER_ABORT_EN 0x00000800U
#define ROGUE_CR_EVENT_STATUS_POWER_COMPLETE_SHIFT 10U
#define ROGUE_CR_EVENT_STATUS_POWER_COMPLETE_CLRMSK 0xFFFFFBFFU
#define ROGUE_CR_EVENT_STATUS_POWER_COMPLETE_EN 0x00000400U
#define ROGUE_CR_EVENT_STATUS_MMU_PAGE_FAULT_SHIFT 9U
#define ROGUE_CR_EVENT_STATUS_MMU_PAGE_FAULT_CLRMSK 0xFFFFFDFFU
#define ROGUE_CR_EVENT_STATUS_MMU_PAGE_FAULT_EN 0x00000200U
#define ROGUE_CR_EVENT_STATUS_PM_3D_MEM_FREE_SHIFT 8U
#define ROGUE_CR_EVENT_STATUS_PM_3D_MEM_FREE_CLRMSK 0xFFFFFEFFU
#define ROGUE_CR_EVENT_STATUS_PM_3D_MEM_FREE_EN 0x00000100U
#define ROGUE_CR_EVENT_STATUS_PM_OUT_OF_MEMORY_SHIFT 7U
#define ROGUE_CR_EVENT_STATUS_PM_OUT_OF_MEMORY_CLRMSK 0xFFFFFF7FU
#define ROGUE_CR_EVENT_STATUS_PM_OUT_OF_MEMORY_EN 0x00000080U
#define ROGUE_CR_EVENT_STATUS_TA_TERMINATE_SHIFT 6U
#define ROGUE_CR_EVENT_STATUS_TA_TERMINATE_CLRMSK 0xFFFFFFBFU
#define ROGUE_CR_EVENT_STATUS_TA_TERMINATE_EN 0x00000040U
#define ROGUE_CR_EVENT_STATUS_TA_FINISHED_SHIFT 5U
#define ROGUE_CR_EVENT_STATUS_TA_FINISHED_CLRMSK 0xFFFFFFDFU
#define ROGUE_CR_EVENT_STATUS_TA_FINISHED_EN 0x00000020U
#define ROGUE_CR_EVENT_STATUS_ISP_END_MACROTILE_SHIFT 4U
#define ROGUE_CR_EVENT_STATUS_ISP_END_MACROTILE_CLRMSK 0xFFFFFFEFU
#define ROGUE_CR_EVENT_STATUS_ISP_END_MACROTILE_EN 0x00000010U
#define ROGUE_CR_EVENT_STATUS_PIXELBE_END_RENDER_SHIFT 3U
#define ROGUE_CR_EVENT_STATUS_PIXELBE_END_RENDER_CLRMSK 0xFFFFFFF7U
#define ROGUE_CR_EVENT_STATUS_PIXELBE_END_RENDER_EN 0x00000008U
#define ROGUE_CR_EVENT_STATUS_COMPUTE_FINISHED_SHIFT 2U
#define ROGUE_CR_EVENT_STATUS_COMPUTE_FINISHED_CLRMSK 0xFFFFFFFBU
#define ROGUE_CR_EVENT_STATUS_COMPUTE_FINISHED_EN 0x00000004U
#define ROGUE_CR_EVENT_STATUS_KERNEL_FINISHED_SHIFT 1U
#define ROGUE_CR_EVENT_STATUS_KERNEL_FINISHED_CLRMSK 0xFFFFFFFDU
#define ROGUE_CR_EVENT_STATUS_KERNEL_FINISHED_EN 0x00000002U
#define ROGUE_CR_EVENT_STATUS_TLA_COMPLETE_SHIFT 0U
#define ROGUE_CR_EVENT_STATUS_TLA_COMPLETE_CLRMSK 0xFFFFFFFEU
#define ROGUE_CR_EVENT_STATUS_TLA_COMPLETE_EN 0x00000001U

/* Register ROGUE_CR_EVENT_CLEAR */
#define ROGUE_CR_EVENT_CLEAR 0x0138U
#define ROGUE_CR_EVENT_CLEAR__ROGUEXE__MASKFULL 0x00000000E01DFFFFULL
#define ROGUE_CR_EVENT_CLEAR__SIGNALS__MASKFULL 0x00000000E007FFFFULL
#define ROGUE_CR_EVENT_CLEAR_MASKFULL 0x00000000FFFFFFFFULL
#define ROGUE_CR_EVENT_CLEAR_TDM_FENCE_FINISHED_SHIFT 31U
#define ROGUE_CR_EVENT_CLEAR_TDM_FENCE_FINISHED_CLRMSK 0x7FFFFFFFU
#define ROGUE_CR_EVENT_CLEAR_TDM_FENCE_FINISHED_EN 0x80000000U
#define ROGUE_CR_EVENT_CLEAR_TDM_BUFFER_STALL_SHIFT 30U
#define ROGUE_CR_EVENT_CLEAR_TDM_BUFFER_STALL_CLRMSK 0xBFFFFFFFU
#define ROGUE_CR_EVENT_CLEAR_TDM_BUFFER_STALL_EN 0x40000000U
#define ROGUE_CR_EVENT_CLEAR_COMPUTE_SIGNAL_FAILURE_SHIFT 29U
#define ROGUE_CR_EVENT_CLEAR_COMPUTE_SIGNAL_FAILURE_CLRMSK 0xDFFFFFFFU
#define ROGUE_CR_EVENT_CLEAR_COMPUTE_SIGNAL_FAILURE_EN 0x20000000U
#define ROGUE_CR_EVENT_CLEAR_DPX_OUT_OF_MEMORY_SHIFT 28U
#define ROGUE_CR_EVENT_CLEAR_DPX_OUT_OF_MEMORY_CLRMSK 0xEFFFFFFFU
#define ROGUE_CR_EVENT_CLEAR_DPX_OUT_OF_MEMORY_EN 0x10000000U
#define ROGUE_CR_EVENT_CLEAR_DPX_MMU_PAGE_FAULT_SHIFT 27U
#define ROGUE_CR_EVENT_CLEAR_DPX_MMU_PAGE_FAULT_CLRMSK 0xF7FFFFFFU
#define ROGUE_CR_EVENT_CLEAR_DPX_MMU_PAGE_FAULT_EN 0x08000000U
#define ROGUE_CR_EVENT_CLEAR_RPM_OUT_OF_MEMORY_SHIFT 26U
#define ROGUE_CR_EVENT_CLEAR_RPM_OUT_OF_MEMORY_CLRMSK 0xFBFFFFFFU
#define ROGUE_CR_EVENT_CLEAR_RPM_OUT_OF_MEMORY_EN 0x04000000U
#define ROGUE_CR_EVENT_CLEAR_FBA_FC3_FINISHED_SHIFT 25U
#define ROGUE_CR_EVENT_CLEAR_FBA_FC3_FINISHED_CLRMSK 0xFDFFFFFFU
#define ROGUE_CR_EVENT_CLEAR_FBA_FC3_FINISHED_EN 0x02000000U
#define ROGUE_CR_EVENT_CLEAR_FBA_FC2_FINISHED_SHIFT 24U
#define ROGUE_CR_EVENT_CLEAR_FBA_FC2_FINISHED_CLRMSK 0xFEFFFFFFU
#define ROGUE_CR_EVENT_CLEAR_FBA_FC2_FINISHED_EN 0x01000000U
#define ROGUE_CR_EVENT_CLEAR_FBA_FC1_FINISHED_SHIFT 23U
#define ROGUE_CR_EVENT_CLEAR_FBA_FC1_FINISHED_CLRMSK 0xFF7FFFFFU
#define ROGUE_CR_EVENT_CLEAR_FBA_FC1_FINISHED_EN 0x00800000U
#define ROGUE_CR_EVENT_CLEAR_FBA_FC0_FINISHED_SHIFT 22U
#define ROGUE_CR_EVENT_CLEAR_FBA_FC0_FINISHED_CLRMSK 0xFFBFFFFFU
#define ROGUE_CR_EVENT_CLEAR_FBA_FC0_FINISHED_EN 0x00400000U
#define ROGUE_CR_EVENT_CLEAR_RDM_FC3_FINISHED_SHIFT 21U
#define ROGUE_CR_EVENT_CLEAR_RDM_FC3_FINISHED_CLRMSK 0xFFDFFFFFU
#define ROGUE_CR_EVENT_CLEAR_RDM_FC3_FINISHED_EN 0x00200000U
#define ROGUE_CR_EVENT_CLEAR_RDM_FC2_FINISHED_SHIFT 20U
#define ROGUE_CR_EVENT_CLEAR_RDM_FC2_FINISHED_CLRMSK 0xFFEFFFFFU
#define ROGUE_CR_EVENT_CLEAR_RDM_FC2_FINISHED_EN 0x00100000U
#define ROGUE_CR_EVENT_CLEAR_SAFETY_SHIFT 20U
#define ROGUE_CR_EVENT_CLEAR_SAFETY_CLRMSK 0xFFEFFFFFU
#define ROGUE_CR_EVENT_CLEAR_SAFETY_EN 0x00100000U
#define ROGUE_CR_EVENT_CLEAR_RDM_FC1_FINISHED_SHIFT 19U
#define ROGUE_CR_EVENT_CLEAR_RDM_FC1_FINISHED_CLRMSK 0xFFF7FFFFU
#define ROGUE_CR_EVENT_CLEAR_RDM_FC1_FINISHED_EN 0x00080000U
#define ROGUE_CR_EVENT_CLEAR_SLAVE_REQ_SHIFT 19U
#define ROGUE_CR_EVENT_CLEAR_SLAVE_REQ_CLRMSK 0xFFF7FFFFU
#define ROGUE_CR_EVENT_CLEAR_SLAVE_REQ_EN 0x00080000U
#define ROGUE_CR_EVENT_CLEAR_RDM_FC0_FINISHED_SHIFT 18U
#define ROGUE_CR_EVENT_CLEAR_RDM_FC0_FINISHED_CLRMSK 0xFFFBFFFFU
#define ROGUE_CR_EVENT_CLEAR_RDM_FC0_FINISHED_EN 0x00040000U
#define ROGUE_CR_EVENT_CLEAR_TDM_CONTEXT_STORE_FINISHED_SHIFT 18U
#define ROGUE_CR_EVENT_CLEAR_TDM_CONTEXT_STORE_FINISHED_CLRMSK 0xFFFBFFFFU
#define ROGUE_CR_EVENT_CLEAR_TDM_CONTEXT_STORE_FINISHED_EN 0x00040000U
#define ROGUE_CR_EVENT_CLEAR_SHG_FINISHED_SHIFT 17U
#define ROGUE_CR_EVENT_CLEAR_SHG_FINISHED_CLRMSK 0xFFFDFFFFU
#define ROGUE_CR_EVENT_CLEAR_SHG_FINISHED_EN 0x00020000U
#define ROGUE_CR_EVENT_CLEAR_SPFILTER_SIGNAL_UPDATE_SHIFT 17U
#define ROGUE_CR_EVENT_CLEAR_SPFILTER_SIGNAL_UPDATE_CLRMSK 0xFFFDFFFFU
#define ROGUE_CR_EVENT_CLEAR_SPFILTER_SIGNAL_UPDATE_EN 0x00020000U
#define ROGUE_CR_EVENT_CLEAR_COMPUTE_BUFFER_STALL_SHIFT 16U
#define ROGUE_CR_EVENT_CLEAR_COMPUTE_BUFFER_STALL_CLRMSK 0xFFFEFFFFU
#define ROGUE_CR_EVENT_CLEAR_COMPUTE_BUFFER_STALL_EN 0x00010000U
#define ROGUE_CR_EVENT_CLEAR_USC_TRIGGER_SHIFT 15U
#define ROGUE_CR_EVENT_CLEAR_USC_TRIGGER_CLRMSK 0xFFFF7FFFU
#define ROGUE_CR_EVENT_CLEAR_USC_TRIGGER_EN 0x00008000U
#define ROGUE_CR_EVENT_CLEAR_ZLS_FINISHED_SHIFT 14U
#define ROGUE_CR_EVENT_CLEAR_ZLS_FINISHED_CLRMSK 0xFFFFBFFFU
#define ROGUE_CR_EVENT_CLEAR_ZLS_FINISHED_EN 0x00004000U
#define ROGUE_CR_EVENT_CLEAR_GPIO_ACK_SHIFT 13U
#define ROGUE_CR_EVENT_CLEAR_GPIO_ACK_CLRMSK 0xFFFFDFFFU
#define ROGUE_CR_EVENT_CLEAR_GPIO_ACK_EN 0x00002000U
#define ROGUE_CR_EVENT_CLEAR_GPIO_REQ_SHIFT 12U
#define ROGUE_CR_EVENT_CLEAR_GPIO_REQ_CLRMSK 0xFFFFEFFFU
#define ROGUE_CR_EVENT_CLEAR_GPIO_REQ_EN 0x00001000U
#define ROGUE_CR_EVENT_CLEAR_POWER_ABORT_SHIFT 11U
#define ROGUE_CR_EVENT_CLEAR_POWER_ABORT_CLRMSK 0xFFFFF7FFU
#define ROGUE_CR_EVENT_CLEAR_POWER_ABORT_EN 0x00000800U
#define ROGUE_CR_EVENT_CLEAR_POWER_COMPLETE_SHIFT 10U
#define ROGUE_CR_EVENT_CLEAR_POWER_COMPLETE_CLRMSK 0xFFFFFBFFU
#define ROGUE_CR_EVENT_CLEAR_POWER_COMPLETE_EN 0x00000400U
#define ROGUE_CR_EVENT_CLEAR_MMU_PAGE_FAULT_SHIFT 9U
#define ROGUE_CR_EVENT_CLEAR_MMU_PAGE_FAULT_CLRMSK 0xFFFFFDFFU
#define ROGUE_CR_EVENT_CLEAR_MMU_PAGE_FAULT_EN 0x00000200U
#define ROGUE_CR_EVENT_CLEAR_PM_3D_MEM_FREE_SHIFT 8U
#define ROGUE_CR_EVENT_CLEAR_PM_3D_MEM_FREE_CLRMSK 0xFFFFFEFFU
#define ROGUE_CR_EVENT_CLEAR_PM_3D_MEM_FREE_EN 0x00000100U
#define ROGUE_CR_EVENT_CLEAR_PM_OUT_OF_MEMORY_SHIFT 7U
#define ROGUE_CR_EVENT_CLEAR_PM_OUT_OF_MEMORY_CLRMSK 0xFFFFFF7FU
#define ROGUE_CR_EVENT_CLEAR_PM_OUT_OF_MEMORY_EN 0x00000080U
#define ROGUE_CR_EVENT_CLEAR_TA_TERMINATE_SHIFT 6U
#define ROGUE_CR_EVENT_CLEAR_TA_TERMINATE_CLRMSK 0xFFFFFFBFU
#define ROGUE_CR_EVENT_CLEAR_TA_TERMINATE_EN 0x00000040U
#define ROGUE_CR_EVENT_CLEAR_TA_FINISHED_SHIFT 5U
#define ROGUE_CR_EVENT_CLEAR_TA_FINISHED_CLRMSK 0xFFFFFFDFU
#define ROGUE_CR_EVENT_CLEAR_TA_FINISHED_EN 0x00000020U
#define ROGUE_CR_EVENT_CLEAR_ISP_END_MACROTILE_SHIFT 4U
#define ROGUE_CR_EVENT_CLEAR_ISP_END_MACROTILE_CLRMSK 0xFFFFFFEFU
#define ROGUE_CR_EVENT_CLEAR_ISP_END_MACROTILE_EN 0x00000010U
#define ROGUE_CR_EVENT_CLEAR_PIXELBE_END_RENDER_SHIFT 3U
#define ROGUE_CR_EVENT_CLEAR_PIXELBE_END_RENDER_CLRMSK 0xFFFFFFF7U
#define ROGUE_CR_EVENT_CLEAR_PIXELBE_END_RENDER_EN 0x00000008U
#define ROGUE_CR_EVENT_CLEAR_COMPUTE_FINISHED_SHIFT 2U
#define ROGUE_CR_EVENT_CLEAR_COMPUTE_FINISHED_CLRMSK 0xFFFFFFFBU
#define ROGUE_CR_EVENT_CLEAR_COMPUTE_FINISHED_EN 0x00000004U
#define ROGUE_CR_EVENT_CLEAR_KERNEL_FINISHED_SHIFT 1U
#define ROGUE_CR_EVENT_CLEAR_KERNEL_FINISHED_CLRMSK 0xFFFFFFFDU
#define ROGUE_CR_EVENT_CLEAR_KERNEL_FINISHED_EN 0x00000002U
#define ROGUE_CR_EVENT_CLEAR_TLA_COMPLETE_SHIFT 0U
#define ROGUE_CR_EVENT_CLEAR_TLA_COMPLETE_CLRMSK 0xFFFFFFFEU
#define ROGUE_CR_EVENT_CLEAR_TLA_COMPLETE_EN 0x00000001U

/* Register ROGUE_CR_TIMER */
#define ROGUE_CR_TIMER 0x0160U
#define ROGUE_CR_TIMER_MASKFULL 0x8000FFFFFFFFFFFFULL
#define ROGUE_CR_TIMER_BIT31_SHIFT 63U
#define ROGUE_CR_TIMER_BIT31_CLRMSK 0x7FFFFFFFFFFFFFFFULL
#define ROGUE_CR_TIMER_BIT31_EN 0x8000000000000000ULL
#define ROGUE_CR_TIMER_VALUE_SHIFT 0U
#define ROGUE_CR_TIMER_VALUE_CLRMSK 0xFFFF000000000000ULL

/* Register ROGUE_CR_TLA_STATUS */
#define ROGUE_CR_TLA_STATUS 0x0178U
#define ROGUE_CR_TLA_STATUS_MASKFULL 0xFFFFFFFFFFFFFFFFULL
#define ROGUE_CR_TLA_STATUS_BLIT_COUNT_SHIFT 39U
#define ROGUE_CR_TLA_STATUS_BLIT_COUNT_CLRMSK 0x0000007FFFFFFFFFULL
#define ROGUE_CR_TLA_STATUS_REQUEST_SHIFT 7U
#define ROGUE_CR_TLA_STATUS_REQUEST_CLRMSK 0xFFFFFF800000007FULL
#define ROGUE_CR_TLA_STATUS_FIFO_FULLNESS_SHIFT 1U
#define ROGUE_CR_TLA_STATUS_FIFO_FULLNESS_CLRMSK 0xFFFFFFFFFFFFFF81ULL
#define ROGUE_CR_TLA_STATUS_BUSY_SHIFT 0U
#define ROGUE_CR_TLA_STATUS_BUSY_CLRMSK 0xFFFFFFFFFFFFFFFEULL
#define ROGUE_CR_TLA_STATUS_BUSY_EN 0x0000000000000001ULL

/* Register ROGUE_CR_PM_PARTIAL_RENDER_ENABLE */
#define ROGUE_CR_PM_PARTIAL_RENDER_ENABLE 0x0338U
#define ROGUE_CR_PM_PARTIAL_RENDER_ENABLE_MASKFULL 0x0000000000000001ULL
#define ROGUE_CR_PM_PARTIAL_RENDER_ENABLE_OP_SHIFT 0U
#define ROGUE_CR_PM_PARTIAL_RENDER_ENABLE_OP_CLRMSK 0xFFFFFFFEU
#define ROGUE_CR_PM_PARTIAL_RENDER_ENABLE_OP_EN 0x00000001U

/* Register ROGUE_CR_SIDEKICK_IDLE */
#define ROGUE_CR_SIDEKICK_IDLE 0x03C8U
#define ROGUE_CR_SIDEKICK_IDLE_MASKFULL 0x000000000000007FULL
#define ROGUE_CR_SIDEKICK_IDLE_FB_CDC_SHIFT 6U
#define ROGUE_CR_SIDEKICK_IDLE_FB_CDC_CLRMSK 0xFFFFFFBFU
#define ROGUE_CR_SIDEKICK_IDLE_FB_CDC_EN 0x00000040U
#define ROGUE_CR_SIDEKICK_IDLE_MMU_SHIFT 5U
#define ROGUE_CR_SIDEKICK_IDLE_MMU_CLRMSK 0xFFFFFFDFU
#define ROGUE_CR_SIDEKICK_IDLE_MMU_EN 0x00000020U
#define ROGUE_CR_SIDEKICK_IDLE_BIF128_SHIFT 4U
#define ROGUE_CR_SIDEKICK_IDLE_BIF128_CLRMSK 0xFFFFFFEFU
#define ROGUE_CR_SIDEKICK_IDLE_BIF128_EN 0x00000010U
#define ROGUE_CR_SIDEKICK_IDLE_TLA_SHIFT 3U
#define ROGUE_CR_SIDEKICK_IDLE_TLA_CLRMSK 0xFFFFFFF7U
#define ROGUE_CR_SIDEKICK_IDLE_TLA_EN 0x00000008U
#define ROGUE_CR_SIDEKICK_IDLE_GARTEN_SHIFT 2U
#define ROGUE_CR_SIDEKICK_IDLE_GARTEN_CLRMSK 0xFFFFFFFBU
#define ROGUE_CR_SIDEKICK_IDLE_GARTEN_EN 0x00000004U
#define ROGUE_CR_SIDEKICK_IDLE_HOSTIF_SHIFT 1U
#define ROGUE_CR_SIDEKICK_IDLE_HOSTIF_CLRMSK 0xFFFFFFFDU
#define ROGUE_CR_SIDEKICK_IDLE_HOSTIF_EN 0x00000002U
#define ROGUE_CR_SIDEKICK_IDLE_SOCIF_SHIFT 0U
#define ROGUE_CR_SIDEKICK_IDLE_SOCIF_CLRMSK 0xFFFFFFFEU
#define ROGUE_CR_SIDEKICK_IDLE_SOCIF_EN 0x00000001U

/* Register ROGUE_CR_MARS_IDLE */
#define ROGUE_CR_MARS_IDLE 0x08F8U
#define ROGUE_CR_MARS_IDLE_MASKFULL 0x0000000000000007ULL
#define ROGUE_CR_MARS_IDLE_MH_SYSARB0_SHIFT 2U
#define ROGUE_CR_MARS_IDLE_MH_SYSARB0_CLRMSK 0xFFFFFFFBU
#define ROGUE_CR_MARS_IDLE_MH_SYSARB0_EN 0x00000004U
#define ROGUE_CR_MARS_IDLE_CPU_SHIFT 1U
#define ROGUE_CR_MARS_IDLE_CPU_CLRMSK 0xFFFFFFFDU
#define ROGUE_CR_MARS_IDLE_CPU_EN 0x00000002U
#define ROGUE_CR_MARS_IDLE_SOCIF_SHIFT 0U
#define ROGUE_CR_MARS_IDLE_SOCIF_CLRMSK 0xFFFFFFFEU
#define ROGUE_CR_MARS_IDLE_SOCIF_EN 0x00000001U

/* Register ROGUE_CR_VDM_CONTEXT_STORE_STATUS */
#define ROGUE_CR_VDM_CONTEXT_STORE_STATUS 0x0430U
#define ROGUE_CR_VDM_CONTEXT_STORE_STATUS_MASKFULL 0x00000000000000F3ULL
#define ROGUE_CR_VDM_CONTEXT_STORE_STATUS_LAST_PIPE_SHIFT 4U
#define ROGUE_CR_VDM_CONTEXT_STORE_STATUS_LAST_PIPE_CLRMSK 0xFFFFFF0FU
#define ROGUE_CR_VDM_CONTEXT_STORE_STATUS_NEED_RESUME_SHIFT 1U
#define ROGUE_CR_VDM_CONTEXT_STORE_STATUS_NEED_RESUME_CLRMSK 0xFFFFFFFDU
#define ROGUE_CR_VDM_CONTEXT_STORE_STATUS_NEED_RESUME_EN 0x00000002U
#define ROGUE_CR_VDM_CONTEXT_STORE_STATUS_COMPLETE_SHIFT 0U
#define ROGUE_CR_VDM_CONTEXT_STORE_STATUS_COMPLETE_CLRMSK 0xFFFFFFFEU
#define ROGUE_CR_VDM_CONTEXT_STORE_STATUS_COMPLETE_EN 0x00000001U

/* Register ROGUE_CR_VDM_CONTEXT_STORE_TASK0 */
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK0 0x0438U
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK0_MASKFULL 0xFFFFFFFFFFFFFFFFULL
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK0_PDS_STATE1_SHIFT 32U
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK0_PDS_STATE1_CLRMSK 0x00000000FFFFFFFFULL
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK0_PDS_STATE0_SHIFT 0U
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK0_PDS_STATE0_CLRMSK 0xFFFFFFFF00000000ULL

/* Register ROGUE_CR_VDM_CONTEXT_STORE_TASK1 */
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK1 0x0440U
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK1_MASKFULL 0x00000000FFFFFFFFULL
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK1_PDS_STATE2_SHIFT 0U
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK1_PDS_STATE2_CLRMSK 0x00000000U

/* Register ROGUE_CR_VDM_CONTEXT_STORE_TASK2 */
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK2 0x0448U
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK2_MASKFULL 0xFFFFFFFFFFFFFFFFULL
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK2_STREAM_OUT2_SHIFT 32U
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK2_STREAM_OUT2_CLRMSK 0x00000000FFFFFFFFULL
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK2_STREAM_OUT1_SHIFT 0U
#define ROGUE_CR_VDM_CONTEXT_STORE_TASK2_STREAM_OUT1_CLRMSK 0xFFFFFFFF00000000ULL

/* Register ROGUE_CR_VDM_CONTEXT_RESUME_TASK0 */
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK0 0x0450U
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK0_MASKFULL 0xFFFFFFFFFFFFFFFFULL
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK0_PDS_STATE1_SHIFT 32U
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK0_PDS_STATE1_CLRMSK 0x00000000FFFFFFFFULL
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK0_PDS_STATE0_SHIFT 0U
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK0_PDS_STATE0_CLRMSK 0xFFFFFFFF00000000ULL

/* Register ROGUE_CR_VDM_CONTEXT_RESUME_TASK1 */
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK1 0x0458U
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK1_MASKFULL 0x00000000FFFFFFFFULL
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK1_PDS_STATE2_SHIFT 0U
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK1_PDS_STATE2_CLRMSK 0x00000000U

/* Register ROGUE_CR_VDM_CONTEXT_RESUME_TASK2 */
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK2 0x0460U
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK2_MASKFULL 0xFFFFFFFFFFFFFFFFULL
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK2_STREAM_OUT2_SHIFT 32U
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK2_STREAM_OUT2_CLRMSK 0x00000000FFFFFFFFULL
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK2_STREAM_OUT1_SHIFT 0U
#define ROGUE_CR_VDM_CONTEXT_RESUME_TASK2_STREAM_OUT1_CLRMSK 0xFFFFFFFF00000000ULL

/* Register ROGUE_CR_CDM_CONTEXT_STORE_STATUS */
#define ROGUE_CR_CDM_CONTEXT_STORE_STATUS 0x04A0U
#define ROGUE_CR_CDM_CONTEXT_STORE_STATUS_MASKFULL 0x0000000000000003ULL
#define ROGUE_CR_CDM_CONTEXT_STORE_STATUS_NEED_RESUME_SHIFT 1U
#define ROGUE_CR_CDM_CONTEXT_STORE_STATUS_NEED_RESUME_CLRMSK 0xFFFFFFFDU
#define ROGUE_CR_CDM_CONTEXT_STORE_STATUS_NEED_RESUME_EN 0x00000002U
#define ROGUE_CR_CDM_CONTEXT_STORE_STATUS_COMPLETE_SHIFT 0U
#define ROGUE_CR_CDM_CONTEXT_STORE_STATUS_COMPLETE_CLRMSK 0xFFFFFFFEU
#define ROGUE_CR_CDM_CONTEXT_STORE_STATUS_COMPLETE_EN 0x00000001U

/* Register ROGUE_CR_CDM_CONTEXT_PDS0 */
#define ROGUE_CR_CDM_CONTEXT_PDS0 0x04A8U
#define ROGUE_CR_CDM_CONTEXT_PDS0_MASKFULL 0xFFFFFFF0FFFFFFF0ULL
#define ROGUE_CR_CDM_CONTEXT_PDS0_DATA_ADDR_SHIFT 36U
#define ROGUE_CR_CDM_CONTEXT_PDS0_DATA_ADDR_CLRMSK 0x0000000FFFFFFFFFULL
#define ROGUE_CR_CDM_CONTEXT_PDS0_DATA_ADDR_ALIGNSHIFT 4U
#define ROGUE_CR_CDM_CONTEXT_PDS0_DATA_ADDR_ALIGNSIZE 16U
#define ROGUE_CR_CDM_CONTEXT_PDS0_CODE_ADDR_SHIFT 4U
#define ROGUE_CR_CDM_CONTEXT_PDS0_CODE_ADDR_CLRMSK 0xFFFFFFFF0000000FULL
#define ROGUE_CR_CDM_CONTEXT_PDS0_CODE_ADDR_ALIGNSHIFT 4U
#define ROGUE_CR_CDM_CONTEXT_PDS0_CODE_ADDR_ALIGNSIZE 16U

/* Register ROGUE_CR_CDM_CONTEXT_PDS1 */
#define ROGUE_CR_CDM_CONTEXT_PDS1 0x04B0U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__MASKFULL 0x000000007FFFFFFFULL
#define ROGUE_CR_CDM_CONTEXT_PDS1_MASKFULL 0x000000003FFFFFFFULL
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__PDS_SEQ_DEP_SHIFT 30U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__PDS_SEQ_DEP_CLRMSK 0xBFFFFFFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__PDS_SEQ_DEP_EN 0x40000000U
#define ROGUE_CR_CDM_CONTEXT_PDS1_PDS_SEQ_DEP_SHIFT 29U
#define ROGUE_CR_CDM_CONTEXT_PDS1_PDS_SEQ_DEP_CLRMSK 0xDFFFFFFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1_PDS_SEQ_DEP_EN 0x20000000U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__USC_SEQ_DEP_SHIFT 29U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__USC_SEQ_DEP_CLRMSK 0xDFFFFFFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__USC_SEQ_DEP_EN 0x20000000U
#define ROGUE_CR_CDM_CONTEXT_PDS1_USC_SEQ_DEP_SHIFT 28U
#define ROGUE_CR_CDM_CONTEXT_PDS1_USC_SEQ_DEP_CLRMSK 0xEFFFFFFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1_USC_SEQ_DEP_EN 0x10000000U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__TARGET_SHIFT 28U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__TARGET_CLRMSK 0xEFFFFFFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__TARGET_EN 0x10000000U
#define ROGUE_CR_CDM_CONTEXT_PDS1_TARGET_SHIFT 27U
#define ROGUE_CR_CDM_CONTEXT_PDS1_TARGET_CLRMSK 0xF7FFFFFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1_TARGET_EN 0x08000000U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__UNIFIED_SIZE_SHIFT 22U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__UNIFIED_SIZE_CLRMSK 0xF03FFFFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1_UNIFIED_SIZE_SHIFT 21U
#define ROGUE_CR_CDM_CONTEXT_PDS1_UNIFIED_SIZE_CLRMSK 0xF81FFFFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__COMMON_SHARED_SHIFT 21U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__COMMON_SHARED_CLRMSK 0xFFDFFFFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__COMMON_SHARED_EN 0x00200000U
#define ROGUE_CR_CDM_CONTEXT_PDS1_COMMON_SHARED_SHIFT 20U
#define ROGUE_CR_CDM_CONTEXT_PDS1_COMMON_SHARED_CLRMSK 0xFFEFFFFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1_COMMON_SHARED_EN 0x00100000U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__COMMON_SIZE_SHIFT 12U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__COMMON_SIZE_CLRMSK 0xFFE00FFFU
#define ROGUE_CR_CDM_CONTEXT_PDS1_COMMON_SIZE_SHIFT 11U
#define ROGUE_CR_CDM_CONTEXT_PDS1_COMMON_SIZE_CLRMSK 0xFFF007FFU
#define ROGUE_CR_CDM_CONTEXT_PDS1_TEMP_SIZE_SHIFT 7U
#define ROGUE_CR_CDM_CONTEXT_PDS1_TEMP_SIZE_CLRMSK 0xFFFFF87FU
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__TEMP_SIZE_SHIFT 7U
#define ROGUE_CR_CDM_CONTEXT_PDS1__TEMPSIZE8__TEMP_SIZE_CLRMSK 0xFFFFF07FU
#define ROGUE_CR_CDM_CONTEXT_PDS1_DATA_SIZE_SHIFT 1U
#define ROGUE_CR_CDM_CONTEXT_PDS1_DATA_SIZE_CLRMSK 0xFFFFFF81U
#define ROGUE_CR_CDM_CONTEXT_PDS1_FENCE_SHIFT 0U
#define ROGUE_CR_CDM_CONTEXT_PDS1_FENCE_CLRMSK 0xFFFFFFFEU
#define ROGUE_CR_CDM_CONTEXT_PDS1_FENCE_EN 0x00000001U

/* Register ROGUE_CR_CDM_TERMINATE_PDS */
#define ROGUE_CR_CDM_TERMINATE_PDS 0x04B8U
#define ROGUE_CR_CDM_TERMINATE_PDS_MASKFULL 0xFFFFFFF0FFFFFFF0ULL
#define ROGUE_CR_CDM_TERMINATE_PDS_DATA_ADDR_SHIFT 36U
#define ROGUE_CR_CDM_TERMINATE_PDS_DATA_ADDR_CLRMSK 0x0000000FFFFFFFFFULL
#define ROGUE_CR_CDM_TERMINATE_PDS_DATA_ADDR_ALIGNSHIFT 4U
#define ROGUE_CR_CDM_TERMINATE_PDS_DATA_ADDR_ALIGNSIZE 16U
#define ROGUE_CR_CDM_TERMINATE_PDS_CODE_ADDR_SHIFT 4U
#define ROGUE_CR_CDM_TERMINATE_PDS_CODE_ADDR_CLRMSK 0xFFFFFFFF0000000FULL
#define ROGUE_CR_CDM_TERMINATE_PDS_CODE_ADDR_ALIGNSHIFT 4U
#define ROGUE_CR_CDM_TERMINATE_PDS_CODE_ADDR_ALIGNSIZE 16U

/* Register ROGUE_CR_CDM_TERMINATE_PDS1 */
#define ROGUE_CR_CDM_TERMINATE_PDS1 0x04C0U
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__MASKFULL 0x000000007FFFFFFFULL
#define ROGUE_CR_CDM_TERMINATE_PDS1_MASKFULL 0x000000003FFFFFFFULL
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__PDS_SEQ_DEP_SHIFT 30U
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__PDS_SEQ_DEP_CLRMSK 0xBFFFFFFFU
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__PDS_SEQ_DEP_EN 0x40000000U
#define ROGUE_CR_CDM_TERMINATE_PDS1_PDS_SEQ_DEP_SHIFT 29U
#define ROGUE_CR_CDM_TERMINATE_PDS1_PDS_SEQ_DEP_CLRMSK 0xDFFFFFFFU
#define ROGUE_CR_CDM_TERMINATE_PDS1_PDS_SEQ_DEP_EN 0x20000000U
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__USC_SEQ_DEP_SHIFT 29U
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__USC_SEQ_DEP_CLRMSK 0xDFFFFFFFU
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__USC_SEQ_DEP_EN 0x20000000U
#define ROGUE_CR_CDM_TERMINATE_PDS1_USC_SEQ_DEP_SHIFT 28U
#define ROGUE_CR_CDM_TERMINATE_PDS1_USC_SEQ_DEP_CLRMSK 0xEFFFFFFFU
#define ROGUE_CR_CDM_TERMINATE_PDS1_USC_SEQ_DEP_EN 0x10000000U
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__TARGET_SHIFT 28U
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__TARGET_CLRMSK 0xEFFFFFFFU
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__TARGET_EN 0x10000000U
#define ROGUE_CR_CDM_TERMINATE_PDS1_TARGET_SHIFT 27U
#define ROGUE_CR_CDM_TERMINATE_PDS1_TARGET_CLRMSK 0xF7FFFFFFU
#define ROGUE_CR_CDM_TERMINATE_PDS1_TARGET_EN 0x08000000U
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__UNIFIED_SIZE_SHIFT 22U
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__UNIFIED_SIZE_CLRMSK 0xF03FFFFFU
#define ROGUE_CR_CDM_TERMINATE_PDS1_UNIFIED_SIZE_SHIFT 21U
#define ROGUE_CR_CDM_TERMINATE_PDS1_UNIFIED_SIZE_CLRMSK 0xF81FFFFFU
#define ROGUE_CR_CDM_TERMINATE_PDS1__TEMPSIZE8__COMMON_SHARED_SHIFT 21U
--> --------------------

--> maximum size reached

--> --------------------