// SPDX-License-Identifier: GPL-2.0-only // Copyright (C) 2014 Broadcom Corporation #include <linux/kernel.h>#include <linux/err.h>#include <linux/clk-provider.h>#include <linux/io.h>#include <linux/of.h>#include <linux/clkdev.h>#include <linux/of_address.h>#include <linux/delay.h>#include <dt-bindings/clock/bcm-cygnus.h>#include "clk-iproc.h" #define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, }#define AON_VAL(o, pw, ps, is) { .offset = o, .pwr_width = pw, \#define SW_CTRL_VAL(o, s) { .offset = o, .shift = s, }#define ASIU_DIV_VAL(o, es, hs, hw, ls, lw) \#define RESET_VAL(o, rs, prs) { .offset = o, .reset_shift = rs, \#define DF_VAL(o, kis, kiw, kps, kpw, kas, kaw) { .offset = o, .ki_shift = kis,\#define VCO_CTRL_VAL(uo, lo) { .u_offset = uo, .l_offset = lo }#define ENABLE_VAL(o, es, hs, bs) { .offset = o, .enable_shift = es, \#define ASIU_GATE_VAL(o, es) { .offset = o, .en_shift = es }static void __init cygnus_armpll_init(struct device_node *node)"brcm,cygnus-armpll" , cygnus_armpll_init);static const struct iproc_pll_ctrl genpll = {0 x0, 2 , 1 , 0 ),0 x0, 11 , 10 ),0 x0, 4 , 3 , 0 , 4 , 7 , 3 ),0 x10, 31 ),0 x10, 20 , 10 ),0 x10, 0 , 20 ),0 x14, 0 , 4 ),0 x18, 0 x1c),0 x28, 12 , 1 ),static const struct iproc_clk_ctrl genpll_clk[] = {0 x4, 6 , 0 , 12 ),0 x20, 0 , 8 ),0 x4, 7 , 1 , 13 ),0 x20, 10 , 8 ),0 x4, 8 , 2 , 14 ),0 x20, 20 , 8 ),0 x4, 9 , 3 , 15 ),0 x24, 0 , 8 ),0 x4, 10 , 4 , 16 ),0 x24, 10 , 8 ),0 x4, 11 , 5 , 17 ),0 x24, 20 , 8 ),static void __init cygnus_genpll_clk_init(struct device_node *node)0 , genpll_clk,"brcm,cygnus-genpll" , cygnus_genpll_clk_init);static const struct iproc_pll_ctrl lcpll0 = {0 x0, 2 , 5 , 4 ),0 x0, 31 , 30 ),0 x0, 27 , 3 , 23 , 4 , 19 , 4 ),0 x4, 31 ),0 x4, 16 , 10 ),0 x4, 26 , 4 ),0 x10, 0 x14),0 x18, 12 , 1 ),static const struct iproc_clk_ctrl lcpll0_clk[] = {0 x0, 7 , 1 , 13 ),0 x8, 0 , 8 ),0 x0, 8 , 2 , 14 ),0 x8, 10 , 8 ),0 x0, 9 , 3 , 15 ),0 x8, 20 , 8 ),0 x0, 10 , 4 , 16 ),0 xc, 0 , 8 ),0 x0, 11 , 5 , 17 ),0 xc, 10 , 8 ),0 x0, 12 , 6 , 18 ),0 xc, 20 , 8 ),static void __init cygnus_lcpll0_clk_init(struct device_node *node)0 , lcpll0_clk,"brcm,cygnus-lcpll0" , cygnus_lcpll0_clk_init);/* * MIPI PLL VCO frequency parameter table static const struct iproc_pll_vco_param mipipll_vco_params[] = {/* rate (Hz) ndiv_int ndiv_frac pdiv */ 750000000 UL, 30 , 0 , 1 },1000000000 UL, 40 , 0 , 1 },1350000000 ul, 54 , 0 , 1 },2000000000 UL, 80 , 0 , 1 },2100000000 UL, 84 , 0 , 1 },2250000000 UL, 90 , 0 , 1 },2500000000 UL, 100 , 0 , 1 },2700000000 UL, 54 , 0 , 0 },2975000000 UL, 119 , 0 , 1 },3100000000 UL, 124 , 0 , 1 },3150000000 UL, 126 , 0 , 1 },static const struct iproc_pll_ctrl mipipll = {0 x0, 4 , 17 , 16 ),0 x0, 3 ),0 x0, 11 , 10 ),0 x0, 4 , 3 , 0 , 4 , 7 , 4 ),0 x10, 20 , 10 ),0 x10, 0 , 20 ),0 x14, 0 , 4 ),0 x18, 0 x1c),0 x28, 12 , 1 ),static const struct iproc_clk_ctrl mipipll_clk[] = {0 x4, 12 , 6 , 18 ),0 x20, 0 , 8 ),0 x4, 13 , 7 , 19 ),0 x20, 10 , 8 ),0 x4, 14 , 8 , 20 ),0 x20, 20 , 8 ),0 x4, 15 , 9 , 21 ),0 x24, 0 , 8 ),0 x4, 16 , 10 , 22 ),0 x24, 10 , 8 ),0 x4, 17 , 11 , 23 ),0 x24, 20 , 8 ),static void __init cygnus_mipipll_clk_init(struct device_node *node)"brcm,cygnus-mipipll" , cygnus_mipipll_clk_init);static const struct iproc_asiu_div asiu_div[] = {0 x0, 31 , 16 , 10 , 0 , 10 ),0 x4, 31 , 16 , 10 , 0 , 10 ),0 x8, 31 , 16 , 10 , 0 , 10 ),static const struct iproc_asiu_gate asiu_gate[] = {0 x0, 7 ),0 x0, 9 ),0 ),static void __init cygnus_asiu_init(struct device_node *node)"brcm,cygnus-asiu-clk" , cygnus_asiu_init);static const struct iproc_pll_ctrl audiopll = {0 x5c, 0 , 1 ),0 x48, 0 , 3 , 6 , 4 , 3 , 3 ),0 x4, 0 ),0 x8, 0 , 10 ),0 x8, 10 , 20 ),0 x44, 0 , 4 ),0 x0c, 0 x10),0 x54, 0 , 1 ),0 x0, 0 , 3 ),static const struct iproc_clk_ctrl audiopll_clk[] = {0 x14, 8 , 10 , 9 ),0 x14, 0 , 8 ),0 x18, 8 , 10 , 9 ),0 x18, 0 , 8 ),0 x1c, 8 , 10 , 9 ),0 x1c, 0 , 8 ),static void __init cygnus_audiopll_clk_init(struct device_node *node)0 ,"brcm,cygnus-audiopll" ,
Messung V0.5 in Prozent C=96 H=90 G=93
¤ Dauer der Verarbeitung: 0.12 Sekunden
(vorverarbeitet am 2026-06-07)
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