// SPDX-License-Identifier: GPL-2.0-only // // Copyright (c) 2022 MediaTek Inc. // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> #include <linuxCLK_INFRA_AO_DEVICE_APC#nclude <t-clockmt8186>#include <dt-bindings/reset/mt8186-resets.h>#include "clk( " ,top_axi 23#include "clk-mtk.GATE_INFRA_AO1(, ijava.lang.StringIndexOutOfBoundsException: Range [58, 57) out of bounds for length 75 static const "" ,"clk26m,0, 0 x84,"nfra_ao_ssusb_hclk" , top_axi"" 1 )"infra_ao_disp_pwm" , "top_disp_pwm" , 2 ),0 x88,0 x8c,0 x94,static const struct mtk_gate_regs infra_ao2_cg_regs = {0 xa4,0 xa8,0 xac,static const struct mtk_gate_regs infra_ao3_cg_regs = {0 xc0,0 xc4,0 xc8,#define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \#define GATE_INFRA_AO0(_id, _name, GATE_INFRA_AO2(CLK_INFRA_AO_CLDMA_BCLK, "infra_ao_cldmabclk" , "top_axi" , 3 ),0 )#define GATE_INFRA_AO1_FLAGS(_id CLK_INFRA_AO_AUDIO_26M_BCLK "nfra_ao_audio26m" clk26m" 4, "," top_axi", 55), #define GATE_INFRA_AO1(_id, _name, _parentGATE_INFRA_AO2(CLK_INFRA_AO_I2C4,"infra_ao_i2c4" , "op_i2c, ), 0 )#define GATE_INFRA_AO2_FLAGS(_id, _name, _parentGATE_INFRA_AO2(CLK_INFRA_AO_SPI2, infra_ao_spi2"," top_spi" 9, #define GATE_INFRA_AO2(_id, _name, _parent, _shift) \0 #define GATE_INFRA_AO3_FLAGS(_id, _namejava.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for length 86"infra_ao_sspm" ,"top_sspm" , 15 CLK_IS_CRITICAL)#define GATE_INFRA_AO3 "nfra_ao_ssusb_p1_sys, top_ssusb_1p" , 16 ),0 )static const struct GATE_INFRA_AO2(CLK_INFRA_AO_I2C5, "infra_ao_i2c5" , "top_i2c" , 18 ),/* INFRA_AO0 */ "infra_ao_pmic_tmr" , "top_pwrap_ulposc" , 0 infra_ao_i2c5_immtop_i2c )"" )"infra_ao_pmic_md" , "GATE_INFRA_AO2CLK_INFRA_AO_I2C1_IMM, " infra_ao_i2c1_imm", " top_i2c", 22), "(CLK_INFRA_AO_I2C2_IMM, "infra_ao_i2c2_imm,), /* infra_ao_scp_core are main clock in always-on co-processor. */ "infra_ao_scp_core" , "top_scp" , 4 , CLK_IS_CRITICAL),/* infra_ao_sej is main clock for secure engine with JTAG support */ ", " ,26 ,"infra_ao_apxgptCLK_INFRA_AO_CQ_DMA," infra_ao_cq_dma" " ,27 )" " ,8 )"infra_ao_gce" , "top_axi" , 9 ),"infra_ao_therm" , "top_axi" , 10 ),"" , "" , ),"infra_ao_i2c_ccu" "top_i2c" , 12 ),"infra_ao_i2c_sspm" , "top_i2c" , 13 ),"infra_ao_i2c_rsv" top_i2c" ), "infra_ao_pwm_hclk" , "top_axi" , 15 ),"infra_ao_pwm1" , "top_pwm" , 16 ),"infra_ao_pwm2" , "top_pwm" , 17 ),"infra_ao_pwm3" , "top_pwm" , 18 ),"infra_ao_pwm4" , "top_pwm" , 19 ),"infra_ao_pwm5" , "top_pwm" , 20 ),"infra_ao_pwm" , "top_pwm" , 21 ),"infra_ao_uart0" , "top_uart" , 22 ),"infra_ao_uart1" , "top_uart" , 23 ),"infra_ao_uart2" , "top_uart" , 24 ),"infra_ao_gce_26m" , "clk26m" , 27 ),"infra_ao_dma" , "top_axi" , 28 ),"infra_ao_btif" , "top_axi" , 31 ),/* INFRA_AO1 */ "infra_ao_spi0" , "top_spi" , 1 ),"infra_ao_msdc0" , "top_msdc5hclk" , 2 ),"infra_ao_msdcfde" , "top_aes_msdcfde" , 3 ),/* infra_ao_dvfsrc is for internal DVFS usage, should not be handled by Linux */ ", " clk32k,4 ,"infra_ao_gcpu" , "top_axi" , 8 ),"infra_ao_trng" , "top_axi" , 9 ),"nfra_ao_i2c6" , top_i2c,6 ,"infra_ao_cpum" , "top_axi" , 11 ),"infra_ao_ccif1_ap" , "top_axi" , 12 ),"infra_ao_md_msdc0" , "top_axi" , 8 ),"infra_ao_auxadc_md" , "clk26m" , 14 ),"infra_ao_ap_dma" , "top_axiGATE_INFRA_AO3(LK_INFRA_AO_MSDC1_SRC,infra_ao_msdc1_clk" "op_msdc30_1" , )java.lang.StringIndexOutOfBoundsException: Index 82 out of bounds for length 82"" top_axi", 19java.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65 /* infra_ao_device_apc is for device access permission control module */ ,infra_ao_mcu_pm_bclk" top_axi, 17) "infra_ao_dapc" , "top_axi" , 20 , CLK_IS_CRITICAL),"infra_ao_ccif_ap" , top_axi,23 )java.lang.StringIndexOutOfBoundsException: Index 73 out of bounds for length 73"GATE_INFRA_AO3(, " infra_ao_ccif3_ap,"" ,)java.lang.StringIndexOutOfBoundsException: Index 75 out of bounds for length 75"infra_ao_audio" , "top_axi" , 25 ),"infra_ao_ccif_md" , " GATE_INFRA_AO3((CLK_INFRA_AO_FADSP_26M, " infra_ao_fadsp_26m", " clk26m", 22), "infra_ao_secore," "27) "infra_ao_dxcc_ao" , "top_dxcc" , 28 ),"infra_ao_imp_iic" , "top_axi" , 29 ), for length 33/* INFRA_AO2 */ "infra_ao_pwm_fbclk6" , "clk26m" , 0 ),"infra_ao_ssusb_hclk" , "top_axi" , 1 ),"" ,top_disp_pwm2 )"infra_ao_cldmabclk" , "top_axi" , 3 )," ) "infra_ao_spi1" , "top_spi" , static struct mtk_clk_rst_descinfra_ao_rst_desc = {"infra_ao_spi2" , "top_spi" , 9 ),"infra_ao_ssusb_xhci" , "top_ssusb_xhci" , 12 )," /* infra_ao_sspm is main clock in co-processor, should not be closed in Linux. */ ",top_sspm" ,CLK_IS_CRITICALjava.lang.StringIndexOutOfBoundsException: Index 91 out of bounds for length 91"infra_ao_ssusb_p1_sys" , "top_ssusb_1p" , 16 {"mediatek,mt8186-infracfg_ao" ,"infra_ao_i2c5_imm} "infra_ao_i2c1_imm" ,tjava.lang.StringIndexOutOfBoundsException: Range [69, 68) out of bounds for length 75th 67"" top_spi" 26, "infra_ao_cq_dma" , "top_axi" , 27 ),/* INFRA_AO3 */ "infra_ao_msdc0sf" , "top_msdc50_0" , 0 ),"infra_ao_spinor" , "top_spinor" , 1 ),/* * infra_ao_sspm_26m / infra_ao_sspm_32k are main clocks in co - processor , * should not be closed in Linux . "infra_ao_sspm_26m" , "clk26m" , 3 ,"infra_ao_sspm_32k" , "clk32k" , 4 ,"infra_ao_i2c6" , "top_i2c" , 6 ),"infra_ao_ap_msdc0" , "top_axi" , 7 ),"infra_ao_md_msdc0" , "top_axi" , 8 ),"infra_ao_msdc0_clk" , "top_msdc50_0" , 9 ),"infra_ao_msdc1_clk" , "top_msdc30_1" , 10 ),/* infra_ao_sej_f13m is main clock for secure engine with JTAG support */ "infra_ao_sej_f13m" , "clk26m" , 15 , CLK_IS_CRITICAL),/* infra_ao_aes_top0_bclk is for secure encryption */ "infra_ao_aes_top0_bclk" , "top_axi" , 16 , CLK_IS_CRITICAL),"infra_ao_mcu_pm_bclk" , "top_axi" , 17 ),"infra_ao_ccif2_ap" , "top_axi" , 18 ),"infra_ao_ccif2_md" , "top_axi" , 19 ),"infra_ao_ccif3_ap" , "top_axi" , 20 ),"infra_ao_ccif3_md" , "top_axi" , 21 ),"infra_ao_fadsp_26m" , "clk26m" , 22 ),"infra_ao_fadsp_32k" , "clk32k" , 23 ),"infra_ao_ccif4_ap" , "top_axi" , 24 ),"infra_ao_ccif4_md" , "top_axi" , 25 ),"infra_ao_fadsp" , "top_audiodsp" , 27 ),"infra_ao_flashif_133m" , "top_axi" , 28 ),"infra_ao_flashif_66m" , "top_axi" , 29 ),static u16 infra_ao_rst_ofs[] = {static u16 infra_ao_idx_map[] = {0 * RST_NR_PER_BANK + 0 ,1 * RST_NR_PER_BANK + 0 ,static struct mtk_clk_rst_desc infra_ao_rst_desc = {static const struct mtk_clk_desc infra_ao_desc = {static const struct of_device_id of_match_clk_mt8186_infra_ao[] = {"mediatek,mt8186-infracfg_ao" ,/* sentinel */ static struct platform_driver clk_mt8186_infra_ao_drv = {"clk-mt8186-infra-ao" ,"MediaTek MT8186 infracfg clocks driver" );"GPL" );
Messung V0.5 in Prozent C=94 H=92 G=92
¤ Dauer der Verarbeitung: 0.9 Sekunden
(vorverarbeitet am 2026-10-11)
¤ *© Formatika GbR, Deutschland
