/* * This clock is used during CPU cluster setup while setting up CPU PLLs. * Add hardware mandated delay to make sure that the sys_apcs_aux clock * is stable (after setting the divider) before continuing * bootstrapping to keep CPUs from ending up in a weird state.
*/
udelay(5);
/* * As this clocks is a parent of the CPU cluster clocks and is actually * used as a parent during CPU clocks setup, we want for it to register * as early as possible, without letting fw_devlink to delay probing of * either of the drivers. * * The sys_apcs_aux is a child (divider) of gpll0, but we register it * as a fixed rate clock instead to ease bootstrapping procedure. By * doing this we make sure that CPU cluster clocks are able to be setup * early during the boot process (as it is recommended by Qualcomm).
*/
hw = devm_clk_hw_register_fixed_rate(dev, "sys_apcs_aux", NULL, 0, 300000000); if (IS_ERR(hw)) return PTR_ERR(hw);
/* Register early enough to fix the clock to be used for other cores */ staticint __init qcom_apcs_msm8996_clk_init(void)
{ return platform_driver_register(&qcom_apcs_msm8996_clk_driver);
}
postcore_initcall(qcom_apcs_msm8996_clk_init);
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