/* Check that the block allocated for the cache is large enough */
list_for_each_entry(ctl, &dsp->ctl_list, list)
KUNIT_EXPECT_GE(test, ksize(ctl->cache), ctl->len);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
get_random_bytes(reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Create an identical control in each firmware but with different alg id */ for (i = 0; i < ARRAY_SIZE(builder); i++) {
builder[i] = _create_dummy_wmfw(test);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, builder[i]);
/* Create an identical control in each firmware but with different alg id */ for (i = 0; i < ARRAY_SIZE(builder); i++) {
builder[i] = _create_dummy_wmfw(test);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, builder[i]);
/* Create controls identical except for algorithm */ for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
cs_dsp_ctl_cache_test_algs[i].id, "dummyalg", NULL);
cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
}
/* Create random content in the registers backing each control */ for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
alg_base_words = _get_alg_mem_base_words(test, i, def.mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, def.mem_type);
reg += (alg_base_words + def.offset_dsp_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, reg_vals[i], def.length_bytes);
}
/* Create random content in the registers backing each control */
alg_base_words = _get_alg_mem_base_words(test, 0, def.mem_type);
alg_base_reg = cs_dsp_mock_base_addr_for_mem(priv, def.mem_type);
alg_base_reg += alg_base_words * cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
get_random_bytes(reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the data from the control cache */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
get_random_bytes(reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Start and stop the firmware */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
cs_dsp_stop(dsp);
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the data from the control cache */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
get_random_bytes(reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the data from the control cache */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
get_random_bytes(reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Start and stop the firmware then power-down */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
cs_dsp_stop(dsp);
cs_dsp_power_down(dsp);
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the data from the control cache */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
get_random_bytes(reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Power-down DSP then power-up with a different firmware */
cs_dsp_power_down(dsp);
wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the data from the control cache */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
get_random_bytes(reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Power-up with a different firmware and run it */
wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the data from the control cache */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create data in the registers backing the control */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
get_random_bytes(init_reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, init_reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Control should readback the origin data from its cache */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, init_reg_vals, param->len_bytes);
/* Stop and power-down the DSP */
kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
cs_dsp_power_down(dsp);
/* Control should readback from the cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, init_reg_vals, param->len_bytes);
}
/* Zero-fill the registers backing the control */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, init_reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = 0;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Change the values in the registers backing the control */
get_random_bytes(new_reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, new_reg_vals, param->len_bytes);
/* Control should readback the new data from the registers */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, new_reg_vals, param->len_bytes);
/* Stop and power-down the DSP */
kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
cs_dsp_power_down(dsp);
/* Change the values in the registers backing the control */
regmap_raw_write(dsp->regmap, reg, init_reg_vals, param->len_bytes);
/* Control should readback from the cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, new_reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
memset(reg_vals, 0, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Start the firmware and add an action to stop it during cleanup */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
/* Write new data to the control, it should be written to the registers */
get_random_bytes(reg_vals, param->len_bytes);
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes), 1);
KUNIT_ASSERT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
get_random_bytes(reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Start the firmware and add an action to stop it during cleanup */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
get_random_bytes(reg_vals, param->len_bytes);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Write new data to the control, it should not be written to the registers */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
/* Registers should not have been written so regmap cache should still be clean */
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Start and stop the firmware */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
cs_dsp_stop(dsp);
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Write new data to the control, it should not be written to the registers */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
/* Registers should not have been written so regmap cache should still be clean */
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Write new data to the control, it should not be written to the registers */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
/* Registers should not have been written so regmap cache should still be clean */
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Start and stop the firmware then power-down */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
cs_dsp_stop(dsp);
cs_dsp_power_down(dsp);
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Write new data to the control, it should not be written to the registers */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
/* Registers should not have been written so regmap cache should still be clean */
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Get the control */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
/* Power-down DSP then power-up with a different firmware */
cs_dsp_power_down(dsp);
wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
/* Control from unloaded firmware should be disabled */
KUNIT_EXPECT_FALSE(test, ctl->enabled);
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Registers should not have been written so regmap cache should still be clean */
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Get the control */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
/* Power-up with a different firmware and run it */
wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
/* Control from unloaded firmware should be disabled */
KUNIT_EXPECT_FALSE(test, ctl->enabled);
/* Drop expected writes and the regmap cache should be clean */
cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Registers should not have been written so regmap cache should still be clean */
KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Write new data to the control, it should not be written to the registers */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
/* Start the firmware and the cached data should be written to registers */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Zero-fill the registers backing the control */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Stop firmware and zero the registers backing the control */
kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
KUNIT_ASSERT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, init_vals, param->len_bytes);
/* Start the firmware and the cached data should be written to registers */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Start and stop the firmware */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
cs_dsp_stop(dsp);
/* Write new data to the control, it should not be written to the registers */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
/* Start the firmware and the cached data should be written to registers */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Create some DSP data to be read into the control cache */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Get the control */
ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
KUNIT_ASSERT_NOT_NULL(test, ctl);
/* Power-down DSP then power-up with a different firmware */
cs_dsp_power_down(dsp);
wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
/* Write new data to the control, it should not be written to the registers */
get_random_bytes(reg_vals, param->len_bytes);
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes), 1);
/* Power-down DSP then power-up with the original firmware */
cs_dsp_power_down(dsp);
wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
/* Start the firmware and the cached data should be written to registers */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
}
/* Zero-fill the registers backing the control */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Start the firmware and the cached data should be written to registers */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
/* Stop the firmware and reset the registers */
kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
/* Start the firmware again and the cached data should be written to registers */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
}
/* Zero-fill the registers backing the control */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Start the firmware and the cached data should be written to registers */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
/* Stop the firmware and power-down the DSP */
kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
cs_dsp_power_down(dsp);
/* Reset the registers */
regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
/* Download the firmware again, the cache content should not change */
KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
/* Start the firmware and the cached data should be written to registers */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
}
/* Zero-fill the registers backing the control */
alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
reg += (alg_base_words + param->offs_words) *
cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
/* Create control pointing to this data */
def.flags = param->flags;
def.mem_type = param->mem_type;
def.offset_dsp_words = param->offs_words;
def.length_bytes = param->len_bytes;
/* Start the firmware and the cached data should be written to registers */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
/* Stop the firmware and power-down the DSP */
kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
cs_dsp_power_down(dsp);
/* Reset the registers */
regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
/* Download and run a different firmware */
wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
cs_dsp_power_down(dsp);
/* Reset the registers */
regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
/* Download the original firmware again */
wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
KUNIT_EXPECT_TRUE(test, ctl->set);
/* Start the firmware and the cached data should be written to registers */
KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
/* Control should readback the new data from the control cache */
KUNIT_EXPECT_EQ(test,
cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes), 0);
KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
}
switch (dsp->type) { case WMFW_ADSP2:
ret = cs_dsp_adsp2_init(dsp); break; case WMFW_HALO:
ret = cs_dsp_halo_init(dsp); break; default:
KUNIT_FAIL(test, "Untested DSP type %d\n", dsp->type); return -EINVAL;
}
if (ret) return ret;
/* Automatically call cs_dsp_remove() when test case ends */ return kunit_add_action_or_reset(priv->test, _cs_dsp_remove_wrapper, dsp);
}
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