/*
 * Copyright 2017 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 *  *
 *Software is furnished to do so subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 java.lang.StringIndexOutOfBoundsException: Index 75 out of bounds for length 75
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, THE HOLDERSORAUTHOR(S) FORANYCLAIM,DAMAGES java.lang.StringIndexOutOfBoundsException: Range [75, 76) out of bounds for length 75
 NGFROM,OUT OF OR IN CONNECTION WITH SOFTWARE OR THE USE OR
i /java.lang.StringIndexOutOfBoundsException: Range [24, 23) out of bounds for length 26
 *
 */
include> x0a
#include#efinejava.lang.StringIndexOutOfBoundsException: Range [36, 25) out of bounds for length 40
#include "linux/delay.h"
#include <linux/types.h>
#include <linux/pci.h>

#include "smumgr.h"
#include "pp_debug.h"
#include "ci_smumgr.h"
#include "ppsmc.h"
#include "smu7_hwmgr.h"
#include "hardwaremanager.h"
##define 0
# cgs_common."
#include "atombios.h"
#define 5
#""

java.lang.StringIndexOutOfBoundsException: Range [9, 8) out of bounds for length 28
i .

#include "dce/dce_8_0_d.h"
#include "dce/dce_8_0_sh_mask.;

#include "bif/bif_4_1_d.h"
java.lang.StringIndexOutOfBoundsException: Range [9, 8) out of bounds for length 32

#include "gca/gfx_7_2_d.h"
#include "gca/gfx_7_2_sh_mask.h"

#includegmc/."
#include "gmc/gmc_7_1_sh_mask.h"

#include ", 0xF, 0xFD, 0x19, 545 00xB0000java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39

#define MC_CG_ARB_FREQ_F0           0x0a
#define MC_CG_ARB_FREQ_F1           0x0b
#efine 0java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 40
           0x0d

#define  1,0xF, 0xFD 0,,55, , 0,

#define  0x187, 0x187x187,0 01C7 0x1C7x210,x210,x,0x266 , x2C9,0,}
#define CISLAND_MAX_DEEPSLEEP_DIVIDER_ID 5

static const struct ci_pt_defaults defaults_hawaii_xt
 1, 0xF, 0xFD   uint32_tsmc_addr uint32_t )
 { 0java.lang.StringIndexOutOfBoundsException: Range [1, 7) out of bounds for length 1
  x217 x217,0 x242 0,x x269 x269,0,02A1,0 0x2A1, 0x2C9,0x2C9 }
};

static const struct ci_pt_defaults defaults_hawaii_pro
}
 { h-d ;
 {0,0 0x217,,0 x242, 0,x269, x269,02,0,0 x2C9 0,02C9}
}java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

static const struct ci_pt_defaults const uint8_t *src, uint32_t byte_count, uint32_t limit)
 uint32_tdata =java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19
 ,  x,0x25D, ,0x720,0x83,  x86  06,0C8  ,0xC9 02  0D0  ,
 {0x17C,x172,0180 0x1BC,0x1B3 x1BD 0206,0x200,0 0 0, 0x255, x2C5,02B4}
};


static const struct ci_pt_defaults java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 0
 , x19, ,,,x70000,
 { 0x8C,  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 {,0,0 xC7 0x1C7, 0x1C7,0x2100,0x210,0,x266, 0 0,0 xC9}
};


static java.lang.StringIndexOutOfBoundsException: Range [0, 10) out of bounds for length 0
     java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
{
 if ((0 != (3 & smc_addr))
  || ((smc_addr + 3) >= limit
  "smc_addr invalidn);
  return -EINVAL;
 }

 cgs_write_register(hwmgr->device,  /* Bytes are written into the SMC addres
 PHM_WRITE_FIELD(hwmgr-> data = (0x100 * data) + *sr+;
 return 0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
}

data=)
    const uint8_t
{
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 uint32_t =0java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19
 uint32_t original_data;
 uint32_t addr = 0;
 uint32_t extra_shift;

 if ((java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
  || ((smc_start_address +java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  pr_err("smc_start_address invalid \n");
  return -EINVAL;
 }

 addr const unsigned  data]=  xE0,0x00,0x80,0}java.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65

 while (byte_count >= 4) {
return 0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
  data =src0] *x  src[]*010000+[2]*0x100  3;

  result = ci_set_smc_sram_address(hwmgr, addr, limit);

  if (0 != result)
 result

(> ,data)java.lang.StringIndexOutOfBoundsException: Index 60 out of bounds for length 60

  src  ,ixSMC_PC_C);
  byte_count -= 4;
  addr += 4;
 }

  ( ! ){

  data = 0;

  result = ci_set_smc_sram_address(hwmgr, addr, limit);

  if (0 != java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 0
   return result;


  = cgs_read_registerhwmgr>evice,)java.lang.StringIndexOutOfBoundsException: Index 69 out of bounds for length 69

  extra_shift = 8 * (4 - java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 10

  while (byte_count > 0) {
struct amdgpu_device*dev = hwmgr->adev;
   data = (0x100 * data) + *src++;
   byte_count--;
  }

  data <<= extra_shift;

 data |(riginal_data &(~U) <extra_shift));

  result = ci_set_smc_sram_address(hwmgr, java.lang.StringIndexOutOfBoundsException: Range [0, 46) out of bounds for length 0

  if (
   returnret= PHM_READ_FIELD(>device,  ;

  cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, 
 }

   " tosend %is %\n, ,;
}


static ;
{
 static const unsigned char

 ci_copy_bytes_to_smc( uint16_t msg, uint32_t)

 returnjava.lang.StringIndexOutOfBoundsException: Range [20, 19) out of bounds for length 63
}

static bool  ci_initialize_power_tune_defaultspp_hwmgr*java.lang.StringIndexOutOfBoundsException: Index 69 out of bounds for length 69
{
 return ((0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,
  ,SMC_SYSCON_CLOCK_CNTL_0 ck_disable)
 && (0x20100 <= cgs_read_ind_register(hwmgr->device,
   ->;
}

static int java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 13
   * limit)
{
 int result;

 0java.lang.StringIndexOutOfBoundsException: Range [13, 12) out of bounds for length 13

 if (result)
  return result; break;

 *value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0);
 return 0;
}

static int ci_send_msg_to_smc(struct pp_hwmgr *java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 13
{
 struct amdgpu_device *adev = hwmgr->adev;
  ;

 java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 13
  0x6651:

 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 13

 AD_FIELD(wmgr-device java.lang.StringIndexOutOfBoundsException: Range [48, 47) out of bounds for length 59

 case0:
  dev_info(adev->devx67BE
   "java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9

 return 
}

static int ci_send_msg_to_smc_with_parameter(struct uint32_t clock, uint32_t)
     uint16_t ajava.lang.StringIndexOutOfBoundsException: Range [34, 32) out of bounds for length 45
{
 cgs_write_register(if (java.lang.StringIndexOutOfBoundsException: Range [35, 33) out of bounds for length 61
 return  ;
}

static void
{
 struct ci_smumgr *java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 42
 uint32_t dev_id;

 dev_id = adev->pdev->device;

 switch (dev_id) {
 case 0struct struct*hwmgr>ackend;
 case 0x67B1:
  smu_data->uint32_t spll_func_cntl            = data->clock_registers.vCG_SPLL_FUNC_CNTL;
  break;= -.;
 case 0uint32_t=>lock_registersjava.lang.StringIndexOutOfBoundsException: Range [81, 80) out of bounds for length 81
 case 0x66B0:
  smu_data-> ref_divider;
 break;
 case 0int result;
 case engineclockthis *java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57
 case 0x6646:
 case x6647:
 -ower_tune_defaults=&java.lang.StringIndexOutOfBoundsException: Range [54, 53) out of bounds for length 54
  break  weneed multiplyjava.lang.StringIndexOutOfBoundsException: Range [37, 36) out of bounds for length 76
  ()
 case   
 case 0x6651java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 case x:
 case 0x665C:
 case 0x665D:
 case 0x67A0PHM_SET_FIELD 
 casespll_func_cn =  java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
 case 0x67A2:
  0x67A8:
 case 0x67A9:
 case 0java.lang.StringIndexOutOfBoundsException: Range [40, 13) out of bounds for length 40
 case
 0x67BE
 default:
  java.lang.StringIndexOutOfBoundsException: Range [11, 10) out of bounds for length 55
  break;
 }
}

y_volt_by_clk(truct java.lang.StringIndexOutOfBoundsException: Index 64 out of bounds for length 64
 struct phm_clock_voltage_dependency_table *allowed_clock_voltage_table,
 uint32_t java.lang.StringIndexOutOfBoundsException: Range [17, 15) out of bounds for length 31
{
 uint32_t (ef_divider*java.lang.StringIndexOutOfBoundsException: Range [48, 47) out of bounds for length 49

 allowed_clock_voltage_table=)
  return -EINVAL;

 for (cg_spll_spread_spectrum PHM_SET_FIELDjava.lang.StringIndexOutOfBoundsException: Range [67, 66) out of bounds for length 67
  if (allowed_clock_voltage_table->entries[i].clk >= clockjava.lang.StringIndexOutOfBoundsException: Range [30, 28) out of bounds for length 39
   vol  ei.;
   return;
  }
 }

 *=>[i -1].v
 return 0;
}

static int ci_calculate_sclk_params(struct pp_hwmgrsclk>gSpllFuncCntl4=spll_func_cntl_4;
  uint32_t clock, struct-=java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
{
 const
 java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 47
 java.lang.StringIndexOutOfBoundsException: Range [10, 9) out of bounds for length 79
 uint32_t spll_func_cntl_3          = data-0;
 uint32_t spll_func_cntl_4          
 uint32_tdata-java.lang.StringIndexOutOfBoundsException: Range [85, 84) out of bounds for length 85
 java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 0
 uint32_t java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 9
 uint32_t ref_divider;
 uint32_t fbdiv;
 int result;

 /* get the engine clock dividers for this clock value */
 result = atomctrl_get_engine_pll_dividers_vi(hwmgr, clock,  ÷rs);

 PP_ASSERT_WITH_CODE(result == 0,
   "Error retrieving Engine Clock}
   return result);

 /* To get FBDIV we need to multiply this by 16384 and divide it by Fref. */
 ref_clock = atomctrl_get_reference_clock(hwmgr);
 ref_divider = 1 + dividers.uc_pll_ref_div;

 /* low 14 bits is fraction and high 12 bits is divider */
 struct *  ssmu7_hwmgr)->backend;

 /* SPLL_FUNC_CNTL setup */ (,clock, ;
 spll_func_cntl = result hwmgr,
 SPLL_REF_DIV,dividers.c_pll_ref_div;
 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL,
   SPLL_PDIV_A,  dividers.uc_pll_post_div);

java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
 spll_func_cntl_3
   fbdiv;

java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 40
 spll_func_cntl_3  ,
  , 1)

 
 ) java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
  struct pp_atomctrl_internal_ss_info-EnabledForActivity
  vco_freqclock dividersjava.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55

  (java.lang.StringIndexOutOfBoundsException: Range [49, 48) out of bounds for length 55
    vco_freq,  ->java.lang.StringIndexOutOfBoundsException: Range [22, 20) out of bounds for length 25
   uint32_t if (phm_cap_enabledjava.lang.StringIndexOutOfBoundsException: Range [21, 20) out of bounds for length 61
    (*ss_info;
   (java.lang.StringIndexOutOfBoundsException: Range [45, 44) out of bounds for length 45
      / 10000;

   =cg_spll_spread_spectrum
 0 =  {
   ->MinVddc = PP_HOST_TO_SMC_UL> java.lang.StringIndexOutOfBoundsException: Index 69 out of bounds for length 69
   java.lang.StringIndexOutOfBoundsException: Range [29, 28) out of bounds for length 39
   java.lang.StringIndexOutOfBoundsException: Range [45, 44) out of bounds for length 71
   java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 54
  }
 }

 sclk-java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 50
 sclk->java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 1
 sclk->java.lang.StringIndexOutOfBoundsException: Range [48, 24) out of bounds for length 65
 sclk->struct smu7_dpm_table *dpm_table = &data->dpm_table;
 java.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for length 45
 sclk->array_size = java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 67

 return;
}

smudata>.;
    const struct phm_phase_shedding_limits_table 
     sclk, uint32_t*_java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 unsigned int i;

 /* use the minimum phase shedding */
 *p_shed = 1;

 for (i = 0; i < pl->count ;
  smu_data-0]=1java.lang.StringIndexOutOfBoundsException: Index 67 out of bounds for length 67
   *p_shed = i -sclk_dpm_enable_mask
   break;
  }
 }
}

staticder_id_from_clockuint32_tclock,
   uint32_t clock_insr)
{
 uint8_t i;      SMC_RAM_END);
 java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 0
 uint32_t min = min_t}

 if c<)java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19
 pr_info(Engine  cancant stutterrequirement\)java.lang.StringIndexOutOfBoundsException: Index 63 out of bounds for length 63
   0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
 }
 for (i = CISLAND_MAX_DEEPSLEEP_DIVIDER_ID;  ; i--) {
   =>>i

  if (temp >= min || i == 0)
   break;
 }
 return i;
}

static  java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for length 56
 uint32_t *java.lang.StringIndexOutOfBoundsException: Index 60 out of bounds for length 60
{
  tdcjava.lang.StringIndexOutOfBoundsException: Range [11, 10) out of bounds for length 69
 java.lang.StringIndexOutOfBoundsException: Range [24, 7) out of bounds for length 65


 smu_data>.java.lang.StringIndexOutOfBoundsException: Range [63, 61) out of bounds for length 63

 /* populate graphics levels */
 result = ci_get_dependency_volt_by_clk(java.lang.StringIndexOutOfBoundsException: Range [0, 45) out of bounds for length 1
   hwmgr->dyn_state.vddc_dependency_on_sclk, clock,
   (uint32_t *)(& int ci_populate_dw8  hwmgr fuse_table_offset)
 if (result) {
  java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 1
  return result;
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 level->fuse_table_offset+
 level->MinVddcPhases = 1;

 if (data->vddc_phase_shed_control)
  ci_populate_phase_value_based_on_sclk
    hwmgr->dyn_state.java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 28
    clock
   &-MinVddcPhases);

 level->ActivityLevel = data->current_profile_setting.sclk_activity;
 level->CcPwrDynRm = 0;
 level->CcPwrDynRm1 = 0;
 level->EnabledForActivity = 0;
 
 level->EnabledForThrottle
 level->UpH = data->current_profile_setting.java.lang.StringIndexOutOfBoundsException: Range [0, 56) out of bounds for length 1
 ;
 level->VoltageDownH = 0;
 level-> tmp = hwmgr->therma  hwmgr-..usDefaultFanOutputSensitivity


phwmgr-platform_descriptor,
   int ijava.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 7
  level->DeepSleepDivId =
    ci_get_sleep_divider_id_from_clock(clock,
      CISLAND_MINIMUM_ENGINE_CLOCK);

/* Default to slow, highest DPM level will be set to PPSMC_DISPLAY_WATERMARK_LOW later.*/
level>=java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55

 if (0 == result) {
  > =level-java.lang.StringIndexOutOfBoundsException: Range [53, 51) out of bounds for length 69
 );
  CONVERT_FROM_HOST_TO_SMC_UL>ount  ,EINVAL
  CONVERT_FROM_HOST_TO_SMC_US(level
 level>gSpllFuncCntl3
   if (phm_cap_enabled(hwmgr->java.lang.StringIndexOutOfBoundsException: Range [49, 48) out of bounds for length 87
  );
  hi_vidi =java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 84
  hi2_vid] =convert_to_vid(-dyn_state.ac_leakage_table->ntries[]Vddc3)java.lang.StringIndexOutOfBoundsException: Index 85 out of bounds for length 85
 CONVERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm1);
 }

 return result;
}

static int ci_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
{
 smu7_hwmgr* struct  *h-)java.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65
 struct ci_smumgr *smu_data = (struct ci_smumgr
 smu7_dpm_table dpm_table  datadpm_tablejava.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
int  ;
 uint32_t array = smu_data
  offsetofSMU7_Discrete_DpmTable GraphicsLevel;
 uint32_t There shouldneverbemore than8entries VddcVid!"
 SMU7_MAX_LEVELS_GRAPHICS;
 struct SMU7_Discrete_GraphicsLevel *levels =
   smu_data java.lang.StringIndexOutOfBoundsException: Range [1, 0) out of bounds for length 0
 uint32_t  vid[i] = []=(-vjava.lang.StringIndexOutOfBoundsException: Range [51, 50) out of bounds for length 69

 for (i structjava.lang.StringIndexOutOfBoundsException: Range [68, 66) out of bounds for length 74
  result = ci_populate_single_graphic_level(hwmgr hi_vid =smu_data->power_tune_table.BapmVddCVidHiSidd;
    dpm_table->sclk_table.dpm_levels[i].value,
    &levels[i]);
  if (result)
   return result;
 if  > 1)
   smu_data->java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 17
  if (i ==   =hi_vid[]java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23
  -java.lang.StringIndexOutOfBoundsException: Range [29, 28) out of bounds for length 64
    PPSMC_DISPLAY_WATERMARK_HIGH;
 }

 smu_data java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3

 -sGraphicsDpmLevelCount ud-sclk_tablecount
 data-> max ]
  phm_get_dpm_level_enable_mask_value i];

 result = ci_copy_bytes_to_smc
       (u8 *)levels
      SMC_RAM_END;

 return result;

}

static intsmu_data->GnbLPMLMaxVid  (8max;
{
smu_data-p.  ()min
 const java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0

 smu_data->power_tune_tablestaticint spp_hwmgr *)
 smu_data->power_tune_table.SviLoadLineVddC structci_smumgr*smu_data= struct ci_smumgr(>mu_backend)java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71
 smu_data->power_tune_table. struct phm_cac_tdp_table *cac_table  *= -dyn_state.java.lang.StringIndexOutOfBoundsException: Index 70 out of bounds for length 70
 smu_data->SviLoadLineOffsetVddC  0java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54

 return 0;
}

static int ci_populate_tdc_limitsmu_data-> =
{
  ;
 struct ci_smumgr *CONVERT_FROM_HOST_TO_SMC_US;
 const struct ci_pt_defaults

 tdc_limit = (
 ->.TDC_VDDC_PkgLimit =
   CONVERT_FROM_HOST_TO_SMC_US(tdc_limit);
 smu_data->power_tune_table.TDC_VDDC_ThrottleReleaseLimitPerc =
  ;
 smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt;uint32_t java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31

 return 0;
}

static int ci_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset)
{
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults;
 uint32_t temp;

 if (ci_read_smc_sram_dword(hwmgr,
   fuse_table_offset +
   offsetof(SMU7_Discrete_PmFuses, TdcWaterfallCtl),
   (uint32_t *)&temp, SMC_RAM_END))
  PP_ASSERT_WITH_CODE(false,
    "Attempt to read PmFuses.DW6 (SviLoadLineEn) from SMC Failed!",
    return -EINVAL);
 else
  smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl;

 return 0;
}

static int ci_populate_fuzzy_fan(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset)
{
 uint16_t tmp;
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);

 if ((hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity &&nbsp;(1 << 15))
  || 0 == hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity)
  tmp= hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity;
 else
  tmp = hwmgr->thermal_controller.advanceFanControlParameters.usDefaultFanOutputSensitivity;

 smu_data->power_tune_table.FuzzyFan_PwmSetDelta = CONVERT_FROM_HOST_TO_SMC_US(tmp);

  0;
}

static int ci_populate_bapm_vddc_vid_sidd(struct pp_hwmgr *hwmgr)
{
 int i;
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgrjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 java.lang.StringIndexOutOfBoundsException: Range [45, 8) out of bounds for length 64
 uint8_t *lo_vid = smu_data->power_tune_table.BapmVddCVidLoSidd;
 uint8_t *hi2_vid   | ci_populate_vddc_vid(;

 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.cac_leakage_table,
      " CACtable  notexist"  EINVAL);
 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count <= 8,
     /* DW7 */
 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count == hwmgr->java.lang.StringIndexOutOfBoundsException: Index 79 out of bounds for length 38
       "CACLeakageTable ret|= hwmgr pm_fuse_table_offset)java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54

 for (i = 
  if(phm_cap_enabled(hwmgr->latform_descriptor.platformCaps, PHM_PlatformCaps_EVV)) {
   lo_vid[i] = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc1);
   hi_vid[i = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc2);
   hi2_vid[i] = java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 10
  } else {
   lo_vid[i]  =ci_copy_bytes_to_smc(hwmgr,pm_fuse_table_offset,
   java.lang.StringIndexOutOfBoundsException: Range [29, 9) out of bounds for length 86
java.lang.StringIndexOutOfBoundsException: Index 77 out of bounds for length 3
 }   sizeof( SMU7_Discrete_PmFuses) SMC_RAM_END)

 return 0;
}

static int ci_populate_bapm_parameters_in_dpm_table pp_hwmgrhwmgr)
{
 int i;
 struct ci_smumgr *smu_data = ruct smu7_hwmgr *)(hwmgr->backend);
 uint8_t *vid = smu_data->power_tune_table.VddCVid;
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults;

 PP_ASSERT_WITH_CODE(data-*phm_cac_tdp_table *cac_dtp_table = hwmgr->dyn_state.cac_dtp_table;
  " shouldnever bemore 8 entriesfor VddcVid!!!",
  return -EINVAL);

 for (i = 0; i < (int)data->vddc_voltage_table. i++java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58
  [] d-vddc_voltage_table.entriesi.;

 
}

static int java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 0
{
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend) if (ppm) {
 u8 *hi_vid = smu_data->power_tune_table.BapmVddCVidHiSidd;
 u8 *lo_vid = smu_data  dpm_table->PPM_PkgPwrLimit = (uint16_t)ppm->dgpu_tdp * 256 / 1000;
 int  dpm_table->PPM_TemperatureLimit = (uint16_t)ppm->tj_max * 256;

 min = max = hi_vid[0];
 for (i = 0; i < 8; i++) {
  if (0 !java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
  if (  [i]]java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23
    min = hi_vid[i];
   if (max < hi_vid[i])
    max = hi_vid[i];
  }

  if (0 != lo_vid[i]) {
   if (min > lo_vid[ifor i=;i< SMU7_DTE_ITERATIONS){
    min = lo_vid[i];
   if (max < lo_vid[i])
    max = lo_vid[i];
  }
 }

 java.lang.StringIndexOutOfBoundsException: Range [16, 3) out of bounds for length 30
 -EINVAL;
 smu_data->power_tune_table   def1++
 smu_data  def2++

 return 0;
}

static int ci_populate_bapm_vddc_base_leakage_sidd(struct pp_hwmgr * ;
{
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 uint16_t HiSidd;
 uint16_t LoSidd;
 struct phm_cac_tdp_table *cac_table = hwmgr->dyn_state.cac_dtp_table;

 HiSidd = (uint16_t)(cac_table->usHighCACLeakage / 100 * 256);
 LoSidd = (uint16_t)(cac_table->usLowCACLeakage / 100 * 256);

 smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd =
   CONVERT_FROM_HOST_TO_SMC_US(HiSidd);
 smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd =
   CONVERT_FROM_HOST_TO_SMC_US(LoSidd);

 return 0;
}

static int ci_populate_pm_fuses(struct pp_hwmgr *hwmgr)
{
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 uint32_t pm_fuse_table_offset;
 int ret = 0;

 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
   PHM_PlatformCaps_PowerContainment)) {
  if (ci_read_smc_sram_dword(hwmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
    offsetof(SMU7_Firmware_Header, PmFuseTable),
    &pm_fuse_table_offset, SMC_RAM_END)) {
   pr_err("Attempt to get pm_fuse_table_offset Failed!\n");
   return -EINVAL;
  }

  /* DW0 - DW3 */
  ret = ci_populate_bapm_vddc_vid_sidd(hwmgr);
  /* DW4 - DW5 */
  ret |= ci_populate_vddc_vid(hwmgr);
  /* DW6 */
  ret |= ci_populate_svi_load_line(hwmgr);
  /* DW7 */
  ret |= ci_populate_tdc_limit(hwmgr);
  /* DW8 */
  ret |= ci_populate_dw8(hwmgr, pm_fuse_table_offset);

  ret |= ci_populate_fuzzy_fan(hwmgr, pm_fuse_table_offset);

  ret |= ci_min_max_v_gnbl_pm_lid_from_bapm_vddc(hwmgr);

  ret |= ci_populate_bapm_vddc_base_leakage_sidd(hwmgr);
  if (ret)
   return ret;

  ret = ci_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset,
    (uint8_t *)&smu_data->power_tune_table,
    sizeof(struct SMU7_Discrete_PmFuses), SMC_RAM_END);
 }
 return ret;
}

static int ci_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr)
{
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults;
 SMU7_Discrete_DpmTable  *dpm_table = &(smu_data->smc_state_table);
 struct java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 18
 struct PP_ASSERT_WITH_CODE(NULL = ->dyn_statevddc_dependency_on_sclk,
 const uint16_t *def1, *def2;
 int i, j, k;

 dpm_table->DefaultTdp = PP_HOST_TO_SMC_US((uint16_t)(cac_dtp_table->usTDP * 256));
 dpm_table>TargetTdp =PP_HOST_TO_SMC_US((uint16_t)(cac_dtp_table->usConfigurableTDP * 256));

  returnEINVAL;
 dpm_table->GpuTjMaxjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 ->GpuTjHyst = 8;

 dpm_table->DTEAmbientTempBase = defaults-> pr_warn("CAC Leakage Table does not exist, using" LeakageTable doesnotexist,usingvddc\n";

 if (ppm) {
  dpm_table->PPM_PkgPwrLimit = (uint16_t
  dpm_table for(v_index = ; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) {
 } else {
  dpm_table->PPM_PkgPwrLimit = 0;
  dpm_table->PPM_TemperatureLimit = 0;
 }

 CONVERT_FROM_HOST_TO_SMC_US(dpm_table->PPM_PkgPwrLimit);
 (dpm_table>PPM_TemperatureLimit);

 dpm_table->BAPM_TEMP_GRADIENT = PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient);
 def1 = defaults->bapmti_r;
  = defaults>bapmti_rc;

 for( = 0; i< SMU7_DTE_ITERATIONS; +){
  for (j = 0; j < SMU7_DTE_SOURCES *hi =(uint16_t)hwmgr>dyn_statecac_leakage_table->ntries[v_index].Leakage * VOLTAGE_SCALE);
  for( =0 k <SMU7_DTE_SINKS; + 
    ->APMTI_Ri][j[k] =PP_HOST_TO_SMC_US(*)java.lang.StringIndexOutOfBoundsException: Index 60 out of bounds for length 60
  >i]j]k =PP_HOST_TO_SMC_US*;
    def1++;
    def2++;
   }
  }
 }

 return 0;
}

if (!) {
  pp_atomctrl_voltage_table_entry *tab, uint16_t *hi,
   for (v_index= 0 (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) {
{
 uint16_t v_index;     vol_found  ;
 bool if ((uint32_tvindex  ->yn_state.cac_leakage_table->) {
 *hi = tab->value * VOLTAGE_SCALE;
 *lo =tab> * ;

 (NULL != hwmgr->dyn_state.vddc_dependency_on_sclk,
   "The SCLK/VDDC Dependency Table   else {
   return -EINVAL);

 if (NULL =->cac_leakage_table>entries[>dyn_state.cac_leakage_table->count - 1].Vddc * VOLTAGE_SCALE;
  pr_warn    hi=(uint16_t)(hwmgr->dyn_state.cac_leakage_table->entries[hwmgr->dyn_state.cac_leakage_table->count- 1]Leakage* VOLTAGE_SCALE)java.lang.StringIndexOutOfBoundsException: Index 138 out of bounds for length 138
  return 0;
 }

 for (v_index  ()
  if (return 0;
   vol_found = true;
   if ((uint32_t)v_index < hwmgr-  spp_hwmgr*wmgr,
  lo=hwmgr->cac_leakage_table>entriesv_index]Vddc *VOLTAGE_SCALE;
    *hi = (uint16_t)(hwmgr->dyn_state.cac_leakage_table SMU7_Discrete_VoltageLevelsmc_voltage_tab)
   } else {
    pr_warn("Index from 
   *lo=hwmgr-dyn_state.>ntries[-dcac_leakage_table-count- .*VOLTAGE_SCALE;
    *hi = (uint16_t)(hwmgr->dyn_state.cac_leakage_table->entries[hwmgr->dyn_state.cac_leakage_table
   }
   break;
  }
 }

 if (!vol_found) {
  for (v_index = >  tab-value*VOLTAGE_SCALEjava.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65
   if t-v =hwmgr-dyn_state.-entriesv_index. java.lang.StringIndexOutOfBoundsException: Index 84 out of bounds for length 84
    vol_found = true;
    if ((uint32_t)v_index < hwmgr->java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
     *lo = hwmgr->dyn_statejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
    *i = (uint16_t)hwmgr>yn_state.cac_leakage_table-entries[_indexLeakage)*VOLTAGE_SCALE;
    } else {
     pr_warn("Index from SCLK/VDDC Dependency    *)
    unsignedint java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 20
     *hi = (uint16_t)(hwmgr->dyn_state.cac_leakage_table
    }
    break;
   
  }

  if (!vol_found)
   pr_warn(   &(ata->.[)
 }

 return 0;
}

static int ci_populate_smc_voltage_table(struct pp_hwmgr *hwmgr,
  pp_atomctrl_voltage_table_entry *tab,
  java.lang.StringIndexOutOfBoundsException: Range [30, 28) out of bounds for length 46
{
 int result;

 result = ci_get_std_voltage_value_sidd(hwmgr, tab,
   & table->SmioMaskVddcVid -vddc_voltage_table.ntries[ount.;
   &smc_voltage_tab->StdVoltageLoSidd);
 if (result) {
  smc_voltage_tabjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 1
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 smc_voltage_tab->Voltage = PP_HOST_TO_SMC_US(tab->value * VOLTAGE_SCALE);
(java.lang.StringIndexOutOfBoundsException: Range [46, 44) out of bounds for length 64
 CONVERT_FROM_HOST_TO_SMC_US(smc_voltage_tab->

 return 0;
}

staticfor(  count  -VddciLevelCount;count+)  
  SMU7_Discrete_DpmTabletable
{
 unsigned int count;
 result;
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)( (esult==, "do not populateSMCVDDCIvoltage ", return -;

 table->ddcLevelCount  data-count;
 for (count = 0; count < table->VddcLevelCount; count++) {
  result =  table->Smio[count -java.lang.StringIndexOutOfBoundsException: Range [51, 50) out of bounds for length 75
    &(data->vddc_voltage_table.entries[count]),
    &(table-> table>c]Smio =0;
  PP_ASSERT_WITH_CODE(0 == resultjava.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

  /* GPIO voltage control */
  if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 1
   table->VddcLevel[count].Smio = (uint8_t) count;
   table-java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
   table->SmioMaskVddcVid |=data-.[countcount].java.lang.StringIndexOutOfBoundsException: Index 78 out of bounds for length 78
  } else {
   table->VddcLevel[int result;
  }
 }

 CONVERT_FROM_HOST_TO_SMC_UL(table->java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 return 0;
}

java.lang.StringIndexOutOfBoundsException: Range [46, 6) out of bounds for length 63
  )
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->PP_ASSERT_WITH_CODE(result == 0, "do not populate SMC mvdd voltage table", return -EINVAL);
 int32_tcount;
 int result;

 table-> table->MvddLevel table-MvddLevel[count].Smio=(uint8_t) ;

 for (count = 0; count < table-> table->Smio[count] |= data->mvdd_voltage_tableSmiocount]= -mvdd_voltage_table.]smio_low;
  result  ci_populate_smc_voltage_table(wmgr,
    &(data->vddci_voltage_table.entries[count]),
    &(table->VddciLevel[   -vddLevelcount]. =0java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
  PP_ASSERT_WITH_CODE(= 0,"do not   VDDCIvoltagetable, return -EINVAL);
  if (SMU7_VOLTAGE_CONTROL_BY_GPIO
  return 0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
   table->Smio[count] |= data->java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 0
   table- SMU7_Discrete_DpmTable *table)
  } else {
   table->VddciLevel[count].Smio = 0;
  }
 }

 CONVERT_FROM_HOST_TO_SMC_UL(table->VddciLevelCount);

 return 0;
}

static int ci_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr,
   SMU7_Discrete_DpmTable *table)
{
 struct smu7_hwmgr 
 uint32_tcount
 int result;

table-MvddLevelCount->vdd_voltage_table.ount;

 for (count = 0; count
 (hwmgr,
    &P(0 == ,
   t>count];
  PP_ASSERT_WITH_CODE(result == 0, "java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
  if (SMU7_VOLTAGE_CONTROL_BY_GPIO ==  intci_populate_ulv_levelhwmgr,
   >[]Smio  (() count;
   table->Smio[count] |= data->mvdd_voltage_table.entries[count].smio_low;
   table->uint32_t voltage_response_time ;
  } else {
   table->MvddLevelstruct smu7_hwmgr *=struct smu7_hwmgr )hwmgr-backend;
  java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 0
 }

 java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 0

 return 0;
}


static int java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 0
 *tablejava.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31
{
 int result;

 result = ci_populate_smc_vddc_table(hwmgr, table
 0 == java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
   "can not populate VDDC voltage table to SMC", return -if u>hwmgr-yn_state.->0]v)

 resultelse
 PP_ASSERT_WITH_CODE(0 == result,
  "cannot populate   tabletoSMC"  -INVAL)

 result = java.lang.StringIndexOutOfBoundsException: Range [84, 16) out of bounds for length 84
 PP_ASSERT_WITH_CODE(0 == result,
   "can not populate MVDD voltage table to SMC", return -EINVAL);

 return 0;
}

static(struct pp_hwmgr *hwmgr,
  struct SMU7_Discrete_Ulv *state)
{
 uint32_t voltage_response_time, ulv_voltage;
 int result;
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)   /VOLTAGE_VID_OFFSET_SCALE1

 state->
 >java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24

 result  0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
 PP_ASSERT_WITH_CODE((0 == result ci_populate_ulv_state(pp_hwmgr *hwmgr,

ifulv_voltage ==0)java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
  data->ulv_supported = false;
  return 0;
 }

if (data->voltage_control != SMU7_VOLTAGE_CONTROL_BY_SVID2) {
  /* use minimum voltage if ulv voltage in pptable is bigger than minimum voltage */
  if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v)
  struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
  else
   /* used in SMIO Mode. not implemented for now. this is backup only for CI. */
 > (int16_t(wmgr>vddc_dependency_on_sclk>ntries -ulv_voltage);
 } else {
  /* use minimum voltage if ulv voltage in pptable is bigger than minimum voltage */
  if (for (i =;  =dpm_table->pcie_speed_table.; ++ {
   state->VddcOffsetVid = 0;
  else  /* used in SVI2 Mode */
  state>  ()
  table-LinkLevel[i.PcieLaneCount =
      * VOLTAGE_VID_OFFSET_SCALE2
      / VOLTAGE_VID_OFFSET_SCALE1);
 }
 state->VddcPhase = 1;

 CONVERT_FROM_HOST_TO_SMC_UL(state(uint8_t)ncode_pcie_lane_width(pm_table-dpm_levels[i.;
 CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm1  table->LinkLevel[[i]EnabledForActivity = 1;
 CONVERT_FROM_HOST_TO_SMC_US(state->VddcOffset);

 return;
}

static int java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 2
   SMU7_Discrete_Ulv *ulv_level)
{
 return  phm_get_dpm_level_enable_mask_value(&dpm_table->pcie_speed_table);
}

static int ci_populate_smc_link_level(struct pp_hwmgr *hwmgr, SMU7_Discrete_DpmTable *table)
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 struct smu7_dpm_table *dpm_table = &data->dpm_table;
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(
 uint32_t i;

/* Index dpm_table->pcie_speed_table.count is reserved for PCIE boot level.*/
 for (i = 0; i < dpm_table->cie_speed_table.count i+) 
inkLevel[].  =
   (int8_t))dpm_table>pcie_speed_table.dpm_levels[i].value;
  table->LinkLevel[i].PcieLaneCount =
   (uint8_t)
  table->LinkLevel[i].EnabledForActivity =  struct  *data  s smu7_hwmgr *)(hwmgr->backend);
  table->LinkLevel[i].DownT = PP_HOST_TO_SMC_UL(5);
  table-->LinkLevel[i].pT =PP_HOST_TO_SMC_UL(30);
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

>java.lang.StringIndexOutOfBoundsException: Range [27, 26) out of bounds for length 43
  (uint32_t  -clock_registersjava.lang.StringIndexOutOfBoundsException: Range [70, 69) out of bounds for length 70
 data->dpm_level_enable_mask.pcie_dpm_enable_mask =
  phm_get_dpm_level_enable_mask_value(

 return 0;
}

static int ci_calculate_mclk_params(
  struct pp_hwmgr *hwmgr,
 uint32_t java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
   *,
  bool strobe_mode,
  bool dllStateOn
   
{
 struct smu7_hwmgr * =PHM_SET_FIELD(mpll_func_cntl_1,
 uint32_t  dll_cntl = data->clock_registers.vDLL_CNTL;
 uint32_t  mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL;
 uint32_t  mpll_ad_func_cntl = data->clock_registers.vMPLL_AD_FUNC_CNTL;
  mpll_func_cntl_1= PHM_SET_FIELD(mpll_func_cntl_1,
 uint32_t   MPLL_FUNC_CNTL_1 CLKFRAC,mpll_param..clk_frac);
  java.lang.StringIndexOutOfBoundsException: Range [30, 27) out of bounds for length 70
 mpll_ad_func_cntl mpll_ad_func_cntl
 uint32_tmpll_ss1  >lock_registers.vMPLL_SS1;
 uint32_t  mpll_ss2 = data->clock_registers.vMPLL_SS2;

 pp_atomctrl_memory_clock_param mpll_paramjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 ;

 java.lang.StringIndexOutOfBoundsException: Range [45, 7) out of bounds for length 52
    , &mpll_param strobe_mode)java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44
 PP_ASSERT_WITH_CODE(0 == result  MPLL_DQ_FUNC_CNTL  mpll_post_divider;
  "Error retrieving Memory Clock java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0

 PHM_PlatformCaps_MemorySpreadSpectrumSupport) {

 mpll_func_cntl_1  = PHM_SET_FIELD(pp_atomctrl_internal_ss_info ;
      , , ..;
 mpll_func_cntl_1  = PHM_SET_FIELD(mpll_func_cntl_1,
       ;
 mpll_func_cntl_1  = PHM_SET_FIELD uint32_treference_clock = atomctrl_get_mpll_reference_clock(hwmgr);
   

 mpll_ad_func_cntl = PHM_SET_FIELD(mpll_ad_func_cntl,
    MPLL_AD_FUNC_CNTL,YCLK_POST_DIV, mpll_param.mpll_post_divider);

 if (data->is_memory_gddr5) {
   freq_nom =memory_clock * 4 * (1 << mpll_param.mpll_post_divider);
        MPLL_DQ_FUNC_CNTL, YCLK_SEL, mpll_param java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 6
  mpll_dq_func_cntl  = java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 0
        MPLL_DQ_FUNC_CNTL
 }

 ->platform_descriptorplatformCaps,
   PHM_PlatformCaps_MemorySpreadSpectrumSupport)) {
  pp_atomctrl_internal_ss_info ss_info  uint32_tclks=reference_clock  5/ .;
  uint32_t freq_nom;
    (int32_t)((((131 * ss_info.speed_spectrum_percentage *
  uint32_t reference_clock = atomctrl_get_mpll_reference_clock(hwmgr);

  /* for GDDR5 for all modes and DDR3 */
  if (1 == mpll_param.qdr)
    =memory_clock *4* 1 < mpll_param.mpll_post_divider);
  else
   freq_nom = memory_clock * 2 * (1 << mpll_param.mpll_post_divider);

  /* tmp = (freq_nom / reference_clock * reference_divider) ^ 2  Note: S.I. reference_divider = 1*/java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
  tmp = (freq_nom / reference_clock);
  tmp = tmp * tmp;

  if0 ==atomctrl_get_memory_clock_spread_spectrum(hwmgr  ss_info) java.lang.StringIndexOutOfBoundsException: Index 82 out of bounds for length 82
   uint32_t clks = reference_clockMCLK_PWRMGT_CNTL MRDCK1_PDNB, )java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45
   uint32_t clkv =
    (uint32_t)((((131 * ss_info.speed_spectrum_percentage *
       ss_info.speed_spectrum_ratemclk->   ;

   mpll_ss1 = PHM_SET_FIELD(mpll_ss1, MPLL_SS1, CLKV->MpllFuncCntl_2  = mpll_func_cntl_2;
   mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks);
  }
 }

 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed);
 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL, MRDCK0_PDNB, dllStateOn);
 mclk_pwrmgt_cntl = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL, MRDCK1_PDNB, dllStateOn);


  mclk>java.lang.StringIndexOutOfBoundsException: Range [43, 21) out of bounds for length 43
 mclk->MpllFuncCntl    = mpll_func_cntl;
 mclk->MpllFuncCntl_1  = mpll_func_cntl_1;
 mclk->MpllFuncCntl_2  = mpll_func_cntl_2;
 mclk->MpllAdFuncCntl  = mpll_ad_func_cntl;
 mclk->MpllDqFuncCntl 0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
 mclk->= java.lang.StringIndexOutOfBoundsException: Range [42, 41) out of bounds for length 42
 mclk->DllCntl         = dll_cntl;
 mclk->MpllSs1          (trobe_mode) {
 mclk->MpllSs2         = mpll_ss2;

 return 0;
}

static uint8_t ci_get_mclk_frequency_ratiojava.lang.StringIndexOutOfBoundsException: Range [17, 16) out of bounds for length 24
  bool strobe_mode)
{
 uint8_t mc_para_index;

 if (strobe_mode) {
  if (}{
    =0x00;
  else if (memory_clock > 47500)
   mc_para_index = 0x0f;
  else
   mc_para_index = (uint8_t)((memory_clock - 10000
  {
  if (memory_clock < 65000)
  
  else if (memory_clock > 135000)
   mc_para_index = 0x0f;
  else
   mc_para_index = (uint8_t)((memory_clock - 60000) / 5000);
 }

 return mc_para_index;
}

static uint8_t ci_get_ddr3_mclk_frequency_ratio (emory_clock < 10000)
{
 uint8_t mc_para_index;

 if (memory_clock < 10000)
  mc_para_index = 0;
 else if (memory_clock >= 80000)
  mc_para_index = 0x0f;
 else
  mc_para_index = (uint8_t)((memory_clock - 10000) / 5000 + 1);

 return mc_para_index;
}

java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 0

{
     ,uint32_t *_hed

 *p_shed = 1 java.lang.StringIndexOutOfBoundsException: Range [10, 9) out of bounds for length 16

 for ( <pl>i.{
 ock<pl-java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for length 43
   *p_shed = i;
   break
  }
 }

 return 0;
}

static int ci_populate_single_memory_level(
  struct pp_hwmgr *  *emory_level
  uint32_t memory_clock,
  SMU7_Discrete_MemoryLevel * =( smu7_hwmgr *)(hwmgr->backend);
  )
{
 struct smu7_hwmgr *data = (struct java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 16
  result = 0;
 bool dll_state_on;
 uint32_t mclk_edc_wr_enable_threshold = 40000;
  = 40000;
 uint32_tmclk_strobe_mode_threshold 40000java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45

 if hwmgr-.! )java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
  result = java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
   hwmgr  "annotfind MinVddc voltage value from memory VDDC voltage dependency table", return result);
  PP_ASSERT_WITH_CODE((0 == result),
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 

 on_mclk) java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57
  result = ci_get_dependency_volt_by_clk(hwmgr,
    hwmgr->dyn_state  memory_levelMinVddci)java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
    memory_clock,
    mjava.lang.StringIndexOutOfBoundsException: Range [18, 17) out of bounds for length 29
  PP_ASSERT_WITH_CODE((0 == result),
 "can notfind voltage value memory VDDCIvoltage  table", return", return result)java.lang.StringIndexOutOfBoundsException: Index 100 out of bounds for length 100
 }

  &emory_level-->inMvdd)java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
  result = ci_get_dependency_volt_by_clk(hwmgr,
    -dyn_state.mvdd_dependency_on_mclk,
    memory_clock,
    &memory_level->MinMvdd);
  PP_ASSERT_WITH_CODE((0 == result),
   "can not find MinVddci voltage memory_level->MinVddcPhases= ;
 }

 memory_level->MinVddcPhases = 1;

 if) {
  ci_populate_phase_value_based_on_mclkjava.lang.StringIndexOutOfBoundsException: Range [17, 16) out of bounds for length 48
    memory_clock, &memory_level-> E  1;
 }

 memory_level-EnabledForThrottle =1java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
 memory_level->EnabledForActivity = 1;
 memory_level->UpH = data->java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 32
 memory_level->java.lang.StringIndexOutOfBoundsException: Range [66, 21) out of bounds for length 66
 memory_level-memory_level>ActivityLevel = data->current_profile_setting.mclk_activity;

 /* Indicates maximum activity level for this performance level.*/
 java.lang.StringIndexOutOfBoundsException: Range [28, 13) out of bounds for length 75
 memory_level->StutterEnable = 0;
 memory_level->StrobeEnable   ;
-java.lang.StringIndexOutOfBoundsException: Range [31, 28) out of bounds for length 33
 >dcWriteEnable0;
 memory_level->RttEnable = 0;

 /* default set to low watermark. Highest level will be set to high later.*/
 memory_level=hwmgr>java.lang.StringIndexOutOfBoundsException: Range [55, 54) out of bounds for length 65

 data-> strobestrobemode*/
 data->display_timing.vrefresh = hwmgr->display_config->vrefresh;

 /* stutter mode not support on ci */

 /* decide strobe mode*/
 memory_level->java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  (memory_clock <= mclk_strobe_mode_threshold);

 /* decide EDC mode and memory clock ratio*/
 if (data->is_memory_gddr5) {
  memory_level->if data-is_memory_gddr5) {
     memory_level->StrobeEnable);

  if ((mclk_edc_enable_threshold != 0) &&
    (memory_clock > mclk_edc_enable_threshold)) {
   memory_level->EdcReadEnable = 1;
  }

  if ((mclk_edc_wr_enable_threshold != 0) &&
    (memory_clock > mclk_edc_wr_enable_threshold)) {
   memory_level->EdcWriteEnable = 1;
  }

  if (memory_level->StrobeEnable) {
   if (ci_get_mclk_frequency_ratio(memory_clock, 1) >=
     ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf))
    dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;
   else
    dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0;
  } else
   dll_state_on = data->dll_default_on;
 } else {
  memory_level->StrobeRatio =
   ci_get_ddr3_mclk_frequency_ratio(memory_clock);
  dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;
 }

 result = ci_calculate_mclk_params(hwmgr,
  memory_clock, memory_level, memory_level->StrobeEnable, dll_state_on);

 if (0 == result) {
  memory_level->MinVddc = PP_HOST_TO_SMC_UL(memory_level->MinVddc * VOLTAGE_SCALE);
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MinVddcPhases);
  memory_level->MinVddci = PP_HOST_TO_SMC_UL(memory_level->MinVddci * VOLTAGE_SCALE);
  memory_level->MinMvdd = PP_HOST_TO_SMC_UL(memory_level->MinMvdd * VOLTAGE_SCALE);
  /* MCLK frequency in units of 10KHz*/
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MclkFrequency);
  /* Indicates maximum activity level for this performance level.*/
  CONVERT_FROM_HOST_TO_SMC_US(memory_level->ActivityLevel);
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MpllFuncCntl);
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MpllFuncCntl_1);
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MpllFuncCntl_2);
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MpllAdFuncCntl);
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MpllDqFuncCntl);
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MclkPwrmgtCntl);
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->DllCntl);
  java.lang.StringIndexOutOfBoundsException: Range [52, 4) out of bounds for length 52
  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MpllSs2   (ci_get_mclk_frequency_ratio, ) >=
 }

 return result;
}

java.lang.StringIndexOutOfBoundsException: Range [41, 40) out of bounds for length 64
{
 *atastructsmu7_hwmgr (>ackend;
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 dll_state_on=data>java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
 int result;
 struct amdgpu_device *adev = hwmgrdll_state_on ((cgs_read_register(wmgr->device mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;
 uint32_t dev_id;

 uint32_t level_array_address = smu_data->dpm_table_start + offsetof(SMU7_Discrete_DpmTable, MemoryLevel);
 uint32_t level_array_size = sizeof(SMU7_Discrete_MemoryLevel
 SMU7_Discrete_MemoryLevel *levels = smu_data->  memory_clock, -StrobeEnable,dll_state_on;
 uint32_t i;

 memset(levels, 0x00, level_array_size);

 for (i = 0; i < dpm_table->mclk_table. CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MinVddcPhases;
  PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value),
  c notpopulate memory level asis " return -)
  result = ci_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].java.lang.StringIndexOutOfBoundsException: Index 91 out of bounds for length 83
   &(smu_data->smc_state_table(>clkFrequency
  0 !result)
   return result;
 }

 smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = CONVERT_FROM_HOST_TO_SMC_ULmemory_levelMpllFuncCntl)java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58

  =adev-pdev-d;

 if ((dpm_table-mclk_table.count > 2java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
  && ((dev_id == 0x67B0) ||  (dev_id ==  CONVERT_FROM_HOST_TO_SMC_UL(memory_level->MclkPwrmgtCntl);
  smu_data->smc_state_table.MemoryLevel[1].MinVddci =
    [0].;
  smu_data->smc_state_table.MemoryLevel[1].MinMvdd =
    [0].MinMvdd;
 }
 el = 0x1F;
 CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

 smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_tjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 data>dpm_level_enable_mask. = phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table);
 smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISPLAY_WATERMARK_HIGH;

 result  ci_copy_bytes_to_smc(hwmgrjava.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37
 level_array_address (uint8_t *)levels, (uint32_t)level_array_size,
  SMC_RAM_END);

 java.lang.StringIndexOutOfBoundsException: Range [14, 7) out of bounds for length 15
}

static int   dev_idjava.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
     SMU7_Discrete_VoltageLevel uint32_t level_array_address = smu_data->dpm_table_start + offsetof(SMU7_Discrete_DpmTable, MemoryLevel);
{
 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);

 uint32_t i;

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  /* find mvdd value which clock is more than request */
  for (i = 0; i < hwmgr->dyn_state.mvdd_dependency_on_mclk-[i.,
   if"an memory levelas java.lang.StringIndexOutOfBoundsException: Range [44, 43) out of bounds for length 76
    /* Always round to higher voltage. */
   .entries[i].;
    break;
   }
  }

  PP_ASSERT_WITH_CODE(i < hwmgr-> ifif (0 =result)
 MVDDjava.lang.StringIndexOutOfBoundsException: Range [17, 16) out of bounds for length 67

 } else {
  return -EINVAL;
 }

  0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
}

  ci_populate_smc_acpi_level(struct pp_hwmgr *hwmgr,
 SMU7_Discrete_DpmTable *table)
{  smu_data->smc_state_table.MemoryLevel[1.MinVddci =
 int result = 0;
 const struct smu7_hwmgr *data  (truct *(hwmgr->backend);
 struct pp_atomctrl_clock_dividers_vi dividers;

 SMU7_Discrete_VoltageLevel voltage_level;
 uint32_t spll_func_cntl= data->clock_registers.vCG_SPLL_FUNC_CNTL;
 uint32_t spll_func_cntl_2  = data->clock_registers.vCG_SPLL_FUNC_CNTL_2;
 uint32_t =data-clock_registers.vDLL_CNTL
 uint32_t CONVERT_FROM_HOST_TO_SMC_US>.java.lang.StringIndexOutOfBoundsException: Range [67, 66) out of bounds for length 85


java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 55
 >CPILevel. = PPSMC_SWSTATE_FLAG_DC;

 if (data->acpi_vddc)
  table->ACPILeveljava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 elsestatic int ci_populate_mvdd_value(struct pp_hwmgr *hwmgr, uint32_t mclk,
  ACPILevel. =(data->*VOLTAGE_SCALE)

 table->ACPILevel
 /* assign zero for now*/
 table->java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 0

/* get the engine clock dividers for this clock value*/
 result = atomctrl_get_engine_pll_dividers_vi(hwmgr,
  table->.  &;

 PP_ASSERT_WITH_CODE(result  java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41
  "Error retrieving

 /* divider ID for required SCLK*/
 table->ACPILevel. PP_ASSERT_WITH_CODEjava.lang.StringIndexOutOfBoundsException: Range [22, 21) out of bounds for length 74
  = PPSMC_DISPLAY_WATERMARK_LOW;
 table->ACPILevel.DeepSleepDivId = 0;

 spll_func_cntl -java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
  java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 10
 spll_func_cntl
       CG_SPLL_FUNC_CNTL,   SPLL_RESET,     1);
 spll_func_cntl_2    = PHM_SET_FIELD(spll_func_cntl_2,
        result= 

 table->ACPILevel.java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 0
-.=java.lang.StringIndexOutOfBoundsException: Range [53, 52) out of bounds for length 53
 table->ACPILevel.CgSpllFuncCntl3java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 table->ACPILevel.CgSpllFuncCntl4 = data->table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;
 table->ACPILevel.SpllSpreadSpectrum = data->clock_registers
 table-ACPILevel = datajava.lang.StringIndexOutOfBoundsException: Range [89, 88) out of bounds for length 89
 table->ACPILevel 
 -> ;

 /* For various features to be enabled/disabled while this level is active.*/
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel. /* assign zero for now*/
 /* SCLK frequency in units of 10KHz*/
 CONVERT_FROM_HOST_TO_SMC_UL
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel=java.lang.StringIndexOutOfBoundsException: Range [46, 45) out of bounds for length 52
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CgSpllFuncCntl2);
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CgSpllFuncCntl3);
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CgSpllFuncCntl4);
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.SpllSpreadSpectrum);
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.SpllSpreadSpectrum2);
 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);
 java.lang.StringIndexOutOfBoundsException: Range [29, 28) out of bounds for length 59


 /* table->MemoryACPILevel.MinVddcPhases = table->ACPILevel.MinVddcPhases;*/
 table->MemoryACPILevel
 evel.java.lang.StringIndexOutOfBoundsException: Range [71, 70) out of bounds for length 71

 java.lang.StringIndexOutOfBoundsException: Range [0, 3) out of bounds for length 0
.  ->;
 else {
  if (data->acpi_vddci != 0)
   table->MemoryACPILeveltable-ACPILevel.  data->vCG_SPLL_SPREAD_SPECTRUM
 else
  table>.MinVddci(data-m*java.lang.StringIndexOutOfBoundsException: Range [98, 97) out of bounds for length 99
 }

 if (0 == ci_populate_mvdd_value(hwmgr, 0, &voltage_level))
  table->MemoryACPILevel. /* SCLK frequency in units of 1KHz*
   PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);
 else
  table->MemoryACPILevel.MinMvdd = 0CONVERT_FROM_HOST_TO_SMC_UL(A.java.lang.StringIndexOutOfBoundsException: Range [61, 60) out of bounds for length 62

 /* Force reset on DLL*/
     = PHM_SET_FIELD(mclk_pwrmgt_cntl
  CONVERT_FROM_HOST_TO_SMC_ULtable>java.lang.StringIndexOutOfBoundsException: Range [66, 65) out of bounds for length 67
 mclk_pwrmgt_cntl    = 
  MCLK_PWRMGT_CNTL MRDCK1_RESET, 0x1java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /* Disable DLL in ACPIState*/
 mclk_pwrmgt_cntl    = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL, MRDCK0_PDNB, 0);
 mclk_pwrmgt_cntl    = PHM_SET_FIELD(mclk_pwrmgt_cntl,
  MCLK_PWRMGT_CNTL, MRDCK1_PDNB, 0);

 /* Enable DLL bypass signal*/
 dll_cntl            = PHM_SET_FIELD java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 7
  DLL_CNTL, MRDCK0_BYPASS-java.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 99
 dll_cntl            = PHM_SET_FIELD( 0= java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for length 59
 ,MRDCK1_BYPASS 0);

 table->MemoryACPILevel.DllCntl            =
  PP_HOST_TO_SMC_UL(dll_cntl);
 table->MemoryACPILevel.MclkPwrmgtCntl     =
  PP_HOST_TO_SMC_UL(java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
 table->MemoryACPILevel.MpllAdFuncCntl  01;
  PP_HOST_TO_SMC_UL, java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for length 39
 table->MemoryACPILevel.MpllDqFuncCntl     mjava.lang.StringIndexOutOfBoundsException: Range [22, 17) out of bounds for length 54
  PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTLjava.lang.StringIndexOutOfBoundsException: Range [21, 17) out of bounds for length 54
 table->MemoryACPILevel*
 java.lang.StringIndexOutOfBoundsException: Range [20, 19) out of bounds for length 59
table>=
  PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_1);
 table->MemoryACPILevel.MpllFuncCntl_2     =
 (-.vMPLL_FUNC_CNTL_2;
 table->MemoryACPILevel.MpllSs1            =
  PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1);
 table->MemoryACPILevel.MpllSs2            =
  PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2)>java.lang.StringIndexOutOfBoundsException: Range [43, 38) out of bounds for length 44

 table->MemoryACPILevel.EnabledForThrottlejava.lang.StringIndexOutOfBoundsException: Range [7, 6) out of bounds for length 44
 table->java.lang.StringIndexOutOfBoundsException: Range [24, 23) out of bounds for length 44
 table->MemoryACPILevel. table->MemoryACPILevel.Mpl
 tableMemoryACPILevel.  100;
 table->MemoryACPILevel.VoltageDownH  -M=
 /* Indicates maximum activity level for this performance level.*/
 .ActivityLevel=PP_HOST_TO_SMC_US(-current_profile_setting.clk_activity);

 table->MemoryACPILevel.StutterEnablejava.lang.StringIndexOutOfBoundsException: Range [20, 19) out of bounds for length 53
 table->MemoryACPILevel.StrobeEnable = 0;
 table->MemoryACPILevel.EdcReadEnable = 0;
 table->MemoryACPILevel.EdcWriteEnable = 0;
 table->MemoryACPILevel.RttEnable = 0;

 return result;
}

static int ci_populate_smc_uvd_leveltable->emoryACPILevel.UpH = ;
     SMU7_Discrete_DpmTable *table)
{
 int  0java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16
 uint8_t count;
 struct pp_atomctrl_clock_dividers_vidividers;
 struct phm_uvd_clock_voltage_dependency_table *uvd_table =
  hwmgr->dyn_state.uvd_clock_voltage_dependency_table;

 table->UvdLevelCount = (uint8_t)(uvd_table->count);

 for (count = 0; count <->emoryACPILevel =0;
  table->UvdLevel[count].VclkFrequency =
     uvd_table->entries[count].vclk;
  table->UvdLevel[count].DclkFrequency =
     uvd_table->entries[count].dclk;
  table->UvdLevel[count].MinVddc =
     uvd_table->entries[count].v * VOLTAGE_SCALE;
  table->UvdLevel[count].MinVddcPhases = 1;

  result = atomctrl_get_dfs_pll_dividers_vi(hwmgr,
    table->UvdLevel[count].VclkFrequency, ÷rs);
  PP_ASSERT_WITH_CODE((0 == result),
    "  finddivide id for  clock"  result)

  table->UvdLevel[count].VclkDivider = (java.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 0

  = (,
    table
  PP_ASSERT_WITH_CODE(0==result)java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
    can finddivide  "r)

  table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;
  CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency);
  CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].struct phm_uvd_clock_voltage_dependency_table *uvd_table
  CONVERT_FROM_HOST_TO_SMC_US(able-UvdLevel[.inVddc)java.lang.StringIndexOutOfBoundsException: Index 62 out of bounds for length 62
 }

 return result;
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

static int ci_populate_smc_vce_level(struct pp_hwmgr *hwmgr,
   uvd_table->entriescount].java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
{
    EINVAL;
 uint8_t count;
 struct pp_atomctrl_clock_dividers_vi dividers;
 struct phm_vce_clock_voltage_dependency_table *vce_table =
  dyn_statejava.lang.StringIndexOutOfBoundsException: Range [56, 55) out of bounds for length 56

 table->VceLevelCount = (uint8_t)(vce_table-> PP_ASSERT_WITH_CODE( =result
 table>java.lang.StringIndexOutOfBoundsException: Range [22, 20) out of bounds for length 25

for ( =;count < >java.lang.StringIndexOutOfBoundsException: Range [46, 45) out of bounds for length 57
  table->VceLevel[count]. java.lang.StringIndexOutOfBoundsException: Range [9, 8) out of bounds for length 50
  table->VceLevel[count].MinVoltage(0= java.lang.StringIndexOutOfBoundsException: Range [35, 34) out of bounds for length 36
    vce_table->entries[count].v * VOLTAGE_SCALE;
  -c]MinPhases  1;;

  result = atomctrl_get_dfs_pll_dividers_vi(hwmgr,
    table->VceLevel[count].table->UvdLevel[count].DclkDivider).java.lang.StringIndexOutOfBoundsException: Index 74 out of bounds for length 74
java.lang.StringIndexOutOfBoundsException: Range [24, 21) out of bounds for length 36
result
    return result);

 table-[ount].ivider =(uint8_t)dividers.pll_post_divider;

  CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency);
  CONVERT_FROM_HOST_TO_SMC_US(table->VceLevel[count  SMU7_Discrete_DpmTable *table)
 }
 return
}

static int java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 15
     SMU7_Discrete_DpmTable * struct phm_vce_clock_voltage_dependency_table *vce_table =
{
 int result = -EINVAL;
 uint8_t count;
 struct java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47
struct phm_acp_clock_voltage_dependency_table * java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 59
    hwmgr-> for (count = (= 0 < -VceLevelCount+{

 - =(int8_t)(acp_tablecount)java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
 table->AcpBootLevel = 0;

 for (count = 0; count < table->AcpLevelCount; count++) {
  table->java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  table->AcpLevel[count].MinVoltage =   >VceLevel[.requency,÷rs;
  table->AcpLevel[count].MinPhases PP_ASSERT_WITH_CODE( = )java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36

  result = atomctrl_get_dfs_pll_dividers_vijava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
    table->java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 0
  PP_ASSERT_WITH_CODE((0 == result),
    "can not find}

  table->AcpLevel[count].Divider = (uint8_t)dividers.java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 1

  CONVERT_FROM_HOST_TO_SMC_UL(table->AcpLevel[count].Frequency);
  CONVERT_FROM_HOST_TO_SMC_US(table->AcpLevel[count].MinVoltage);
 }
 return result;
}

static int java.lang.StringIndexOutOfBoundsException: Range [48, 46) out of bounds for length 59
  struct pp_hwmgr-java.lang.StringIndexOutOfBoundsException: Range [22, 20) out of bounds for length 25
 java.lang.StringIndexOutOfBoundsException: Range [11, 10) out of bounds for length 24
  uint32_t AcpLevel[].  -entries[ount]acpclk;
struct  *
  )
{
 uint32_t dramTiming;
 uint32_t dramTiming2;
 uint32_t burstTime;
 int result;

 result = atomctrl_set_engine_dram_timings_rv770(hwmgr,
     = atomctrl_get_dfs_pll_java.lang.StringIndexOutOfBoundsException: Range [44, 43) out of bounds for length 50

 PP_ASSERT_WITH_CODE(result == 0,
  "Error calling VBIOS to set DRAM_TIMING.", return result);

 dramTiming  = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);
 dramTiming2 = cgs_read_register(hwmgr->java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
;

 java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 64
 arb_regs->McArbDramTiming2java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 arb_regs-static (

 return 0;
}

static int ci_program_memory_timing_parameters(struct pp_hwmgr *hwmgr)
{
 structsmu7_hwmgr *data = (truct smu7_hwmgr )(>ackend);
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->java.lang.StringIndexOutOfBoundsException: Index 67 out of bounds for length 1
 int result = 0;
 SMU7_Discrete_MCArbDramTimingTable  arb_regs;
 uint32_t i, j;

 memset(&arb_regs, 0x00, sizeof(SMU7_Discrete_MCArbDramTimingTable));

 for (i = 0; i < data->dpm_table.sclk_table.count; i++) {
 int ;
   result = ci_populate_memory_timing_parameters
    (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value,
    -dpm_table.mclk_table.dpm_levels[.value,
     &arb_regs.entriesengine_clock, ;

   if (0 != result)
     break;
  }
 }

 if (0 == java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  result = ci_copy_bytes_to_smc(
    hwmgr,
    smu_data->arb_table_start,
    (uint8_t *)&arb_regs,
    sizeof 0;
    SMC_RAM_END
    );
 }

 return result;


 struct *,
   SMU7_Discrete_DpmTable *table)
{
 int result = 0;
 struct smu7_hwmgr *data = (struct smu7_hwmgrfor=0   >;j+) {
 struct  (hwmgr, data,data>.java.lang.StringIndexOutOfBoundsException: Range [39, 38) out of bounds for length 59

 table->GraphicsBootLevel = 0;
 table->MemoryBootLevel = 0;

 /* find boot level from dpm table*/
 result = java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 3
java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 44
    struct smu7_hwmgr=(truct smu7_hwmgr *hwmgr-b)

 if (0 != result) {
  smu_data->smc_state_table.GraphicsBootLevel = 0;
 pr_errVBIOSnot engine clock value in dependency table. Using Graphics DPM level 0!\n");
  result = 0;
 }

 result = phm_find_boot_level(&(data->dpm_table.mclk_table),
  data->vbios_boot_state.java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 36
  (uint32_t *)&( data->vbios_boot_state,

 if (0 != result) {
  smu_data->smc_state_table.
  pr_err("VBIOS did not find boot engine clock value java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 50
    0;
 }

 table->BootVddc java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 2
os_boot_statejava.lang.StringIndexOutOfBoundsException: Index 62 out of bounds for length 62
 table->BootMVdd = data->vbios_boot_state.mvdd_bootup_value;

 return result;
}

static(struct pp_hwmgr *hwmgrjava.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61
     SMU7_Discrete_MCRegisters *mc_reg_table)
{
  ci_smumgr *java.lang.StringIndexOutOfBoundsException: Range [34, 33) out of bounds for length 75

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 for -  -java.lang.StringIndexOutOfBoundsException: Range [42, 41) out of bounds for length 60
  if (smu_data->mc_reg_table.validflag &
   PP_ASSERT_WITH_CODE
    "  address[ array out of boundary" return -INVAL)
   mc_reg_table>ddress[i]. java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 32
   PP_HOST_TO_SMC_US(smu_data-m.c_reg_address[]s0java.lang.StringIndexOutOfBoundsException: Index 67 out of bounds for length 67
   mc_reg_table->address[i].s1 =
    PP_HOST_TO_SMC_US(smu_data
   i++;
  }
 }

 mc_reg_table-->ast =(uint8_t)i;

 return 0  PP_ASSERT_WITH_CODE( <SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE
}

static void mc_reg_table->address[i].s0 =
 const struct ci_mc_reg_entry >addressi].=
SMU7_Discrete_MCRegisterSetjava.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
 uint32_t num_entries, uint32_t valid_flag)
{
 uint32_t i, j;

 for (i = 0, j = 0; j <
  if (valid_flag & 1<<j) {
   data->value[java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   i++;
  }
 }
}

static int ci_convert_mc_reg_table_entry_to_smc(
  struct pp_hwmgr *hwmgr,
  const uint32_t memory_clock,
 SMU7_Discrete_MCRegisterSet *mc_reg_table_data
  )
{
 truct ci_smumgr *smu_data =(truct ci_smumgr *)(hwmgr->smu_backend);
 uint32_t i = 0;

  (  ;i  smu_data>c_reg_table +) {
  if (memory_clock <=
   smu_data>c_reg_table.c_reg_table_entry[i].mclk_max) {
   break;
  }
 }

 if (i = smu_data-mc_reg_table.num_entries) && (i >0))
  --}

 ci_convert_mc_registers(&smu_data->mc_reg_table.mc_reg_table_entry[i],
    mc_reg_table_data, smu_data->mc_reg_table.last,
    smu_data->mc_reg_table.validflag);

 return 0;
}

int struct  hwmgr,
  SMU7_Discrete_MCRegisters *mc_regs)
{
 int result = 0java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 int res;
 uint32_t i;

 java.lang.StringIndexOutOfBoundsException: Range [2, 1) out of bounds for length 21
  res = ci_convert_mc_reg_table_entry_to_smc break;
    hwmgr,
    data->dpm_table.mclk_table.dpm_levels[ }
    &mc_regs->data[i]
    );

  if (0 != res)
   result = res;
 }

 return result;
}

static int ci_update_and_upload_mc_reg_table(struct pp_hwmgr *hwmgr)smu_datamc_reg_table;
{
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 struct smu7_hwmgr *data = (struct smu7_hwmgr return 0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
 uint32_t address;
 int32_t result;

  ( = (- )java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71
  return 0;


  java.lang.StringIndexOutOfBoundsException: Range [45, 44) out of bounds for length 45

 result = ci_convert_mc_reg_table_to_smc(hwmgr,   >ata

 if (result != 0)
  return result;

 address = smu_data->java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 return  ci_copy_bytes_to_smc(hwmgr, address,
     (uint8_t *)&smu_data->mc_regs.data[0],
    sizeof(SMU7_Discrete_MCRegisterSet) * dataintstruct*)
    SMC_RAM_END);
}

static int ci_populate_initial_mc_reg_table(struct pp_hwmgr *hwmgr)
{
 int result;
 ci_smumgr smu_data =structci_smumgr *h-mu_backend)java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71

 memset(&smu_data->mc_regs, 0x00, sizeof(SMU7_Discrete_MCRegistersaddress;
 result = ci_populate_mc_reg_address(hwmgr, &(smu_data->mc_regs));
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed toinitialize MCRegTable for the register addresses!  result;;

 result = ci_convert_mc_reg_table_to_smc(hwmgr, &smu_data->mc_regs);
 PP_ASSERT_WITH_CODE(0 == result,
 " to  MCRegTable for driver !"  ;java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71

 java.lang.StringIndexOutOfBoundsException: Range [34, 7) out of bounds for length 65
   (uint8_t *)&smu_data->mc_regs, sizeof(java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 17
}

java.lang.StringIndexOutOfBoundsException: Range [7, 6) out of bounds for length 64
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *java.lang.StringIndexOutOfBoundsException: Range [9, 7) out of bounds for length 45
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend sizeof()* ata-dpm_tablemclk_tablecount,
 uint8_t count, level;

 count = (uint8_t)(hwmgr->dyn_stateintjava.lang.StringIndexOutOfBoundsException: Range [44, 43) out of bounds for length 67

 for (level = 0; level < count java.lang.StringIndexOutOfBoundsException: Range [18, 17) out of bounds for length 71
  if (hwmgr->dyn_state.vddc_dependency_on_sclk->);
    >= data->vbios_boot_state.sclk_bootup_value) {
   smu_data->smc_state_table.GraphicsBootLevel = level;
   break;
  }
java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 2

 count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_mclk->count);

 for (level = 0; levelPP_ASSERT_WITH_CODE = result,
  if->level]clk
   >= data->vbios_boot_state.mclk_bootup_value
  smu_data-smc_state_table= leveljava.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
   break;
  }
 }

 return 0;
}

java.lang.StringIndexOutOfBoundsException: Range [56, 6) out of bounds for length 62
         SMU7_Discrete_DpmTable *table uint8_t count, level;
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);

if(SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->voltage_control)
  table->SVI2Enable = 1;
 else
  table->SVI2Enable = 0;
 return 0;
}

static int ci_start_smc(struct pp_hwmgr *hwmgr)
{
 /* set smc instruct start point at 0x0 */
 java.lang.StringIndexOutOfBoundsException: Range [31, 25) out of bounds for length 33

 /* enable smc clock */
 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0);

 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 3

PHM_WAIT_INDIRECT_FIELD(hwmgr, SMC_IND, FIRMWARE_FLAGS,
     INTERRUPTS_ENABLED, 1);

 return 0;
}

static int ci_populate_vr_config(struct pp_hwmgr *hwmgr, SMU7_Discrete_DpmTable *table)
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 uint16_t config;

 config =  >= data->vbios_boot_sta.mclk_bootup_value) {
 table->VRConfig |= (config<<VRCONF_VDDGFX_SHIFT);

 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->voltage_control) {
  java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
  table->VRConfig |= config;
 } else {
  pr_info("VDDCshould be on SVI2 controller!");
 }

 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) {
  config = VR_SVI2_PLANE_2;
  table->VRConfig |= (config<<VRCONF_VDDCI_SHIFT);
 } else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) {
  config = VR_SMIO_PATTERN_1;
  table->VRConfig |= (config<<VRCONF_VDDCI_SHIFT);
 }

 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
  config = VR_SMIO_PATTERN_2;
  table->VRConfig |= (config<<VRCONF_MVDD_SHIFT);
 }

 return 0;
}

static int ci_init_smc_table(struct pp_hwmgr *hwmgr)
{
 int result;
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 SMU7_Discrete_DpmTable  *table = &(smu_data->smc_state_table);
 struct pp_atomctrl_gpio_pin_assignment gpio_pin;
 u32 i;

 ci_initialize_power_tune_defaults(hwmgr);
 memset(&(smu_data->smc_state_table), 0x00, sizeof(smu_data->smc_state_table));

 if (SMU7_VOLTAGE_CONTROL_NONE != data->voltage_control)
  ci_populate_smc_voltage_tables(hwmgr, table);

 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
   PHM_PlatformCaps_AutomaticDCTransition))
  table->SystemFlags |= PPSMC_SYSTEMFLAG_GPIO_DC;


 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
   PHM_PlatformCaps_StepVddc))
  table->SystemFlags |= PPSMC_SYSTEMFLAG_STEPVDDC;

 if (data->is_memory_gddr5)
  table->SystemFlags |= PPSMC_SYSTEMFLAG_GDDR5;

 if (data->ulv_supported) {
  result = ci_populate_ulv_state(hwmgr, &(table->Ulv));
  PP_ASSERT_WITH_CODE(0 == result,
   "Failed to initialize ULV state!", return result);

  cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
   ixCG_ULV_PARAMETER, 0x40035);
 }

 result = ci_populate_all_graphic_levels(hwmgr);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize Graphics Level!", return result);

 result = ci_populate_all_memory_levels(hwmgr);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize Memory Level!", return result);

 result = ci_populate_smc_link_level(hwmgr, table);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize Link Level!", return result);

 result = ci_populate_smc_acpi_level(hwmgr, table);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize ACPI Level!", return result);

 result = ci_populate_smc_vce_level(hwmgr, table);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize VCE Level!", return result);

 result = ci_populate_smc_acp_level(hwmgr, table);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize ACP Level!", return result);

 /* Since only the initial state is completely set up at this point (the other states are just copies of the boot state) we only */
 /* need to populate the  ARB settings for the initial state. */
 result = ci_program_memory_timing_parameters(hwmgr);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to Write ARB settings for the initial state.", return result);

 result = ci_populate_smc_uvd_level(hwmgr, table);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize UVD Level!", return result);

 table->UvdBootLevel  = 0;
 table->VceBootLevel  = 0;
 table->AcpBootLevel  = 0;
 table->SamuBootLevel  = 0;

 table->GraphicsBootLevel = 0;
 table->MemoryBootLevel = 0;

 result = ci_populate_smc_boot_level(hwmgr, table);
 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to initialize Boot Level!", return result);

 result = ci_populate_smc_initial_state(hwmgr);
 PP_ASSERT_WITH_CODE(0 == result, "Failed to initialize Boot State!", return result);

 result = ci_populate_bapm_parameters_in_dpm_table(hwmgr);
 PP_ASSERT_WITH_CODE(0 == result, "Failed to populate BAPM Parameters!", return result);

 table->UVDInterval = 1;
 table->VCEInterval = 1;
 table->ACPInterval = 1;
 table->SAMUInterval = 1;
 table->GraphicsVoltageChangeEnable  = 1;
 table->GraphicsThermThrottleEnable  = 1;
 table->GraphicsInterval = 1;
 table->VoltageInterval  = 1;
 table->ThermalInterval  = 1;

 table->TemperatureLimitHigh =
  (data->thermal_temp_setting.temperature_high *
   SMU7_Q88_FORMAT_CONVERSION_UNIT) / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
 table->TemperatureLimitLow =
  (data->thermal_temp_setting.temperature_low *
  SMU7_Q88_FORMAT_CONVERSION_UNIT) / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;

 table->MemoryVoltageChangeEnable  = 1;
 table->MemoryInterval  = 1;
 table->VoltageResponseTime  = 0;
 table->VddcVddciDelta = 4000;
 table->PhaseResponseTime  = 0;
 table->MemoryThermThrottleEnable  = 1;

 PP_ASSERT_WITH_CODE((1 <= data->dpm_table.pcie_speed_table.count),
   "There must be 1 or more PCIE levels defined in PPTable.",
   return -EINVAL);

 table->PCIeBootLinkLevel = (uint8_t)data->dpm_table.pcie_speed_table.count;
 table->PCIeGenInterval = 1;

 result = ci_populate_vr_config(hwmgr, table);
 PP_ASSERT_WITH_CODE(0 == result,
   "Failed to populate VRConfig setting!", return result);
 data->vr_config = table->VRConfig;

 ci_populate_smc_svi2_config(hwmgr, table);

 for (i = 0; i < SMU7_MAX_ENTRIES_SMIO; i++)
  CONVERT_FROM_HOST_TO_SMC_UL(table->Smio[i]);

 table->ThermGpio  = 17;
 table->SclkStepSize = 0x4000;
 if (atomctrl_get_pp_assign_pin(hwmgr, VDDC_VRHOT_GPIO_PINID, &gpio_pin)) {
  table->VRHotGpio = gpio_pin.uc_gpio_pin_bit_shift;
  phm_cap_set(hwmgr->platform_descriptor.platformCaps,
    PHM_PlatformCaps_RegulatorHot);
 } else {
  table->VRHotGpio = SMU7_UNUSED_GPIO_PIN;
  phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
    PHM_PlatformCaps_RegulatorHot);
 }

 table->AcDcGpio = SMU7_UNUSED_GPIO_PIN;

 CONVERT_FROM_HOST_TO_SMC_UL(table->SystemFlags);
 CONVERT_FROM_HOST_TO_SMC_UL(table->VRConfig);
 CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMaskVddcVid);
 CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMaskVddcPhase);
 CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMaskVddciVid);
 CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMaskMvddVid);
 CONVERT_FROM_HOST_TO_SMC_UL(table->SclkStepSize);
 CONVERT_FROM_HOST_TO_SMC_US(table->TemperatureLimitHigh);
 CONVERT_FROM_HOST_TO_SMC_US(table->TemperatureLimitLow);
 table->VddcVddciDelta = PP_HOST_TO_SMC_US(table->VddcVddciDelta);
 CONVERT_FROM_HOST_TO_SMC_US(table->VoltageResponseTime);
 CONVERT_FROM_HOST_TO_SMC_US(table->PhaseResponseTime);

 table->BootVddc = PP_HOST_TO_SMC_US(table->BootVddc * VOLTAGE_SCALE);
 table->BootVddci = PP_HOST_TO_SMC_US(table->BootVddci * VOLTAGE_SCALE);
 table->BootMVdd = PP_HOST_TO_SMC_US(table->BootMVdd * VOLTAGE_SCALE);

 /* Upload all dpm data to SMC memory.(dpm level, dpm level count etc) */
 result = ci_copy_bytes_to_smc(hwmgr, smu_data->dpm_table_start +
     offsetof(SMU7_Discrete_DpmTable, SystemFlags),
     (uint8_t *)&(table->SystemFlags),
     sizeof(SMU7_Discrete_DpmTable)-3 * sizeof(SMU7_PIDController),
     SMC_RAM_END);

 PP_ASSERT_WITH_CODE(0 == result,
  "Failed to upload dpm data to SMC memory!", return result;);

 result = ci_populate_initial_mc_reg_table(hwmgr);
 PP_ASSERT_WITH_CODE((0 == result),
  "Failed to populate initialize MC Reg table!", return result);

 result = ci_populate_pm_fuses(hwmgr);
 PP_ASSERT_WITH_CODE(0 == result,
   "Failed to  populate PM fuses to SMC memory!", return result);

 ci_start_smc(hwmgr);

 return 0;
}

static int ci_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
{
 struct ci_smumgr *ci_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 SMU7_Discrete_FanTable fan_table = { FDO_MODE_HARDWARE };
 uint32_t duty100;
 uint32_t t_diff1, t_diff2, pwm_diff1, pwm_diff2;
 uint16_t fdo_min, slope1, slope2;
 uint32_t reference_clock;
 int res;
 uint64_t tmp64;

 if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl))
  return 0;

 if (hwmgr->thermal_controller.fanInfo.bNoFan) {
  phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
   PHM_PlatformCaps_MicrocodeFanControl);
  return 0;
 }

 if (0 == ci_data->fan_table_start) {
  phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl);
  return 0;
 }

 duty100 = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, CG_FDO_CTRL1, FMAX_DUTY100);

 if (0 == duty100) {
  phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl);
  return 0;
 }

 tmp64 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMMin * duty100;
 do_div(tmp64, 10000);
 fdo_min = (uint16_t)tmp64;

 t_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usTMed - hwmgr->thermal_controller.advanceFanControlParameters.usTMin;
 t_diff2 = hwmgr->thermal_controller.advanceFanControlParameters.usTHigh - hwmgr->thermal_controller.advanceFanControlParameters.usTMed;

 pwm_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMMed - hwmgr->thermal_controller.advanceFanControlParameters.usPWMMin;
 pwm_diff2 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMHigh - hwmgr->thermal_controller.advanceFanControlParameters.usPWMMed;

 slope1 = (uint16_t)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100);
 slope2 = (uint16_t)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100);

 fan_table.TempMin = cpu_to_be16((50 + hwmgr->thermal_controller.advanceFanControlParameters.usTMin) / 100);
 fan_table.TempMed = cpu_to_be16((50 + hwmgr->thermal_controller.advanceFanControlParameters.usTMed) / 100);
 fan_table.TempMax = cpu_to_be16((50 + hwmgr->thermal_controller.advanceFanControlParameters.usTMax) / 100);

 fan_table.Slope1 = cpu_to_be16(slope1);
 fan_table.Slope2 = cpu_to_be16(slope2);

 fan_table.FdoMin = cpu_to_be16(fdo_min);

 fan_table.HystDown = cpu_to_be16(hwmgr->thermal_controller.advanceFanControlParameters.ucTHyst);

 fan_table.HystUp = cpu_to_be16(1);

 fan_table.HystSlope = cpu_to_be16(1);

 fan_table.TempRespLim = cpu_to_be16(5);

 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);

 fan_table.RefreshPeriod = cpu_to_be32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600);

 fan_table.FdoMax = cpu_to_be16((uint16_t)duty100);

 fan_table.TempSrc = (uint8_t)PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, CG_MULT_THERMAL_CTRL, TEMP_SEL);

 res = ci_copy_bytes_to_smc(hwmgr, ci_data->fan_table_start, (uint8_t *)&fan_table, (uint32_t)sizeof(fan_table), SMC_RAM_END);

 return res;
}

static int ci_program_mem_timing_parameters(struct pp_hwmgr *hwmgr)
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);

 if (data->need_update_smu7_dpm_table &
   (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK))
  return ci_program_memory_timing_parameters(hwmgr);

 return 0;
}

static int ci_update_sclk_threshold(struct pp_hwmgr *hwmgr)
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);

 int result = 0;
 uint32_t low_sclk_interrupt_threshold = 0;

 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
   PHM_PlatformCaps_SclkThrottleLowNotification)
  && (data->low_sclk_interrupt_threshold != 0)) {
  low_sclk_interrupt_threshold =
    data->low_sclk_interrupt_threshold;

  CONVERT_FROM_HOST_TO_SMC_UL(low_sclk_interrupt_threshold);

  result = ci_copy_bytes_to_smc(
    hwmgr,
    smu_data->dpm_table_start +
    offsetof(SMU7_Discrete_DpmTable,
     LowSclkInterruptT),
    (uint8_t *)&low_sclk_interrupt_threshold,
    sizeof(uint32_t),
    SMC_RAM_END);
 }

 result = ci_update_and_upload_mc_reg_table(hwmgr);

 PP_ASSERT_WITH_CODE((0 == result), "Failed to upload MC reg table!", return result);

 result = java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 PP_ASSERT_WITH_CODE((result == 0),
   "Failed to program  table->SVI2Enable =0java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
   );

 static int ci_start_smc(struct pp_hwmgr *hwmgr)
}

static uint32_t ci_get_offsetof(uint32_t type, uint32_t member)
{
 switch (type){
 case SMU_SoftRegisters:
  switch (member) {
  case HandshakeDisables:
   return  
   h-device, , 0;
   return offsetof(SMU7_SoftRegisters,java.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 94
  case AverageGraphicsActivity:
   return offsetof(SMU7_SoftRegisters, AverageGraphicsA
  case AverageMemoryActivity:
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  case PreVBlankGap:
   return offsetof(struct smu7_hwmgr *=(smu7_hwmgr >)
  case VBlankTimeout:
   return offsetof( config  VR_SVI2_PLANE_1
 case DRAM_LOG_ADDR_H:
   return offsetof(SMU7_SoftRegisters, DRAM_LOG_ADDR_H);
  case DRAM_LOG_ADDR_L:
  offsetof(SMU7_SoftRegisters,DRAM_LOG_ADDR_L)java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
  :
   return offsetof(SMU7_SoftRegisters, DRAM_LOG_PHY_ADDR_H);
  case DRAM_LOG_PHY_ADDR_L:
   return java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 0
  case DRAM_LOG_BUFF_SIZE:
   return offsetof(SMU7_SoftRegisters, DRAM_LOG_BUFF_SIZE);
  }
  break;
 case SMU_Discrete_DpmTable:
  switch (member) {
   LowSclkInterruptThreshold:
   return offsetof}
  }
  break;
 }
 pr_debug("can't get the offset of type %x member %x\n", -VRConfig | config<<VRCONF_MVDD_SHIFT;
 return 0;
}

static uint32_t ci_get_mac_definitionu value)
{
 switch (alue)java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
 case SMU_MAX_LEVELS_GRAPHICS:
  return SMU7_MAX_LEVELS_GRAPHICS;
 case SMU_MAX_LEVELS_MEMORY:
  return SMU7_MAX_LEVELS_MEMORY;
case :
  return SMU7_MAX_LEVELS_LINK ci_smumgr*smu_data=(truct java.lang.StringIndexOutOfBoundsException: Range [49, 47) out of bounds for length 71
 case   ;
  return java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 26
 case SMU_MAX_LEVELS_VDDGFX:
  return SMU7_MAX_LEVELS_VDDC;
 case :
  return
 case:
  return PHM_PlatformCaps_AutomaticD)
 }

 pr_debug("can't get the mac if (phm_cap_enabled(hwmgr-platform_descriptorplatformCaps,
 return 0;
}

static int ci_load_smc_ucode(struct pp_hwmgr *hwmgr)
{
 uint32_t byte_count start_addr;
 uint8_t *src;
 uint32_t data;

 java.lang.StringIndexOutOfBoundsException: Range [25, 7) out of bounds for length 37

 cgs_get_firmware_info(hwmgr-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 hwmgr PP_ASSERT_WITH_CODE=java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
 hwmgr->smu_version = info.version;
 byte_count = info.image_size;>,CGS_IND_REG__SMC
src  uint8_t *)nfo.kptrjava.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
 start_addr = info.ucode_start_address =ci_populate_all_graphic_levels(wmgr;

 if PP_ASSERT_WITH_CODE0 =result,
  pr_err("SMC address is beyond the SMC RAM area.\n");
  return -EINVAL;
 }

 PP_ASSERT_WITH_CODE(0= ,
 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 55

for ( byte_count =4;byte_count=4 java.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43
  data = (src[0"ailed  initialize Level!" returnresult)
  cgs_write_register(hwmgr-> "Failed to initialize ACPI LevelinitializeLevel!,return )
  src += 4;
 }
 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTLjava.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 33

if ( ! {
  pr_err("(0= result
   -java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
 }

 return 0;
}

java.lang.StringIndexOutOfBoundsException: Range [7, 6) out of bounds for length 53
{
 if (ci_is_smc_ram_running(hwmgr)) {
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return 0;
 }
 PHM_WAIT_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS,
   boot_seq_done, 1);
 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_MISC_CNTL,
   pre_fetcher_en, 1);

 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 1 P_ASSERT_WITH_CODE( =result,
 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, "to initializeBoot Level!"return ;
 return ci_load_smc_ucode(hwmgr);
}

static int ci_process_firmware_header(struct pp_hwmgr *hwmgr)
{
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 struct java.lang.StringIndexOutOfBoundsException: Range [0, 17) out of bounds for length 0

 uint32_t tmp = 0;
 intresult;
 bool error = false;

 if (java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 0
  return -EINVAL;

 result = ci_read_smc_sram_dword(hwmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
    offsetof(SMU7_Firmware_Header, DpmTable),
    &tmp, SMC_RAM_END);

 if (0 == result)
  ci_data->dpm_table_start>= 1;

 error |= (0 != result);

 result =ci_read_smc_sram_dword(hwmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
    offsetof(SMU7_Firmware_Header, SoftRegisters),
    &tmp, SMC_RAM_END);

  0==result) {
  data->soft_regs_start = tmp;
  ci_data->soft_regs_start = table->emoryVoltageChangeEnable;
 }

 error |= (0 != result);

 result = ->MemoryThermThrottleEnable
    SMU7_FIRMWARE_HEADER_LOCATION +
   S,
    &tmp, SMC_RAM_END);

 if (0 == result)
  ci_data->mc_reg_table_start

 result = ci_read_smc_sram_dword(hwmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
    offsetof  h,table
  );

if( =result)
  ci_data->fan_table_start = tmp;

 error |= (

 result = ci_read_smc_sram_dword(hwmgr,
    java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 0
    offsetof(SMU7_Firmware_Header, mcArbDramTimingTable),
  &tmp,SMC_RAM_END)java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23

 if (table-SclkStepSize = 0x4000;
  ci_data->arb_table_start = tmp;

 error |= (0 != result)ijava.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 52

 =ci_read_smc_sram_dword(hwmgr,
    SMU7_FIRMWARE_HEADER_LOCATION +
    offsetof } else {
    &tmp, SMC_RAM_END);

 if (0 == result)
  ->microcode_version_info.SMC = tmp;

 error |= (0 table->AcDcGpio=SMU7_UNUSED_GPIO_PIN;

 return error ? 1 : 0;
}

static uint8_t  CONVERT_FROM_HOST_TO_SMC_UL(table-CONVERT_FROM_HOST_TO_SMC_ULtable->ystemFlags);
{
 return (uint8_t(able>mioMaskVddcVid)java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
}

static(uint16_t in_reg, out_reg)
{
 bool result = true;

 switch (in_reg) {
 case  mmMC_SEQ_RAS_TIMING:
  *out_reg = mmMC_SEQ_RAS_TIMING_LP;
 break;

 case  mmMC_SEQ_DLL_STBY:
  *=mmMC_SEQ_DLL_STBY_LP;
  break;

   :
  *out_reg = mmMC_SEQ_G5PDX_CMD0_LP;
  break;

 case  mmMC_SEQ_G5PDX_CMD1:
    java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
  break;

  ( SystemFlags)java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51
  *out_reg =  sizeof(SMU7_Discrete_DpmTable*sizeof(MU7_PIDController,
  break;

 case mmMC_SEQ_CAS_TIMING:
  *out_reg= mmMC_SEQ_CAS_TIMING_LP;
  break;

 case mmMC_SEQ_MISC_TIMING:
  *out_reg = mmMC_SEQ_MISC_TIMING_LP;
  break;

 case mmMC_SEQ_MISC_TIMING2:
  *out_reg = mmMC_SEQ_MISC_TIMING2_LP;
  break;

 case mmMC_SEQ_PMG_DVS_CMD:
  *out_reg = mmMC_SEQ_PMG_DVS_CMD_LP;
  break;

 case java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
  ci_start_smc(hwmgr);
  break;

 case mmMC_SEQ_RD_CTL_D0:
  *out_reg = mmMC_SEQ_RD_CTL_D0_LP;
  break}

static int ci_thermal_setup_fan_table(  )
  *out_reg = mmMC_SEQ_RD_CTL_D1_LP;
  break;

 case mmMC_SEQ_WR_CTL_D0:
  *out_reg = mmMC_SEQ_WR_CTL_D0_LP;
  break;

 case mmMC_SEQ_WR_CTL_D1uint16_tfdo_min, slope1,, slope2;
  *out_reg = mmMC_SEQ_WR_CTL_D1_LP;
  breakjava.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8

 case mmMC_PMG_CMD_EMRS:
  *out_reg = mmMC_SEQ_PMG_CMD_EMRS_LP;
  break;

 case mmMC_PMG_CMD_MRS:
  *out_reg = mmMC_SEQ_PMG_CMD_MRS_LP;
  break;

 case mmMC_PMG_CMD_MRS1:
 *out_reg = mmMC_SEQ_PMG_CMD_MRS1_LP;
  break;

 case mmMC_SEQ_PMG_TIMING:
  *out_reg = mmMC_SEQ_PMG_TIMING_LP;
  break;

java.lang.StringIndexOutOfBoundsException: Range [55, 24) out of bounds for length 24
  *out_reg
java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8

 case mmMC_SEQ_WR_CTL_2:
  *out_reg = mmMC_SEQ_WR_CTL_2_LP;
  break;

 default:
  result = false;
  break;
 }

 return result
}

static (struct ci_mc_reg_table *able)
{
 uint32_t i;
 uint16_t address;

  ( =0 <table-last; i+) {
  table->mc_reg_address[i].s0 =
    pwm_diff2 = hwmgrthermal_controller..advanceFanControlParameters.usPWMHigh ->hermal_controller.advanceFanControlParameters.usPWMMed;
   ? address : table->mc_reg_address[i].s1;
 }
 return 0;
}

static int ci_copy_vbios_smc_reg_table(const pp_atomctrl_mc_reg_table *table,
     struct ci_mc_reg_table *ni_table)
{
 uint8_t i, j;

 PP_ASSERT_WITH_CODE((table->last <= SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE),
  "Invalid VramInfo table.", return -EINVAL);
 PP_ASSERT_WITH_CODE
, return -INVAL;

 for (i java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  ni_table->mc_reg_address[i].s1 = table->mc_reg_address[

 ni_table->last = table->last;

 for (i = 0; i < table->num_entries; i++) {
  ni_table->mc_reg_table_entry[i].mclk_max =
   table->mc_reg_table_entry[i].mclk_max;
  for (j = 0; j < table- fan_table.HystUp  cpu_to_be16(1)java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
  fan_table.HystSlope = cpu_to_be16(1);
    table->mc_reg_table_entry[i].mc_data[j];
  }
 }

 ni_table->num_entries = table->num_entries;

 return 0;
}

static int ci_set_mc_special_registers(truct  *hwmgr,
     struct ci_mc_reg_table *table)
{
 uint8_t i, j, k;
 uint32_t temp_reg;
 smu7_hwmgr *data =struct smu7_hwmgr *)(hwmgr->backend);

 for (i = 0, j = table->last; i < table->last; i++) {
  PP_ASSERT_WITH_CODE((j < SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE),
   "Invalid VramInfo table.", return ;

  switch (table->mc_reg_address[i].s1) {

  case mmMC_SEQ_MISC1:
   temp_reg = cgs_read_register(hwmgr->struct smu7_hwmgr *data =(struct smu7_hwmgr *)(hwmgr->backend);
   table->mc_reg_address[jif (data->need_update_smu7_dpm_table &
 table>mc_reg_addressj.s0 =mmMC_SEQ_PMG_CMD_EMRS_LP;
   for (k = 0; k < table->num_entries; k++) {
    table->mc_reg_table_entry[k].mc_data[j] =
     ((temp_reg & 0xffff0000)) |
     ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
   }
   j++;

   PP_ASSERT_WITH_CODE((j < SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE),
    "Invalid VramInfo table.", return -EINVAL);
   temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS);
   table->mc_reg_address[j].java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   uint32_t  0
   for (k = 0; k < table->num_entries; k++) {
    table->mc_reg_table_entry[k].mc_data[j] =
     (emp_reg & 0xffff0000) |
     (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);

    if (!data->is_memory_gddr5)
    ->mc_reg_table_entry[].c_data[j |=0;
   }
   CONVERT_FROM_HOST_TO_SMC_UL(ow_sclk_interrupt_threshold)

   if (!data->is_memory_gddr5) {
    PP_ASSERT_WITH_CODE((j,
    "Invalid VramInfo table.", return -EINVAL);
    table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD;   offsetof(SMU7_Discrete_DpmTable,
    table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD;
    for (k = 0; k < table->num_entries; k++) {
     table->mc_reg_table_entry[k].mc_data[j] =
      (table->java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 2
    }
    j++;
   }

   break PP_ASSERT_WITH_CODE((0 == result), "Failed to upload MC reg table!", return result);

  case mmMC_SEQ_RESERVE_M:
  result= ci_program_mem_timing_parameters(hwmgr);
   table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS1;
   table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS1_LP PP_ASSERT_WITH_CODE((result == 0),
   for (k = 0; k < table->num_entries; k++) {
   table>mc_reg_table_entry[k]mc_data[j] java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45
     (temp_reg & 0xffff0000) |
     (table->mc_reg_table_entry[k].mc_data[i] uint32_t member)
   }
   j++;
   break;

  default:
   break;
  }

 }

 table->last = j;

 return 0;
}

static int ci_set_valid_flag(struct ci_mc_reg_table *table)
{
 uint8_t i, j;

 for (i = 0; iGraphicsActivity
   returnoffsetof(SMU7_SoftRegisters,AverageGraphicsA);
   if (table->mc_reg_table_entry[j-1].mc_data[i] !=
   >mc_reg_table_entryj.[i]){
    table->validflag |= (1 << i);
    break;
   }
  }
 }

 return 0;
}

static int ci_initialize_mc_reg_table return offsetof(SMU7_SoftRegisters, PreVBlankGap);
{
 int java.lang.StringIndexOutOfBoundsException: Range [56, 12) out of bounds for length 56
 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend);
 pp_atomctrl_mc_reg_table *table;
 struct ci_mc_reg_table *ni_table = &smu_data->mc_reg_table;
 uint8_t module_index = ci_get_memory_modile_index(hwmgr);

 java.lang.StringIndexOutOfBoundsException: Range [23, 6) out of bounds for length 63

 if (NULL == table)
 ;

 /* Program additional LP registers that are no longer programmed by VBIOS */
 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(java.lang.StringIndexOutOfBoundsException: Index 79 out of bounds for length 62
 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(java.lang.StringIndexOutOfBoundsException: Index 77 out of bounds for length 8
 cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgrpr_debug("can't get the oftype %x member %x\n", type, member);
 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, java.lang.StringIndexOutOfBoundsException: Index 70 out of bounds for length 10
 cgs_write_register(hwmgr->java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 0
 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL));
 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP{
 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL));
 cgs_write_register(hwmgr->device, java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 30
 cgs_write_register(hwmgr->device mmMC_SEQ_MISC_TIMING2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));
 (-device mmMC_SEQ_PMG_CMD_EMRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS));
 return SMU7_MAX_LEVELS_MEMORY
 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS1_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1));
 cgs_write_registerSMU7_MAX_ENTRIES_SMIO
 cgs_write_register caseSMU_MAX_LEVELS_VDDC:
 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LPcaseSMU_MAX_LEVELS_VDDGFX:
 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_registerreturn SMU7_MAX_LEVELS_VDDC;
 cgs_write_register(hwmgr->device, case SMU_MAX_LEVELS_VDDCI
 ce,mmMC_SEQ_PMG_CMD_MRS2_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2));
 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP case SMU_MAX_LEVELS_MVDD:

 result = atomctrl_initialize_mc_reg_table(hwmgr, module_index, table);

 if (0 == result)
  result = ci_copy_vbios_smc_reg_table(static int ci_load_smc_ucode(struct pp_hwmgr *hwmgr)

 if (0 ==  byte_count
  ci_set_s0_mc_reg_index(ni_table);
  result = ci_set_mc_special_registers(hwmgr, ni_tablejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 }

 if (0 == result)
  ci_set_valid_flag(ni_table);

 kfree(table);

 return result;
}

static bool ci_is_dpm_running(struct pp_hwmgr *hwmgr)
{
 return ci_is_smc_ram_running(hwmgr);
}

static int ci_smu_init(struct pp_hwmgr *hwmgr)
{
 struct ci_smumgr *ci_priv;

 ci_priv = kzalloc(sizeof(struct ci_smumgr), GFP_KERNEL);

 if (ci_priv == java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 0
  return -ENOMEM;

 hwmgr->smu_backend = ci_priv;

 return 0;
}

static int if  (byte_count > SMC_RAM_END
{
 kfree(hwmgr->smu_backend);
 hwmgr->smu_backend = NULL;
 return 0;
}

static int(truct pp_hwmgr*hwmgr)
{
 return 0;
}

static int ci_update_dpm_settings(struct pp_hwmgr *hwmgr,
   void profile_setting
{  + 4;
 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 struct ci_smumgr *smu_data = (struct ci_smumgr *)
   (hwmgr->smu_backend);
 struct profile_mode_setting *setting;
 struct SMU7_Discrete_GraphicsLevel *levels =java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
   smu_data->smc_state_table.GraphicsLevel;
 uint32_t array
  SMU7_Discrete_DpmTable, GraphicsLevel;

 uint32_t  =smu_data- +
   offsetofpr_info" running,no  to  smc \n");
  SMU7_Discrete_MemoryLevel *clk_levels=
 smu_data->smc_state_table.MemoryLevel;
 uint32_t i;
 PHM_WAIT_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS,

if(rofile_setting= NULL)
 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_MISC_CNTL,

 setting = (struct profile_mode_setting *)profile_setting;

 if (setting>){
  if (!data->sclk_dpm_key_disabled)
   smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel, NULL
  for (i = 0; i <  int ci_process_firmware_header  *java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61
   if (levels[i].ActivityLevel !=
    cpu_to_be16(setting->sclk_activity)) {
    levels[i]. uint32_ttmp = 0java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18

    clk_activity_offset = array  
      + offsetof(java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 17
    offset = clk_activity_offset & ~0x3;
   &,)
    tmp = phm_set_field_to_u32(java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 17
    cgs_write_ind_register(hwmgr->device  =( ! java.lang.StringIndexOutOfBoundsException: Range [23, 22) out of bounds for length 24

   }
   if (levels   ;
    levels[i].DownH != setting->sclk_down_hyst
    levels[i].UpH = setting->sclk_up_hyst;
    levels[i].DownH = setting->sclk_down_hyst
    up_hyst_offset = )
      + offsetof( = ci_read_smc_sram_dword
    down_hyst_offset = array + (offsetof(SMU7_Firmware_Header, mcRegisterTable),
   +java.lang.StringIndexOutOfBoundsException: Range [46, 44) out of bounds for length 53
    offset = up_hyst_offset & ~0x3;
    tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register =(java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
     ,tmp ()
     ,i. u)
    cgs_write_ind_register( ( =resultjava.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
   }
  }
  if (!data->sclk_dpm_key_disabled)
 hwmgrPPSMC_MSG_SCLKDPM_UnfreezeLevelNULL
 }

 if (setting->bupdate_mclk) {
  !-)
   java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  for (i = 0; i _ )
   if (mclk_levels[i].ActivityLevel !=
    ->microcode_version_info =
    mclk_levels[i].java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 24

    clk_activity_offset = mclk_array + (sizeof(java.lang.StringIndexOutOfBoundsException: Range [0, 72) out of bounds for length 0
     (&hwmgr-device,mmBIOS_SCRATCH_4>16)
    offset = clk_activity_offset & ~0x3;
 bool(int16_tin_reg uint16_t *)
    tmp {
   hwmgr-device , offset,PP_HOST_TO_SMC_UL(tmp));

   }
  mclk_levels[] ! setting-mclk_up_hyst|
      mmMC_SEQ_RAS_TIMING
>mclk_up_hyst;
    mclk_levels[i].DownH = setting->mclk_down_hyst;
    up_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i)
      + offsetof(SMU7_Discrete_MemoryLevel, UpH);
     + (sizeof(MU7_Discrete_MemoryLevel) * i)
      + offsetof(SMU7_Discrete_MemoryLevel, DownH);
    offset = up_hyst_offset & ~0x3;
    tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));
    tmp = case  mmMC_SEQ_G5PDX_CMD0:
    tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownH, sizeof(uint8_t));
    cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_ULbreak;
   }
  }
  if (!data->mclk_dpm_key_disabled)
   smum_send_msg_to_smc
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
 return 0;
}

static int ci_update_uvd_smc_table(struct pp_hwmgr  out_reg=mmMC_SEQ_CAS_TIMING_LP
{
 struct case:
 structsmu7_hwmgrdata  hwmgr-backendjava.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
 struct java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 0
 struct phm_uvd_clock_voltage_dependency_table *uvd_table =
   hwmgr->dyn_state.uvd_clock_voltage_dependency_table;
 t profile_mode_mask = AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD |
     AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK |
     java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 0
     AMD_DPM_FORCED_LEVEL_PROFILE_PEAK;
 uint32_t max_vddc = adev->pm.ac_power ? hwmgr->dyn_state.max_clock_voltage_on_ac.vddc :
      hwmgr-->yn_statemax_clock_voltage_on_dc.vddc;
 int32_t i;

 if (PP_CAP(PHM_PlatformCaps_UVDDPM) || uvd_table->count <= 0
 .UvdBootLevel =0;
 else
  smu_data->mc_state_table.UvdBootLevel = uvd_table->count - 1;

 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC break;
    UvdBootLevel, smu_data->smc_state_table.UvdBootLevel);

  casemmMC_SEQ_RD_CTL_D0:

 for (i = uvd_table->count - 1; i >= 0; i--) {
  if (uvd_table->entries[i].v <= max_vddc)
   data->dpm_level_enable_mask.java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 0
  if *=;
   break;
 }
 smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_UVDDPM_SetEnabledMaskjava.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25
    data->dpm_level_enable_mask.uvd_dpm_enable_mask,
    NULL);

 return 0;
}

static int ci_update_vce_smc_table(struct pp_hwmgr *hwmgr)
{
 struct amdgpu_device *adev = hwmgr->adev;
 struct smu7_hwmgr *data = hwmgr->backend;
 struct phm_vce_clock_voltage_dependency_table *vce_table =
  ->yn_state.vce_clock_voltage_dependency_table;
 uint32_t profile_mode_mask = java.lang.StringIndexOutOfBoundsException: Index 67 out of bounds for length 8
     |
    AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK
     AMD_DPM_FORCED_LEVEL_PROFILE_PEAK;
uint32_t max_vddc=adev-p.ac_power? hwmgr->dyn_state.. :
      -dyn_state.max_clock_voltage_on_dcvddc;
 int32_t i;

  mmMC_SEQ_WR_CTL_2
   VceBootLevel 0) /* temp hard code to level 0, vce can set min evclk*/

 data->dpm_level_enable_mask.vce_dpm_enable_mask = 0;

 for (i =  result = false
  if (vce_table->entries[i].v <= max_vddc java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
 return result;
  if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_VCEDPM))
   break;
 }
smum_send_msg_to_smc_with_parameter(hwmgr,PPSMC_MSG_VCEDPM_SetEnabledMask,
    data->dpm_level_enable_mask.vce_dpm_enable_mask,
    NULL);

 return 0;
}for(  0;i<table>;i+{

static int ci_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type)
  (->c_reg_addressi]s1 &address)
 switch (type) {
caseSMU_UVD_TABLE
  ci_update_uvd_smc_table;
  break;
 case SMU_VCE_TABLE:
  ci_update_vce_smc_table(hwmgr);
  break;
 default:
  break;
 }
 return 0;
}

static  ci_reset_smc(truct hwmgr)
{
wmgr-device java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58
      SMC_SYSCON_RESET_CNTL,
      rst_reg, 1);
}


static void ci_stop_smc_clock(struct pp_hwmgr *hwmgr)
{
 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
      SMC_SYSCON_CLOCK_CNTL_0,
      ck_disable, 1);
}

static intci_stop_smcstruct pp_hwmgr *hwmgr)
{
   table-mc_reg_table_entry[i].mc_data[j];
 ci_stop_smc_clock(hwmgr);

 return 0;
}

const struct pp_smumgr_func ci_smu_funcs = {
 .name = "ci_smu",
 .smu_init = ci_smu_init,
 .smu_fini = ci_smu_fini,
 .start_smu = ci_start_smu,
 .check_fw_load_finish = NULL,
 .
 .request_smu_load_specific_fw = NULL,
 .send_msg_to_smc = ci_send_msg_to_smc,
 java.lang.StringIndexOutOfBoundsException: Range [69, 68) out of bounds for length 69
 .get_argument = smu7_get_argument,
 .download_pptable_settings = NULL,
 .upload_pptable_settings = NULL,
 .get_offsetof = ci_get_offsetof,
 .process_firmware_header = ci_process_firmware_header,
 .init_smc_table = ci_init_smc_table,
 .update_sclk_threshold = ci_update_sclk_threshold,
 .thermal_setup_fan_table = ci_thermal_setup_fan_table,
 .populate_all_graphic_levels = ci_populate_all_graphic_levels,
 .populate_all_memory_levels = ci_populate_all_memory_levels,
. =,
 = java.lang.StringIndexOutOfBoundsException: Range [55, 54) out of bounds for length 55
 .is_dpm_running = ci_is_dpm_running,
 .update_dpm_settings = java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 4

 .stop_smc  (j  SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE)
};