/** * DPU_SSPP_RECT_SOLO - multirect disabled * DPU_SSPP_RECT_0 - rect0 of a multirect pipe * DPU_SSPP_RECT_1 - rect1 of a multirect pipe * * Note: HW supports multirect with either RECT0 or * RECT1. Considering no benefit of such configs over * SOLO mode and to keep the plane management simple, * we dont support single rect multirect configs.
*/ enum dpu_sspp_multirect_index {
DPU_SSPP_RECT_SOLO = 0,
DPU_SSPP_RECT_0,
DPU_SSPP_RECT_1,
};
struct dpu_hw_pixel_ext { /* scaling factors are enabled for this input layer */
uint8_t enable_pxl_ext;
int init_phase_x[DPU_MAX_PLANES]; int phase_step_x[DPU_MAX_PLANES]; int init_phase_y[DPU_MAX_PLANES]; int phase_step_y[DPU_MAX_PLANES];
/* * Number of pixels extension in left, right, top and bottom direction * for all color components. This pixel value for each color component * should be sum of fetch + repeat pixels.
*/ int num_ext_pxls_left[DPU_MAX_PLANES]; int num_ext_pxls_right[DPU_MAX_PLANES]; int num_ext_pxls_top[DPU_MAX_PLANES]; int num_ext_pxls_btm[DPU_MAX_PLANES];
/* * Number of pixels needs to be overfetched in left, right, top and * bottom directions from source image for scaling.
*/ int left_ftch[DPU_MAX_PLANES]; int right_ftch[DPU_MAX_PLANES]; int top_ftch[DPU_MAX_PLANES]; int btm_ftch[DPU_MAX_PLANES];
/* * Number of pixels needs to be repeated in left, right, top and * bottom directions for scaling.
*/ int left_rpt[DPU_MAX_PLANES]; int right_rpt[DPU_MAX_PLANES]; int top_rpt[DPU_MAX_PLANES]; int btm_rpt[DPU_MAX_PLANES];
/* * Filter type to be used for scaling in horizontal and vertical * directions
*/ enum dpu_hw_filter horz_filter[DPU_MAX_PLANES]; enum dpu_hw_filter vert_filter[DPU_MAX_PLANES];
};
/** * struct dpu_sw_pipe_cfg : software pipe configuration * @src_rect: src ROI, caller takes into account the different operations * such as decimation, flip etc to program this field * @dest_rect: destination ROI. * @rotation: simplified drm rotation hint
*/ struct dpu_sw_pipe_cfg { struct drm_rect src_rect; struct drm_rect dst_rect; unsignedint rotation;
};
/** * struct dpu_hw_pipe_ts_cfg - traffic shaper configuration * @size: size to prefill in bytes, or zero to disable * @time: time to prefill in usec, or zero to disable
*/ struct dpu_hw_pipe_ts_cfg {
u64 size;
u64 time;
};
/** * struct dpu_sw_pipe - software pipe description * @sspp: backing SSPP pipe * @index: index of the rectangle of SSPP * @mode: parallel or time multiplex multirect mode
*/ struct dpu_sw_pipe { struct dpu_hw_sspp *sspp; enum dpu_sspp_multirect_index multirect_index; enum dpu_sspp_multirect_mode multirect_mode;
};
/** * struct dpu_hw_sspp_ops - interface to the SSPP Hw driver functions * Caller must call the init function to get the pipe context for each pipe * Assumption is these functions will be called after clocks are enabled
*/ struct dpu_hw_sspp_ops { /** * setup_format - setup pixel format cropping rectangle, flip * @pipe: Pointer to software pipe context * @cfg: Pointer to pipe config structure * @flags: Extra flags for format config
*/ void (*setup_format)(struct dpu_sw_pipe *pipe, conststruct msm_format *fmt, u32 flags);
/** * setup_rects - setup pipe ROI rectangles * @pipe: Pointer to software pipe context * @cfg: Pointer to pipe config structure
*/ void (*setup_rects)(struct dpu_sw_pipe *pipe, struct dpu_sw_pipe_cfg *cfg);
/** * setup_cdp - setup client driven prefetch * @pipe: Pointer to software pipe context * @fmt: format used by the sw pipe * @enable: whether the CDP should be enabled for this pipe
*/ void (*setup_cdp)(struct dpu_sw_pipe *pipe, conststruct msm_format *fmt, bool enable);
};
/** * struct dpu_hw_sspp - pipe description * @base: hardware block base structure * @hw: block hardware details * @ubwc: UBWC configuration data * @idx: pipe index * @cap: pointer to layer_cfg * @ops: pointer to operations possible for this pipe
*/ struct dpu_hw_sspp { struct dpu_hw_blk base; struct dpu_hw_blk_reg_map hw; conststruct qcom_ubwc_cfg_data *ubwc;
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