#define AD5421_REG_DAC_DATA 0x1 #define AD5421_REG_CTRL 0x2 #define AD5421_REG_OFFSET 0x3 #define AD5421_REG_GAIN 0x4 /* load dac and fault shared the same register number. Writing to it will cause
* a dac load command, reading from it will return the fault status register */ #define AD5421_REG_LOAD_DAC 0x5 #define AD5421_REG_FAULT 0x5 #define AD5421_REG_FORCE_ALARM_CURRENT 0x6 #define AD5421_REG_RESET 0x7 #define AD5421_REG_START_CONVERSION 0x8 #define AD5421_REG_NOOP 0x9
/* These bits will cause the fault pin to go high */ #define AD5421_FAULT_TRIGGER_IRQ \
(AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
/** * struct ad5421_state - driver instance specific data * @spi: spi_device * @ctrl: control register cache * @current_range: current range which the device is configured for * @data: spi transfer buffers * @fault_mask: software masking of events * @lock: lock to protect the data buffer during SPI ops
*/ struct ad5421_state { struct spi_device *spi; unsignedint ctrl; enum ad5421_current_range current_range; unsignedint fault_mask; struct mutex lock;
/* * DMA (thus cache coherency maintenance) may require the * transfer buffers to live in their own cache lines.
*/ union {
__be32 d32;
u8 d8[4];
} data[2] __aligned(IIO_DMA_MINALIGN);
};
fault = ad5421_read(indio_dev, AD5421_REG_FAULT); if (!fault) return IRQ_NONE;
/* If we had a fault, this might mean that the DAC has lost its state * and has been reset. Make sure that the control register actually * contains what we expect it to contain. Otherwise the watchdog might * be enabled and we get watchdog timeout faults, which will render the
* DAC unusable. */
ad5421_update_ctrl(indio_dev, 0, 0);
/* The fault pin stays high as long as a fault condition is present and * it is not possible to mask fault conditions. For certain fault * conditions for example like over-temperature it takes some time * until the fault condition disappears. If we would exit the interrupt * handler immediately after handling the event it would be entered * again instantly. Thus we fall back to polling in case we detect that * a interrupt condition is still present.
*/ do { /* 0xffff is a invalid value for the register and will only be
* read if there has been a communication error */ if (fault == 0xffff)
fault = 0;
/* we are only interested in new events */
events = (old_fault ^ fault) & fault;
events &= st->fault_mask;
staticint ad5421_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long m)
{ struct ad5421_state *st = iio_priv(indio_dev); unsignedint min, max; int ret;
if (chan->type != IIO_CURRENT) return -EINVAL;
switch (m) { case IIO_CHAN_INFO_RAW:
ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA); if (ret < 0) return ret;
*val = ret; return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE:
ad5421_get_current_min_max(st, &min, &max);
*val = max - min;
*val2 = (1 << 16) * 1000; return IIO_VAL_FRACTIONAL; case IIO_CHAN_INFO_OFFSET:
*val = ad5421_get_offset(st); return IIO_VAL_INT; case IIO_CHAN_INFO_CALIBBIAS:
ret = ad5421_read(indio_dev, AD5421_REG_OFFSET); if (ret < 0) return ret;
*val = ret - 32768; return IIO_VAL_INT; case IIO_CHAN_INFO_CALIBSCALE:
ret = ad5421_read(indio_dev, AD5421_REG_GAIN); if (ret < 0) return ret;
*val = ret; return IIO_VAL_INT;
}
return -EINVAL;
}
staticint ad5421_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask)
{ constunsignedint max_val = 1 << 16;
switch (mask) { case IIO_CHAN_INFO_RAW: if (val >= max_val || val < 0) return -EINVAL;
return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val); case IIO_CHAN_INFO_CALIBBIAS:
val += 32768; if (val >= max_val || val < 0) return -EINVAL;
return ad5421_write(indio_dev, AD5421_REG_OFFSET, val); case IIO_CHAN_INFO_CALIBSCALE: if (val >= max_val || val < 0) return -EINVAL;
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