#define dprintk(level, fmt, arg...) do { \ if (debug >= level) \
printk(KERN_DEBUG KBUILD_MODNAME ": %s " fmt, __func__, ##arg); \
} while (0)
staticinline u32 Frac28a(u32 a, u32 c)
{ int i = 0;
u32 Q1 = 0;
u32 R0 = 0;
R0 = (a % c) << 4; /* 32-28 == 4 shifts possible at max */
Q1 = a / c; /* *integerpart,onlythe4leastsignificant *bitswillbevisibleintheresult
*/
/* division using radix 16, 7 nibbles in the result */ for (i = 0; i < 7; i++) {
Q1 = (Q1 << 4) | (R0 / c);
R0 = (R0 % c) << 4;
} /* rounding */ if ((R0 >> 3) >= c)
Q1++;
staticint power_up_device(struct drxk_state *state)
{ int status;
u8 data = 0;
u16 retry_count = 0;
dprintk(1, "\n");
status = i2c_read1(state, state->demod_address, &data); if (status < 0) { do {
data = 0;
status = i2c_write(state, state->demod_address,
&data, 1);
usleep_range(10000, 11000);
retry_count++; if (status < 0) continue;
status = i2c_read1(state, state->demod_address,
&data);
} while (status < 0 &&
(retry_count < DRXK_MAX_RETRIES_POWERUP)); if (status < 0 && retry_count >= DRXK_MAX_RETRIES_POWERUP) goto error;
}
/* Make sure all clk domains are active */
status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_NONE); if (status < 0) goto error;
status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); if (status < 0) goto error; /* Enable pll lock tests */
status = write16(state, SIO_CC_PLL_LOCK__A, 1); if (status < 0) goto error;
state->m_current_power_mode = DRX_POWER_UP;
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__);
if (!enable) {
desired_ctrl = SIO_OFDM_SH_OFDM_RING_ENABLE_OFF;
desired_status = SIO_OFDM_SH_OFDM_RING_STATUS_DOWN;
}
status = read16(state, SIO_OFDM_SH_OFDM_RING_STATUS__A, &data); if (status >= 0 && data == desired_status) { /* tokenring already has correct status */ return status;
} /* Disable/enable dvbt tokenring bridge */
status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, desired_ctrl);
end = jiffies + msecs_to_jiffies(DRXK_OFDM_TR_SHUTDOWN_TIMEOUT); do {
status = read16(state, SIO_OFDM_SH_OFDM_RING_STATUS__A, &data); if ((status >= 0 && data == desired_status)
|| time_is_after_jiffies(end)) break;
usleep_range(1000, 2000);
} while (1); if (data != desired_status) {
pr_err("SIO not ready\n"); return -EINVAL;
} return status;
}
staticint mpegts_stop(struct drxk_state *state)
{ int status = 0;
u16 fec_oc_snc_mode = 0;
u16 fec_oc_ipr_mode = 0;
dprintk(1, "\n");
/* Graceful shutdown (byte boundaries) */
status = read16(state, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode); if (status < 0) goto error;
fec_oc_snc_mode |= FEC_OC_SNC_MODE_SHUTDOWN__M;
status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); if (status < 0) goto error;
/* Suppress MCLK during absence of data */
status = read16(state, FEC_OC_IPR_MODE__A, &fec_oc_ipr_mode); if (status < 0) goto error;
fec_oc_ipr_mode |= FEC_OC_IPR_MODE_MCLK_DIS_DAT_ABS__M;
status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode);
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__);
return status;
}
staticint scu_command(struct drxk_state *state,
u16 cmd, u8 parameter_len,
u16 *parameter, u8 result_len, u16 *result)
{ #if (SCU_RAM_PARAM_0__A - SCU_RAM_PARAM_15__A) != 15 #error DRXK register mapping no longer compatible with this routine! #endif
u16 cur_cmd = 0; int status = -EINVAL; unsignedlong end;
u8 buffer[34]; int cnt = 0, ii; constchar *p; char errname[30];
/* assume that the command register is ready
since it is checked afterwards */ if (parameter) { for (ii = parameter_len - 1; ii >= 0; ii -= 1) {
buffer[cnt++] = (parameter[ii] & 0xFF);
buffer[cnt++] = ((parameter[ii] >> 8) & 0xFF);
}
}
buffer[cnt++] = (cmd & 0xFF);
buffer[cnt++] = ((cmd >> 8) & 0xFF);
write_block(state, SCU_RAM_PARAM_0__A -
(parameter_len - 1), cnt, buffer); /* Wait until SCU has processed command */
end = jiffies + msecs_to_jiffies(DRXK_MAX_WAITTIME); do {
usleep_range(1000, 2000);
status = read16(state, SCU_RAM_COMMAND__A, &cur_cmd); if (status < 0) goto error;
} while (!(cur_cmd == DRX_SCU_READY) && (time_is_after_jiffies(end))); if (cur_cmd != DRX_SCU_READY) {
pr_err("SCU not ready\n");
status = -EIO; goto error2;
} /* read results */ if ((result_len > 0) && (result != NULL)) {
s16 err; int ii;
for (ii = result_len - 1; ii >= 0; ii -= 1) {
status = read16(state, SCU_RAM_PARAM_0__A - ii,
&result[ii]); if (status < 0) goto error;
}
/* Check if an error was reported by SCU */
err = (s16)result[0]; if (err >= 0) goto error;
/* check for the known error codes */ switch (err) { case SCU_RESULT_UNKCMD:
p = "SCU_RESULT_UNKCMD"; break; case SCU_RESULT_UNKSTD:
p = "SCU_RESULT_UNKSTD"; break; case SCU_RESULT_SIZE:
p = "SCU_RESULT_SIZE"; break; case SCU_RESULT_INVPAR:
p = "SCU_RESULT_INVPAR"; break; default: /* Other negative values are errors */
sprintf(errname, "ERROR: %d\n", err);
p = errname;
}
pr_err("%s while sending cmd 0x%04x with params:", p, cmd);
print_hex_dump_bytes("drxk: ", DUMP_PREFIX_NONE, buffer, cnt);
status = -EINVAL; goto error2;
}
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__);
error2:
mutex_unlock(&state->mutex); return status;
}
staticint set_iqm_af(struct drxk_state *state, bool active)
{
u16 data = 0; int status;
dprintk(1, "\n");
/* Configure IQM */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
if (!active) {
data |= (IQM_AF_STDBY_STDBY_ADC_STANDBY
| IQM_AF_STDBY_STDBY_AMP_STANDBY
| IQM_AF_STDBY_STDBY_PD_STANDBY
| IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY
| IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY);
} else {
data &= ((~IQM_AF_STDBY_STDBY_ADC_STANDBY)
& (~IQM_AF_STDBY_STDBY_AMP_STANDBY)
& (~IQM_AF_STDBY_STDBY_PD_STANDBY)
& (~IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY)
& (~IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY)
);
}
status = write16(state, IQM_AF_STDBY__A, data);
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticint ctrl_power_mode(struct drxk_state *state, enum drx_power_mode *mode)
{ int status = 0;
u16 sio_cc_pwd_mode = 0;
dprintk(1, "\n");
/* Check arguments */ if (mode == NULL) return -EINVAL;
switch (*mode) { case DRX_POWER_UP:
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_NONE; break; case DRXK_POWER_DOWN_OFDM:
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_OFDM; break; case DRXK_POWER_DOWN_CORE:
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_CLOCK; break; case DRXK_POWER_DOWN_PLL:
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_PLL; break; case DRX_POWER_DOWN:
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_OSC; break; default: /* Unknown sleep mode */ return -EINVAL;
}
/* If already in requested power mode, do nothing */ if (state->m_current_power_mode == *mode) return0;
/* For next steps make sure to start from DRX_POWER_UP mode */ if (state->m_current_power_mode != DRX_POWER_UP) {
status = power_up_device(state); if (status < 0) goto error;
status = dvbt_enable_ofdm_token_ring(state, true); if (status < 0) goto error;
}
if (*mode == DRX_POWER_UP) { /* Restore analog & pin configuration */
} else { /* Power down to requested mode */ /* Backup some register settings */ /* Set pins with possible pull-ups connected
to them in input mode */ /* Analog power down */ /* ADC power down */ /* Power down device */ /* stop all comm_exec */ /* Stop and power down previous standard */ switch (state->m_operation_mode) { case OM_DVBT:
status = mpegts_stop(state); if (status < 0) goto error;
status = power_down_dvbt(state, false); if (status < 0) goto error; break; case OM_QAM_ITU_A: case OM_QAM_ITU_C:
status = mpegts_stop(state); if (status < 0) goto error;
status = power_down_qam(state); if (status < 0) goto error; break; default: break;
}
status = dvbt_enable_ofdm_token_ring(state, false); if (status < 0) goto error;
status = write16(state, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode); if (status < 0) goto error;
status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); if (status < 0) goto error;
if (*mode != DRXK_POWER_DOWN_OFDM) {
state->m_hi_cfg_ctrl |=
SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ;
status = hi_cfg_command(state); if (status < 0) goto error;
}
}
state->m_current_power_mode = *mode;
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__);
/* disable HW lock indicator */
status = write16(state, SCU_RAM_GPIO__A,
SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); if (status < 0) goto error;
/* Device is already at the required mode */ if (state->m_operation_mode == o_mode) return0;
switch (state->m_operation_mode) { /* OM_NONE was added for start up */ case OM_NONE: break; case OM_DVBT:
status = mpegts_stop(state); if (status < 0) goto error;
status = power_down_dvbt(state, true); if (status < 0) goto error;
state->m_operation_mode = OM_NONE; break; case OM_QAM_ITU_A: case OM_QAM_ITU_C:
status = mpegts_stop(state); if (status < 0) goto error;
status = power_down_qam(state); if (status < 0) goto error;
state->m_operation_mode = OM_NONE; break; case OM_QAM_ITU_B: default:
status = -EINVAL; goto error;
}
/* Powerupnewstandard
*/ switch (o_mode) { case OM_DVBT:
dprintk(1, ": DVB-T\n");
state->m_operation_mode = o_mode;
status = set_dvbt_standard(state, o_mode); if (status < 0) goto error; break; case OM_QAM_ITU_A: case OM_QAM_ITU_C:
dprintk(1, ": DVB-C Annex %c\n",
(state->m_operation_mode == OM_QAM_ITU_A) ? 'A' : 'C');
state->m_operation_mode = o_mode;
status = set_qam_standard(state, o_mode); if (status < 0) goto error; break; case OM_QAM_ITU_B: default:
status = -EINVAL;
}
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticint start(struct drxk_state *state, s32 offset_freq,
s32 intermediate_frequency)
{ int status = -EINVAL;
/* Check insertion of the Reed-Solomon parity bytes */
status = read16(state, FEC_OC_MODE__A, &fec_oc_reg_mode); if (status < 0) goto error;
status = read16(state, FEC_OC_IPR_MODE__A, &fec_oc_reg_ipr_mode); if (status < 0) goto error;
fec_oc_reg_mode &= (~FEC_OC_MODE_PARITY__M);
fec_oc_reg_ipr_mode &= (~FEC_OC_IPR_MODE_MVAL_DIS_PAR__M); if (state->m_insert_rs_byte) { /* enable parity symbol forward */
fec_oc_reg_mode |= FEC_OC_MODE_PARITY__M; /* MVAL disable during parity bytes */
fec_oc_reg_ipr_mode |= FEC_OC_IPR_MODE_MVAL_DIS_PAR__M; /* TS burst length to 204 */
fec_oc_dto_burst_len = 204;
}
/* Check serial or parallel output */
fec_oc_reg_ipr_mode &= (~(FEC_OC_IPR_MODE_SERIAL__M)); if (!state->m_enable_parallel) { /* MPEG data output is serial -> set ipr_mode[0] */
fec_oc_reg_ipr_mode |= FEC_OC_IPR_MODE_SERIAL__M;
}
switch (o_mode) { case OM_DVBT:
max_bit_rate = state->m_dvbt_bitrate;
fec_oc_tmd_mode = 3;
fec_oc_rcn_ctl_rate = 0xC00000;
static_clk = state->m_dvbt_static_clk; break; case OM_QAM_ITU_A: case OM_QAM_ITU_C:
fec_oc_tmd_mode = 0x0004;
fec_oc_rcn_ctl_rate = 0xD2B4EE; /* good for >63 Mb/s */
max_bit_rate = state->m_dvbc_bitrate;
static_clk = state->m_dvbc_static_clk; break; default:
status = -EINVAL;
} /* switch (standard) */ if (status < 0) goto error;
staticint set_agc_rf(struct drxk_state *state, struct s_cfg_agc *p_agc_cfg, bool is_dtv)
{ int status = -EINVAL;
u16 data = 0; struct s_cfg_agc *p_if_agc_settings;
dprintk(1, "\n");
if (p_agc_cfg == NULL) goto error;
switch (p_agc_cfg->ctrl_mode) { case DRXK_AGC_CTRL_AUTO: /* Enable RF AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data &= ~IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
/* Enable SCU RF AGC loop */
data &= ~SCU_RAM_AGC_CONFIG_DISABLE_RF_AGC__M;
/* Polarity */ if (state->m_rf_agc_pol)
data |= SCU_RAM_AGC_CONFIG_INV_RF_POL__M; else
data &= ~SCU_RAM_AGC_CONFIG_INV_RF_POL__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error;
/* Set speed (using complementary reduction value) */
status = read16(state, SCU_RAM_AGC_KI_RED__A, &data); if (status < 0) goto error;
data &= ~SCU_RAM_AGC_KI_RED_RAGC_RED__M;
data |= (~(p_agc_cfg->speed <<
SCU_RAM_AGC_KI_RED_RAGC_RED__B)
& SCU_RAM_AGC_KI_RED_RAGC_RED__M);
status = write16(state, SCU_RAM_AGC_KI_RED__A, data); if (status < 0) goto error;
if (is_dvbt(state))
p_if_agc_settings = &state->m_dvbt_if_agc_cfg; elseif (is_qam(state))
p_if_agc_settings = &state->m_qam_if_agc_cfg; else
p_if_agc_settings = &state->m_atv_if_agc_cfg; if (p_if_agc_settings == NULL) {
status = -EINVAL; goto error;
}
/* Set TOP, only if IF-AGC is in AUTO mode */ if (p_if_agc_settings->ctrl_mode == DRXK_AGC_CTRL_AUTO) {
status = write16(state,
SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,
p_agc_cfg->top); if (status < 0) goto error;
}
/* Cut-Off current */
status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A,
p_agc_cfg->cut_off_current); if (status < 0) goto error;
/* Max. output level */
status = write16(state, SCU_RAM_AGC_RF_MAX__A,
p_agc_cfg->max_output_level); if (status < 0) goto error;
break;
case DRXK_AGC_CTRL_USER: /* Enable RF AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data &= ~IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
/* Disable SCU RF AGC loop */
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
data |= SCU_RAM_AGC_CONFIG_DISABLE_RF_AGC__M; if (state->m_rf_agc_pol)
data |= SCU_RAM_AGC_CONFIG_INV_RF_POL__M; else
data &= ~SCU_RAM_AGC_CONFIG_INV_RF_POL__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error;
/* SCU c.o.c. to 0, enabling full control range */
status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 0); if (status < 0) goto error;
/* Write value to output pin */
status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A,
p_agc_cfg->output_level); if (status < 0) goto error; break;
case DRXK_AGC_CTRL_OFF: /* Disable RF AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data |= IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
/* Disable SCU RF AGC loop */
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
data |= SCU_RAM_AGC_CONFIG_DISABLE_RF_AGC__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error; break;
default:
status = -EINVAL;
}
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
#define SCU_RAM_AGC_KI_INV_IF_POL__M 0x2000
staticint set_agc_if(struct drxk_state *state, struct s_cfg_agc *p_agc_cfg, bool is_dtv)
{
u16 data = 0; int status = 0; struct s_cfg_agc *p_rf_agc_settings;
dprintk(1, "\n");
switch (p_agc_cfg->ctrl_mode) { case DRXK_AGC_CTRL_AUTO:
/* Enable IF AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data &= ~IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
/* Enable SCU IF AGC loop */
data &= ~SCU_RAM_AGC_CONFIG_DISABLE_IF_AGC__M;
/* Polarity */ if (state->m_if_agc_pol)
data |= SCU_RAM_AGC_CONFIG_INV_IF_POL__M; else
data &= ~SCU_RAM_AGC_CONFIG_INV_IF_POL__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error;
/* Set speed (using complementary reduction value) */
status = read16(state, SCU_RAM_AGC_KI_RED__A, &data); if (status < 0) goto error;
data &= ~SCU_RAM_AGC_KI_RED_IAGC_RED__M;
data |= (~(p_agc_cfg->speed <<
SCU_RAM_AGC_KI_RED_IAGC_RED__B)
& SCU_RAM_AGC_KI_RED_IAGC_RED__M);
status = write16(state, SCU_RAM_AGC_KI_RED__A, data); if (status < 0) goto error;
if (is_qam(state))
p_rf_agc_settings = &state->m_qam_rf_agc_cfg; else
p_rf_agc_settings = &state->m_atv_rf_agc_cfg; if (p_rf_agc_settings == NULL) return -1; /* Restore TOP */
status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,
p_rf_agc_settings->top); if (status < 0) goto error; break;
case DRXK_AGC_CTRL_USER:
/* Enable IF AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data &= ~IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
/* Disable SCU IF AGC loop */
data |= SCU_RAM_AGC_CONFIG_DISABLE_IF_AGC__M;
/* Polarity */ if (state->m_if_agc_pol)
data |= SCU_RAM_AGC_CONFIG_INV_IF_POL__M; else
data &= ~SCU_RAM_AGC_CONFIG_INV_IF_POL__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error;
/* Write value to output pin */
status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,
p_agc_cfg->output_level); if (status < 0) goto error; break;
case DRXK_AGC_CTRL_OFF:
/* Disable If AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data |= IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
/* Disable SCU IF AGC loop */
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
data |= SCU_RAM_AGC_CONFIG_DISABLE_IF_AGC__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error; break;
} /* switch (agcSettingsIf->ctrl_mode) */
/* always set the top to support
configurations without if-loop */
status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_cfg->top);
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticint get_qam_signal_to_noise(struct drxk_state *state,
s32 *p_signal_to_noise)
{ int status = 0;
u16 qam_sl_err_power = 0; /* accum. error between
raw and sliced symbols */
u32 qam_sl_sig_power = 0; /* used for MER, depends of
QAM modulation */
u32 qam_sl_mer = 0; /* QAM MER */
dprintk(1, "\n");
/* MER calculation */
/* get the register value needed for MER */
status = read16(state, QAM_SL_ERR_POWER__A, &qam_sl_err_power); if (status < 0) {
pr_err("Error %d on %s\n", status, __func__); return -EINVAL;
}
switch (state->props.modulation) { case QAM_16:
qam_sl_sig_power = DRXK_QAM_SL_SIG_POWER_QAM16 << 2; break; case QAM_32:
qam_sl_sig_power = DRXK_QAM_SL_SIG_POWER_QAM32 << 2; break; case QAM_64:
qam_sl_sig_power = DRXK_QAM_SL_SIG_POWER_QAM64 << 2; break; case QAM_128:
qam_sl_sig_power = DRXK_QAM_SL_SIG_POWER_QAM128 << 2; break; default: case QAM_256:
qam_sl_sig_power = DRXK_QAM_SL_SIG_POWER_QAM256 << 2; break;
}
status = read16(state, OFDM_EQ_TOP_TD_TPS_PWR_OFS__A,
&eq_reg_td_tps_pwr_ofs); if (status < 0) goto error;
status = read16(state, OFDM_EQ_TOP_TD_REQ_SMB_CNT__A,
&eq_reg_td_req_smb_cnt); if (status < 0) goto error;
status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_EXP__A,
&eq_reg_td_sqr_err_exp); if (status < 0) goto error;
status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_I__A,
®_data); if (status < 0) goto error; /* Extend SQR_ERR_I operational range */
eq_reg_td_sqr_err_i = (u32) reg_data; if ((eq_reg_td_sqr_err_exp > 11) &&
(eq_reg_td_sqr_err_i < 0x00000FFFUL)) {
eq_reg_td_sqr_err_i += 0x00010000UL;
}
status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_Q__A, ®_data); if (status < 0) goto error; /* Extend SQR_ERR_Q operational range */
eq_reg_td_sqr_err_q = (u32) reg_data; if ((eq_reg_td_sqr_err_exp > 11) &&
(eq_reg_td_sqr_err_q < 0x00000FFFUL))
eq_reg_td_sqr_err_q += 0x00010000UL;
status = read16(state, OFDM_SC_RA_RAM_OP_PARAM__A,
&transmission_params); if (status < 0) goto error;
/* Check input data for MER */
/* MER calculation (in 0.1 dB) without math.h */ if ((eq_reg_td_tps_pwr_ofs == 0) || (eq_reg_td_req_smb_cnt == 0))
i_mer = 0; elseif ((eq_reg_td_sqr_err_i + eq_reg_td_sqr_err_q) == 0) { /* No error at all, this must be the HW reset value *Apparentlynofirstmeasurementyet
* Set MER to 0.0 */
i_mer = 0;
} else {
sqr_err_iq = (eq_reg_td_sqr_err_i + eq_reg_td_sqr_err_q) <<
eq_reg_td_sqr_err_exp; if ((transmission_params &
OFDM_SC_RA_RAM_OP_PARAM_MODE__M)
== OFDM_SC_RA_RAM_OP_PARAM_MODE_2K)
tps_cnt = 17; else
tps_cnt = 68;
*p_signal_to_noise = 0; switch (state->m_operation_mode) { case OM_DVBT: return get_dvbt_signal_to_noise(state, p_signal_to_noise); case OM_QAM_ITU_A: case OM_QAM_ITU_C: return get_qam_signal_to_noise(state, p_signal_to_noise); default: break;
} return0;
}
#if0 staticint get_dvbt_quality(struct drxk_state *state, s32 *p_quality)
{ /* SNR Values for quasi errorfree reception rom Nordig 2.2 */ int status = 0;
if (image_to_select)
state->m_iqm_fs_rate_ofs = ~state->m_iqm_fs_rate_ofs + 1;
/* Program frequency shifter with tuner offset compensation */ /* frequency_shift += tuner_freq_offset; TODO */
status = write32(state, IQM_FS_RATE_OFS_LO__A,
state->m_iqm_fs_rate_ofs); if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
/* AGCInit() not available for DVBT; init done in microcode */ if (!is_qam(state)) {
pr_err("%s: mode %d is not DVB-C\n",
__func__, state->m_operation_mode); return -EINVAL;
}
/* FIXME: Analog TV AGC require different settings */
status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A,
fast_clp_ctrl_delay); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_CLP_CTRL_MODE__A, clp_ctrl_mode); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_INGAIN_TGT__A, ingain_tgt); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, ingain_tgt_min); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingain_tgt_max); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A,
if_iaccu_hi_tgt_min); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,
if_iaccu_hi_tgt_max); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_IF_IACCU_HI__A, 0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_IF_IACCU_LO__A, 0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, 0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_RF_IACCU_LO__A, 0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_CLP_SUM_MAX__A, clp_sum_max); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_SNS_SUM_MAX__A, sns_sum_max); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_KI_INNERGAIN_MIN__A,
ki_innergain_min); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT__A,
if_iaccu_hi_tgt); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_CLP_CYCLEN__A, clp_cyclen); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MAX__A, 1023); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MIN__A, (u16) -1023); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_CLP_SUM_MIN__A, clp_sum_min); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_SNS_SUM_MIN__A, sns_sum_min); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_CLP_DIR_TO__A, clp_dir_to); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_SNS_DIR_TO__A, sns_dir_to); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_KI_MIN__A, 0x0117); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_KI_MAX__A, 0x0657); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_CLP_SUM__A, 0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_CLP_CYCCNT__A, 0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_CLP_DIR_WD__A, 0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_CLP_DIR_STP__A, 1); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_SNS_SUM__A, 0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_SNS_CYCCNT__A, 0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_SNS_DIR_WD__A, 0); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_SNS_DIR_STP__A, 1); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_SNS_CYCLEN__A, 500); if (status < 0) goto error;
status = write16(state, SCU_RAM_AGC_KI_CYCLEN__A, 500); if (status < 0) goto error;
/* Initialize inner-loop KI gain factors */
status = read16(state, SCU_RAM_AGC_KI__A, &data); if (status < 0) goto error;
data = 0x0657;
data &= ~SCU_RAM_AGC_KI_RF__M;
data |= (DRXK_KI_RAGC_QAM << SCU_RAM_AGC_KI_RF__B);
data &= ~SCU_RAM_AGC_KI_IF__M;
data |= (DRXK_KI_IAGC_QAM << SCU_RAM_AGC_KI_IF__B);
status = write16(state, SCU_RAM_AGC_KI__A, data);
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticint dvbtqam_get_acc_pkt_err(struct drxk_state *state, u16 *packet_err)
{ int status;
dprintk(1, "\n"); if (packet_err == NULL)
status = write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); else
status = read16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A,
packet_err); if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
dprintk(1, "\n");
status = read16(state, OFDM_SC_COMM_EXEC__A, &sc_exec); if (sc_exec != 1) { /* SC is not running */
status = -EINVAL;
} if (status < 0) goto error;
/* Wait until sc is ready to receive command */
retry_cnt = 0; do {
usleep_range(1000, 2000);
status = read16(state, OFDM_SC_RA_RAM_CMD__A, &cur_cmd);
retry_cnt++;
} while ((cur_cmd != 0) && (retry_cnt < DRXK_MAX_RETRIES)); if (retry_cnt >= DRXK_MAX_RETRIES && (status < 0)) goto error;
/* Write sub-command */ switch (cmd) { /* All commands using sub-cmd */ case OFDM_SC_RA_RAM_CMD_PROC_START: case OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM: case OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM:
status = write16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, subcmd); if (status < 0) goto error; break; default: /* Do nothing */ break;
}
/* Write needed parameters and the command */
status = 0; switch (cmd) { /* All commands using 5 parameters */ /* All commands using 4 parameters */ /* All commands using 3 parameters */ /* All commands using 2 parameters */ case OFDM_SC_RA_RAM_CMD_PROC_START: case OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM: case OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM:
status |= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1);
fallthrough; /* All commands using 1 parameters */ case OFDM_SC_RA_RAM_CMD_SET_ECHO_TIMING: case OFDM_SC_RA_RAM_CMD_USER_IO:
status |= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0);
fallthrough; /* All commands using 0 parameters */ case OFDM_SC_RA_RAM_CMD_GET_OP_PARAM: case OFDM_SC_RA_RAM_CMD_NULL: /* Write command */
status |= write16(state, OFDM_SC_RA_RAM_CMD__A, cmd); break; default: /* Unknown command */
status = -EINVAL;
} if (status < 0) goto error;
/* Wait until sc is ready processing command */
retry_cnt = 0; do {
usleep_range(1000, 2000);
status = read16(state, OFDM_SC_RA_RAM_CMD__A, &cur_cmd);
retry_cnt++;
} while ((cur_cmd != 0) && (retry_cnt < DRXK_MAX_RETRIES)); if (retry_cnt >= DRXK_MAX_RETRIES && (status < 0)) goto error;
/* Check for illegal cmd */
status = read16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, &err_code); if (err_code == 0xFFFF) { /* illegal command */
status = -EINVAL;
} if (status < 0) goto error;
/* Retrieve results parameters from SC */ switch (cmd) { /* All commands yielding 5 results */ /* All commands yielding 4 results */ /* All commands yielding 3 results */ /* All commands yielding 2 results */ /* All commands yielding 1 result */ case OFDM_SC_RA_RAM_CMD_USER_IO: case OFDM_SC_RA_RAM_CMD_GET_OP_PARAM:
status = read16(state, OFDM_SC_RA_RAM_PARAM0__A, &(param0)); break; /* All commands yielding 0 results */ case OFDM_SC_RA_RAM_CMD_SET_ECHO_TIMING: case OFDM_SC_RA_RAM_CMD_SET_TIMER: case OFDM_SC_RA_RAM_CMD_PROC_START: case OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM: case OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM: case OFDM_SC_RA_RAM_CMD_NULL: break; default: /* Unknown command */
status = -EINVAL; break;
} /* switch (cmd->cmd) */
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
/* reset datapath for OFDM, processors first */
status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); if (status < 0) goto error;
status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); if (status < 0) goto error;
status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); if (status < 0) goto error;
/* IQM setup */ /* synchronize on ofdstate->m_festart */
status = write16(state, IQM_AF_UPD_SEL__A, 1); if (status < 0) goto error; /* window size for clipping ADC detection */
status = write16(state, IQM_AF_CLP_LEN__A, 0); if (status < 0) goto error; /* window size for sense pre-SAW detection */
status = write16(state, IQM_AF_SNS_LEN__A, 0); if (status < 0) goto error; /* sense threshold for sense pre-SAW detection */
status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); if (status < 0) goto error;
status = set_iqm_af(state, true); if (status < 0) goto error;
status = write16(state, IQM_AF_AGC_RF__A, 0); if (status < 0) goto error;
/* Impulse noise cruncher setup */
status = write16(state, IQM_AF_INC_LCT__A, 0); /* crunch in IQM_CF */ if (status < 0) goto error;
status = write16(state, IQM_CF_DET_LCT__A, 0); /* detect in IQM_CF */ if (status < 0) goto error;
status = write16(state, IQM_CF_WND_LEN__A, 3); /* peak detector window length */ if (status < 0) goto error;
status = write16(state, IQM_RC_STRETCH__A, 16); if (status < 0) goto error;
status = write16(state, IQM_CF_OUT_ENA__A, 0x4); /* enable output 2 */ if (status < 0) goto error;
status = write16(state, IQM_CF_DS_ENA__A, 0x4); /* decimate output 2 */ if (status < 0) goto error;
status = write16(state, IQM_CF_SCALE__A, 1600); if (status < 0) goto error;
status = write16(state, IQM_CF_SCALE_SH__A, 0); if (status < 0) goto error;
/* virtual clipping threshold for clipping ADC detection */
status = write16(state, IQM_AF_CLP_TH__A, 448); if (status < 0) goto error;
status = write16(state, IQM_CF_DATATH__A, 495); /* crunching threshold */ if (status < 0) goto error;
status = bl_chain_cmd(state, DRXK_BL_ROM_OFFSET_TAPS_DVBT,
DRXK_BLCC_NR_ELEMENTS_TAPS, DRXK_BLC_TIMEOUT); if (status < 0) goto error;
status = write16(state, IQM_CF_PKDTH__A, 2); /* peak detector threshold */ if (status < 0) goto error;
status = write16(state, IQM_CF_POW_MEAS_LEN__A, 2); if (status < 0) goto error; /* enable power measurement interrupt */
status = write16(state, IQM_CF_COMM_INT_MSK__A, 1); if (status < 0) goto error;
status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); if (status < 0) goto error;
/* IQM will not be reset from here, sync ADC and update/init AGC */
status = adc_synchronization(state); if (status < 0) goto error;
status = set_pre_saw(state, &state->m_dvbt_pre_saw_cfg); if (status < 0) goto error;
/* Halt SCU to enable safe non-atomic accesses */
status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); if (status < 0) goto error;
status = set_agc_rf(state, &state->m_dvbt_rf_agc_cfg, true); if (status < 0) goto error;
status = set_agc_if(state, &state->m_dvbt_if_agc_cfg, true); if (status < 0) goto error;
/* Set Noise Estimation notch width and enable DC fix */
status = read16(state, OFDM_SC_RA_RAM_CONFIG__A, &data); if (status < 0) goto error;
data |= OFDM_SC_RA_RAM_CONFIG_NE_FIX_ENABLE__M;
status = write16(state, OFDM_SC_RA_RAM_CONFIG__A, data); if (status < 0) goto error;
/* Activate SCU to enable SCU commands */
status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); if (status < 0) goto error;
if (!state->m_drxk_a3_rom_code) { /* AGCInit() is not done for DVBT, so set agcfast_clip_ctrl_delay */
status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A,
state->m_dvbt_if_agc_cfg.fast_clip_ctrl_delay); if (status < 0) goto error;
}
/* OFDM_SC setup */ #ifdef COMPILE_FOR_NONRT
status = write16(state, OFDM_SC_RA_RAM_BE_OPT_DELAY__A, 1); if (status < 0) goto error;
status = write16(state, OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A, 2); if (status < 0) goto error; #endif
/* FEC setup */
status = write16(state, FEC_DI_INPUT_CTL__A, 1); /* OFDM input */ if (status < 0) goto error;
#ifdef COMPILE_FOR_NONRT
status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x400); if (status < 0) goto error; #else
status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x1000); if (status < 0) goto error; #endif
status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, 0x0001); if (status < 0) goto error;
/* Setup MPEG bus */
status = mpegts_dto_setup(state, OM_DVBT); if (status < 0) goto error; /* Set DVBT Presets */
status = dvbt_activate_presets(state); if (status < 0) goto error;
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM
| SCU_RAM_COMMAND_CMD_DEMOD_STOP, 0, NULL, 1, &cmd_result); if (status < 0) goto error;
/* Halt SCU to enable safe non-atomic accesses */
status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); if (status < 0) goto error;
/* Stop processors */
status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); if (status < 0) goto error;
status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); if (status < 0) goto error;
/* Mandatory fix, always stop CP, required to set spl offset back to
hardware default (is set to 0 by ucode during pilot detection */
status = write16(state, OFDM_CP_COMM_EXEC__A, OFDM_CP_COMM_EXEC_STOP); if (status < 0) goto error;
/*== Write channel settings to device ================================*/
/* mode */ switch (state->props.transmission_mode) { case TRANSMISSION_MODE_AUTO: case TRANSMISSION_MODE_8K: default:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_MODE_8K; break; case TRANSMISSION_MODE_2K:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_MODE_2K; break;
}
/* guard */ switch (state->props.guard_interval) { default: case GUARD_INTERVAL_AUTO: /* try first guess DRX_GUARD_1DIV4 */ case GUARD_INTERVAL_1_4:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_GUARD_4; break; case GUARD_INTERVAL_1_32:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_GUARD_32; break; case GUARD_INTERVAL_1_16:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_GUARD_16; break; case GUARD_INTERVAL_1_8:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_GUARD_8; break;
}
/* hierarchy */ switch (state->props.hierarchy) { case HIERARCHY_AUTO: case HIERARCHY_NONE: default: /* try first guess SC_RA_RAM_OP_PARAM_HIER_NO */ case HIERARCHY_1:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_HIER_A1; break; case HIERARCHY_2:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_HIER_A2; break; case HIERARCHY_4:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_HIER_A4; break;
}
/* modulation */ switch (state->props.modulation) { case QAM_AUTO: default: /* try first guess DRX_CONSTELLATION_QAM64 */ case QAM_64:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_CONST_QAM64; break; case QPSK:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_CONST_QPSK; break; case QAM_16:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_CONST_QAM16; break;
} #if0 /* No hierarchical channels support in BDA */ /* Priority (only for hierarchical channels) */ switch (channel->priority) { case DRX_PRIORITY_LOW:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_PRIO_LO;
WR16(dev_addr, OFDM_EC_SB_PRIOR__A,
OFDM_EC_SB_PRIOR_LO); break; case DRX_PRIORITY_HIGH:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_PRIO_HI;
WR16(dev_addr, OFDM_EC_SB_PRIOR__A,
OFDM_EC_SB_PRIOR_HI)); break; case DRX_PRIORITY_UNKNOWN: default:
status = -EINVAL; goto error;
} #else /* Set Priority high */
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_PRIO_HI;
status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI); if (status < 0) goto error; #endif
/* coderate */ switch (state->props.code_rate_HP) { case FEC_AUTO: default: /* try first guess DRX_CODERATE_2DIV3 */ case FEC_2_3:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_RATE_2_3; break; case FEC_1_2:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_RATE_1_2; break; case FEC_3_4:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_RATE_3_4; break; case FEC_5_6:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_RATE_5_6; break; case FEC_7_8:
transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_RATE_7_8; break;
}
iqm_rc_rate_ofs &=
((((u32) IQM_RC_RATE_OFS_HI__M) <<
IQM_RC_RATE_OFS_LO__W) | IQM_RC_RATE_OFS_LO__M);
status = write32(state, IQM_RC_RATE_OFS_LO__A, iqm_rc_rate_ofs); if (status < 0) goto error;
/* Bandwidth setting done */
#if0
status = dvbt_set_frequency_shift(demod, channel, tuner_offset); if (status < 0) goto error; #endif
status = set_frequency_shifter(state, intermediate_freqk_hz,
tuner_freq_offset, true); if (status < 0) goto error;
/*== start SC, write channel settings to SC ==========================*/
/* Activate SCU to enable SCU commands */
status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); if (status < 0) goto error;
/* Enable SC after setting all other parameters */
status = write16(state, OFDM_SC_COMM_STATE__A, 0); if (status < 0) goto error;
status = write16(state, OFDM_SC_COMM_EXEC__A, 1); if (status < 0) goto error;
status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM
| SCU_RAM_COMMAND_CMD_DEMOD_START, 0, NULL, 1, &cmd_result); if (status < 0) goto error;
/* Write SC parameter registers, set all AUTO flags in operation mode */
param1 = (OFDM_SC_RA_RAM_OP_AUTO_MODE__M |
OFDM_SC_RA_RAM_OP_AUTO_GUARD__M |
OFDM_SC_RA_RAM_OP_AUTO_CONST__M |
OFDM_SC_RA_RAM_OP_AUTO_HIER__M |
OFDM_SC_RA_RAM_OP_AUTO_RATE__M);
status = dvbt_sc_command(state, OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM, 0, transmission_params, param1, 0, 0, 0); if (status < 0) goto error;
if (!state->m_drxk_a3_rom_code)
status = dvbt_ctrl_set_sqi_speed(state, &state->m_sqi_speed);
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__);
/* *\briefQAM256specificsetup *\paramdemod:instanceofdemod. *\returnDRXStatus_t.
*/ staticint set_qam256(struct drxk_state *state)
{ int status = 0;
dprintk(1, "\n"); /* QAM Equalizer Setup */ /* Equalizer */
status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 11502); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12084); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 12543); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 12931); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13629); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15385); if (status < 0) goto error;
/* Decision Feedback Equalizer */
status = write16(state, QAM_DQ_QUAL_FUN0__A, 8); if (status < 0) goto error;
status = write16(state, QAM_DQ_QUAL_FUN1__A, 8); if (status < 0) goto error;
status = write16(state, QAM_DQ_QUAL_FUN2__A, 8); if (status < 0) goto error;
status = write16(state, QAM_DQ_QUAL_FUN3__A, 8); if (status < 0) goto error;
status = write16(state, QAM_DQ_QUAL_FUN4__A, 6); if (status < 0) goto error;
status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); if (status < 0) goto error;
status = write16(state, QAM_SY_SYNC_HWM__A, 5); if (status < 0) goto error;
status = write16(state, QAM_SY_SYNC_AWM__A, 4); if (status < 0) goto error;
status = write16(state, QAM_SY_SYNC_LWM__A, 3); if (status < 0) goto error;
/* QAM Slicer Settings */
status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A,
DRXK_QAM_SL_SIG_POWER_QAM256); if (status < 0) goto error;
/* QAM Loop Controller Coeficients */
status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); if (status < 0) goto error;
status = write16( * similar parts. The supported differentdrivers if (status < 0) goto error;
= write16(tate,SCU_RAM_QAM_LC_EP_MEDIUM__A, 4)java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58 if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); if (status < 0) / OchipLPCinterface goto error;
status* T8792ESuper if (status < 0) goto error;
status = write16( * Copyright()2005- JeanDelvare<@use> if (status < 0)
error;
status (,SCU_RAM_QAM_LC_CP_COARSE__A 250)java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 59 if (status < it8772 ,it8782,it8783,it8786,it8790java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61 goto error;
status = write16(state, java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 17 if (java.lang.StringIndexOutOfBoundsException: Range [23, 11) out of bounds for length 44 goto error;
statusjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 if (status < 0)
error;
status =write16(, SCU_RAM_QAM_LC_CI_COARSE__A, 125)java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 59 if (status < 0) #define0
status = write16(#efine0x8732
( 0) gotoerror;
status = write16(state, java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 goto error;
ARSE__A,48)
< 0) goto error;
status = / if (status < 0) goto error;
status write16(tate, SCU_RAM_QAM_LC_CF1_MEDIUM__A10)java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 59 if(tatus 0java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16 goto error;
if (status < 0) goto error;
/* QAM State Machine (FSM) Thresholds */
status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); if (status < 0) gotoerror;
status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); if (status < 0)
;
status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); if (status < 0) goto error;
status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 150); if (status < 0) goto error;
status = write16(state, #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * if (status < 0) goto error;
status java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 if (status < 0) goto errordefineIT87_REG_AUTO_PWMn,i IT87_REG_AUTO_BASE] 5+()java.lang.StringIndexOutOfBoundsException: Index 68 out of bounds for length 68
status = write16(state, java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 19 if(tatus<0java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16
, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A(16) 8); if (status < 0) goto error;
status FEAT_10_9MV_ADC ()
(tatus< 0) goto errorjava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 18); if (tatus < 0) goto error;
status = hang-psand access failuresto SuperIO at the
(tatus<0java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16 goto error#FEAT_NOCONF BIT19
status =write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A (u16 7) if (status < 0) goto error .name="
status = write16(state, java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 3 if (status < 0) goto error;
status (,SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A (u16 8;
error: if (status < 0)
pr_err |FEAT_PWM_FREQ2 FEAT_FANCTL_ONOFF return status;
}
ndstate SCU_RAM_COMMAND_STANDARD_QAM
, 0, NULL, 1, &cmd_result);
error: if(tatus<0)
pr_err(Error d on%\" ,_func__)java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47 return status;
IT8790E,
/* *\briefSetQAMsymbolrate. *\param.model"IT8603E, *\paramchannel:pointerto.0java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 20 *\returnDRXStatus_t.
*/ staticint qam_set_symbolrate(structfeatures=FEAT_NEWER_AUTOPWM FEAT_16BIT_FANS
{
u32 adc_frequency = 0;
u32 symb_freq = 0;
u32 iqm_rc_rate = 0;
u16 ratesel =0java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
name ="it8628"
FEAT_TEMP_OFFSET| |FEAT_SIX_FANS
dprintk(1, "\n" .="IT87952E",
/
=(tate>m_sys_clock_freq 1000)/ 3;
ratesel = 0; if (state->props.symbol_rate <= 1188750#has_12mv_adc(ata)(data->features&FEAT_12MV_ADC)
=3; elseif ( ()(data)> FEAT_TEMP_OFFSET
()>eci_mask&BITnr)java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
->.symbol_rate < 4755000)
ratesel = 1;
statusdata ()> &( |\
( <0 goto #define has_(data)(data)>eatures &FEAT_PWM_FREQ2
/* /symbolrate*(<ratesel))1)*(<23
*/
symb_freq = state->props u8internal if (u16 skip_in /* Divide by zero */
status = -EINVAL; goto error;
}
iqm_rc_rate=(dc_frequency /symb_freq) ( < 21 +
(Frac28a((adc_frequency % symb_freq), symb_freq) >> 7) -
(1 << 23);
status = write32(state, IQM_RC_RATE_OFS_LO__A, iqm_rc_rate); if (status < 0) goto error;
state->m_iqm_rc_rate = iqm_rc_rate; /* (125*symbolrate/adc_freq(<15)
*/
symb_freq = state->props.symbol_rate; if (adc_frequency == 0) { /* Divide by zero */
status = -EINVAL; goto error;
error: if (status < 0)
pr_err" don%s\" status,_func__); returnstatus;
}
/* briefGetQAMstatus *\paramdemod:lsb=160; *\paramchannel:pointertochanneldata. \eturnjava.lang.StringIndexOutOfBoundsException: Range [69, 22) out of bounds for length 69
*/
get_qam_lock_statusstruct state p_lock_statusjava.lang.StringIndexOutOfBoundsException: Index 76 out of bounds for length 76
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1 int status;
u16result2] ,resultinginaPWMfrequency
dprintk(1, "\n");
*p_lock_status = NOT_LOCKED;
status = scu_command(state,
SCU_RAM_COMMAND_STANDARD_QAM |
SCU_RAM_COMMAND_CMD_DEMOD_GET_LOCK, 0, NULL, 2,
result); if (status < 8000000
pr_err}
ifejava.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10 /* 0x0000 NOT LOCKED */
} elseif (result[1] <* Mustbe called with data-update_lock held,exceptduring initialization. /* 0x4000 DEMOD LOCKED */
*p_lock_status = DEMOD_LOCK;
} elseif (result[1] < SCU_RAM_QAM_LOCKED_LOCKED_NEVER_LOCK) { /* 0x8000 DEMOD + FEC LOCKED (system lock) */
*p_lock_status = MPEG_LOCK;
} d-p] x80 /* 0xC000 NEVER LOCKED */ /* (system will never be able to lock to the signal) */
/
* TODO: check this, intermediate for (i = ; i <3; )
* states are not taken into account here
*/
p_lock_status ; returnstatus; }
#defineQAM_MIRROR__M0x03 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 #defineQAM_MIRRORED0x01 #defineQAM_MIRROR_AUTO_ON0x02 #defineQAM_LOCKRANGE__M0x10 #defineQAM_LOCKRANGE_NORMAL0x10
staticintqam_demodulator_command(java.lang.StringIndexOutOfBoundsException: Range [0, 41) out of bounds for length 2 intck(&data->pdate_lock)java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 32 { intstatus; mutex_unlock(&data->update_lock); u16set_param_parameters[4]={0,0,staticstructit87_data*it87_update_device(device*dev)
status = scu_command(state,
SCU_RAM_COMMAND_STANDARD_QAM
| SCU_RAM_COMMAND_CMD_DEMOD_SET_PARAM,
pdate_pwm_ctrldata,)
data-sensor =it87_read_valuedata,IT87_REG_TEMP_ENABLE)java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61
{
pr_warn("Unknown QAM demodulator parameter * The IT8718F and later don't use IT87_REG_VID for
number_of_parameters);
data-vid=it87_read_value(ata IT87_REG_VID)java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51
}
java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 6 if (status < 0)
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1 return status;
}
drxk_statestate,u16 intermediate_freqk_hzjava.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71
s32 tuner_freq_offset)
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1 intstatusjava.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
u16 cmd_result; int qam_demod_param_count -qam_demod_parameter_count;
dprintk(1, "\n");
/
* STEP 1: reset demodulator
* resets FEC DI
* resets QAM block
* resets SCU variables
*/
status = write16(state, FEC_DI_COMM_EXEC__A, FEC_DI_COMM_EXEC_STOP); if (status < 0) goto error;
status = write16 return count; if (status < 0) goto error;
status = qam_reset_qam(state); if (status < 0) goto error;
/* *STEP2:configuredemodulator *-setparams;resetsIQM,QAM,FECHW;initializessome *SCUvariables
*/
status = qam_set_symbolrate(state); if (status < 0) goto error;
/* Set params */ switch (state->props.modulation) { case QAM_256:
state->m_constellation = DRX_CONSTELLATION_QAM256; break; case QAM_AUTO: case QAM_64:
state->m_constellation = DRX_CONSTELLATION_QAM64; break; case QAM_16:
state->m_constellation = DRX_CONSTELLATION_QAM16; break; case QAM_32:
state->m_constellation = DRX_CONSTELLATION_QAM32SENSOR_DEVICE_ATTR_2in4_max S_IRUGO|S_IWUSR,show_in,set_in, break; case QAM_128:
state->m_constellation = DRX_CONSTELLATION_QAM128; break; default:
status = -EINVAL; break;
} if (status < 0) goto error;
/* Use the 4-parameter if it's requested or we're probing for
* the correct command. */ if (state->qam_demod_parameter_count == 4
|| !state->qam_demod_parameter_count) {
qam_demod_param_count = 4;
status = qam_demodulator_command(state, qam_demod_param_count);
}
/* Use the 2-parameter command if it was requested or if we're *probingforthecorrectcommandandthe4-parametercommand
* failed. */ if (state->qam_demod_parameter_count == 2
java.lang.StringIndexOutOfBoundsException: Range [40, 38) out of bounds for length 71
char )
status = qam_demodulator_command(state, qam_demod_param_count);
}
if (status < 0) {
dprintk(1, "Could not set demodulator parameters.\n") nr=sattr-java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 20
dprintk(1, "Make sure qam_demod_parameter_count (%d) err =it87_lockdata);
state->qam_demod_parameter_count index
state- breakjava.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
error
} java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 3
dprintk(1, Autothe commandparameterssuccessful - %dparameters."java.lang.StringIndexOutOfBoundsException: Index 85 out of bounds for length 85
qam_demod_param_count);
/* *:enabletheamodewheretheADCprovidesvalid *signalsetupmodulationindependentregisters
*/ #if0
status = set_frequency(channel, SENSOR_DEVICE_ATTR_2temp3_input , show_temp NULL 2, 0; if (status < 0) goto error; #endif
status = set_frequency_shifter(state, intermediate_freqk_hz,
tuner_freq_offset, true); if (status < 0) goto error;
/* Setup BER measurement */
status = set_qam_measurement(state, state->m_constellation,
state->props.symbol_rate); if (status < 0)
* 0 =disabled
/* Reset default values */
status = write16(state, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE); if (status < 0) goto error;
status = write16(state, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE); if (status < 0) goto error;
/* Reset default LC values */
status = write16(state, QAM_LC_RATE_LIMIT__A, 3); if (status < 0) goto error;
status return ;
goto error error;
status = write16(state, type = ttype; /* Intel PECI or AMDTSI if ( type = 3/* thermal diode */ goto error;
status = write16(state, QAM_LC_MODE__Ajava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 if (status < 0) goto error;
status = write16(state, QAM_LC_QUAL_TAB0__A, 1);
() goto error;
status = java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 1 if (status < 0) goto error;
status = write16(state, QAM_LC_QUAL_TAB2__A, 1 it87_data*=dev_get_drvdatadev); if (status < 0) goto error; return if (status < 0) goto
= write16s,QAM_LC_QUAL_TAB4__A2) if (status < 0) goto error;
status = write16(state, QAM_LC_QUAL_TAB5__A (has_temp_old_pecidata, nr)& ((extra &pan style='color: green'>080)||val =6)java.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65 if ( val ; gotojava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
status = write16(state, QAM_LC_QUAL_TAB6__A, 2); if (status < 0)
errorjava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
=write16(tate, , 2; if (status < 0) goto- ;
status = write16(state, QAM_LC_QUAL_TAB9__A, 2 if (status < 0)
;
status = if (status < 0)
errorjava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
status = write16(state, QAM_LC_QUAL_TAB12__A ) if (status < 0) goto error;
status = write16(state, QAM_LC_QUAL_TAB15__Astatic pwm_mode( struct it87_data *ata,int) if (has_fanctl_onoffdata)& nr<3 & goto error;
status = write16(state, QAM_LC_QUAL_TAB16__A, 3); if (status < 0) goto error;
status = write16(state, QAM_LC_QUAL_TAB20__A, 4); if (status < 0)
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1 if (status < 0) goto error;
/* Mirroring, QAM-block starting point not inverted */
s write16(state QAM_SY_SP_INV__Ajava.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
QAM_SY_SP_INV_SPECTRUM_INV_DIS);
s <0java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16
error
/* Halt SCU to enable safe non-atomic accesses */
status=write16(state SCU_COMM_EXEC__A SCU_COMM_EXEC_HOLD; if (status < 0) goto error;
/* STEP 4: modulation specific setup */ switch(->rops.modulation) { case QAM_16:
status = set_qam16(state); break; case QAM_32:
status = set_qam32(state); break; caseQAM_AUTO: case QAM_64:
status = set_qam64(state); break; case QAM_128:
status = set_qam128(state);ifIS_ERR) break; case QAM_256:
status = set_qam256(state); break; default:
=-;
;
} if (status < 0) goto error;
/* Activate SCU to enable SCU commands */
status = write16(state, SCU_COMM_EXEC__A, java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 0
s <) goto error;
/* Re-configure MPEG output, requires knowledge of channel bitrate */ /* extAttr->currentChannel.modulation = channel->modulation; */ /* extAttr->currentChannel.symbolrate = channel->symbolrate; */
status = mpegts_dto_setup(state, state->m_operation_mode); if (status < 0) goto error;
/* start processes */ EINVAL;
status = mpegts_start(state);
java.lang.StringIndexOutOfBoundsException: Range [0, 3) out of bounds for length 0 goto error;
status = ,[,
( <0java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16 gotoswitch (){
status = write16(state, QAM_COMM_EXEC__A, java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 34 if (status < 0) goto error;
status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); if valDIV_FROM_REG>nr) goto error;
/* STEP 5: start QAM demodulator (starts FEC, QAM and IQM HW) */
status = scu_command( const *uf size_t countjava.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
| SCU_RAM_COMMAND_CMD_DEMOD_START, 0, NULL, 1, &cmd_result); if (status < 0) goto error;
/* update global DRXK data container */ /*? extAttr->qamInterleaveMode = DRXK_QAM_I12_J17; */
java.lang.StringIndexOutOfBoundsException: Range [6, 5) out of bounds for length 6 if (status < 0)
pr_err("Error %java.lang.StringIndexOutOfBoundsException: Range [0, 18) out of bounds for length 8 return status;
}
staticint set_qam_standard(struct drxk_state *state, enum operation_mode o_mode if data>an_div =3java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
{ int status; #ifdef DRXK_QAM_TAPS #define java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 #include"drxk_filters.h"
java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 28 #endif
/* Ensure correct power-up mode */
status = power_up_qam(state); if (status < 0) goto error; /* Reset QAM block */ for(= 0;i<2 +{ if (status < 0) goto error;
/* Setup IQM */
status=write16(tate,IQM_COMM_EXEC__AIQM_COMM_EXEC_B_STOP; if (status < 0) gotoerror;
status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); if (status < 0) goto error;
/* Upload IQM Channel Filter settings by
boot loader from ROM table */ switch (o_mode) { case OM_QAM_ITU_A:
status = bl_chain_cmd(state, DRXK_BL_ROM_OFFSET_TAPS_ITU_A dev_err(java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 14
DRXK_BLCC_NR_ELEMENTS_TAPS,
DRXK_BLC_TIMEOUT); break; case OM_QAM_ITU_C:
status = bl_direct_cmd(state, IQM_CF_TAP_RE0__A,
DRXK_BL_ROM_OFFSET_TAPS_ITU_C,
DRXK_BLDC_NR_ELEMENTS_TAPS,
DRXK_BLC_TIMEOUT);
goto error;
status = bl_direct_cmd(state,
IQM_CF_TAP_IM0__A,
DRXK_BL_ROM_OFFSET_TAPS_ITU_C,
DRXK_BLDC_NR_ELEMENTS_TAPS,
DRXK_BLC_TIMEOUT; break; default:
status = -EINVAL;
} if (status < 0) goto error;
status = write16(state, IQM_CF_OUT_ENA__A, 1 << IQM_CF_OUT_ENA_QAM__B); if (status < 0)
;
status = write16(state, IQM_CF_SYMMETRIC__A, 0); if(tatus < 0) goto error;
status = write16(state, IQM_CF_MIDTAP__A,
((1 < IQM_CF_MIDTAP_RE__B) | (1 << IQM_CF_MIDTAP_IM__B))); if (status < 0) goto error;
status = write16(state, IQM_RC_STRETCH__A, 21); if (status < 0) goto error;
status = write16(state, IQM_AF_CLP_LEN__A, 0); if (tatus < 0) goto error;
status = write16(state, IQM_AF_CLP_TH__A, 448); if (status < } goto error;
status = write16(state, IQM_AF_SNS_LEN__A, 0); if (status < 0) goto error;
status = write16(state, ctrl =d-pwm_ctrlnr & x7c | if (status < 0) goto error;
status = write16(state, IQM_FS_ADJ_SEL__A, 1); if (status < 0) goto error;
status = write16(state, IQM_RC_ADJ_SEL__A, 1); if (status < 0) goto error;
status = write16(state, IQM_CF_ADJ_SEL__A, 1 data-fan_main_ctrl); if (status < 0) goto ;
status = write16(state, IQM_AF_UPD_SEL__A, 0); if (status < 0) goto error;
/* IQM Impulse Noise Processing Unit */
status = write16(state, IQM_CF_CLP_VAL__Ajava.lang.StringIndexOutOfBoundsException: Range [33, 31) out of bounds for length 72 if (status < 0) goto error;
status = write16(state, IQM_CF_DATATH__A, 1000); if (status < 0) goto error;
err=it87_lock(data; if (status < 0) goto error;
status = write16(state, IQM_CF_DET_LCT__A, 0) / if (status < 0) goto error;
status = write16( * is read-only so we readonly wetwrite value. if (status < 0) goto error;
status = write16(state, IQM_CF_PKDTH__A, 1); if (status < 0) goto error;
status = write16( data->pwm_duty[nr] = pwm_to_reg(data, val); if (status < 0) goto errorjava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
/* turn on IQMAF. Must be done before setAgc**() */
status = set_iqm_af(state, true);
(tatus 0) goto error;
status * if (status < 0) goto error;
java.lang.StringIndexOutOfBoundsException: Index 68 out of bounds for length 68
status = adc_synchronization(state); if (status < 0) goto error;
/* Set the FSM step period */
status =write16state SCU_RAM_QAM_FSM_STEP_PERIOD__A, 2000); if (status < 0) gotoerrorjava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
/* Halt SCU to enable safe non-atomic accesses */
status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); if (status < 0) goto error;
/* No more resets of the IQM, current standard correctly set =>
now AGCs can be configured. */
status = init_agc(state, true); if ( goto error;
status = set_pre_saw(state, &(state->m_qam_pre_saw_cfg)); if (status < 0) goto error;
status = set_agc_rf(state, &(state->m_qam_rf_agc_cfg), true); if (status < 0) goto error;
status = set_agc_if(state, &(state->m_qam_if_agc_cfg), true); if (status < 0) goto error;
/
,SCU_COMM_EXEC__A,SCU_COMM_EXEC_ACTIVE);
error:
s 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticint write_gpio(struct drxk_state *state)
{ int status;
u16 value = 0;
dprintk(1, "\n");
status = write16(state, SCU_RAM_GPIO__A,
SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); if (status < 0)
errorjava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
/* Write magic word to enable pdr reg write */
status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); ifbreak; goto error;
if (state->m_has_sawsw) { if (state->uio_mask & 0x0001) { /* UIO-1 */ /* write to io pad configuration register - output mode */
status = write16(state, SIO_PDR_SMA_TX_CFG__A,
state->m_gpio_cfg); if (status < 0)
data-pwm_temp_mapnr]=
/* use corresponding bit in io data output registar */
status = read16(state, SIO_PDR_UIO_OUT_LO__A, &value); if (status < 0)
error if ((state->m_gpio & 0x0001) == 0)
value &= 0x7FFF; /* write zero to 15th bit - 1st UIO */ else
value |= 0x8000; /* write one to 15th bit - 1st UIO */ register/
status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); if (status < 0) goto error;
} if (state->uio_mask & 0x0002) { /* UIO-2 */ statuswrite16(,SIO_PDR_SMA_RX_CFG__A, state->m_gpio_cfg); if(status<0) gotoerror;constchar*buf,size_tcount)
/* use corresponding bit in io data output registar */
status = read16(state, intnr=sensor_attr>r; if (status < 0) goto error; if ((state->m_gpio & 0x0002) == 0)
value &= 0xBFFF; /* write zero to 14th bit - 2st UIO */ else
value else /* write back to io data output register */
status = write16(state, SIO_PDR_UIO_OUT_LO__A, value count
stati ssize_t show_auto_pwm_slope( *java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54 goto error;
} if (state->uio_mask & 0x0004) { /* UIO-3 */ /* write to io pad configuration register - output mode */
status = write16(state, SIO_PDR_GPIO_CFG__A,
state-m_gpio_cfg)java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25 if (status < 0) goto error;
/* use corresponding bit in io data output registar */
status = read16(state, SIO_PDR_UIO_OUT_LO__A, &value); if s<0) goto error; if ((state->m_gpio & 0x0004) == 0)
value &= 0xFFFB; /* write zero to 2nd bit - 3rd UIO */ >n]java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
value |= 0x0004; /* write one to 2nd bit - 3rd UIO */ /* write back to io data output register */
status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); if (status < 0) goto error;
}
}
/*Write magic todisablepdrreg write */
=s,, 0)
error: if (status < 0)
pr_err" % %\" status,_func__); return status;
}
staticint switch_antenna_to_qam(struct drxk_state *state)
{ int status = 0; bool gpio_state;
dprintk(1, "\n");
if (!state->antenna_gpio) return0;
gpio_state = state->m_gpio & state->antenna_gpio;
if(- gpio_state) { /* Antenna is on DVB-T mode. Switch */
(-antenna_dvbtjava.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26
state->m_gpio &= ~state->antenna_gpio; else
state->m_gpio |= state->antenna_gpio; SENSOR_DEVICE_ATTR_2java.lang.StringIndexOutOfBoundsException: Range [39, 38) out of bounds for length 71
status = write_gpio(state);
} if (status < staticSENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticint switch_antenna_to_dvbt(struct drxk_state *state)
{ int status = 0; bool ;
dprintk(1, "\n" java.lang.StringIndexOutOfBoundsException: Range [64, 63) out of bounds for length 74
if (!state->antenna_gpio) return0;
gpio_state = state->m_gpio & state->antenna_gpio;
if (!(state->antenna_dvbt ^ gpio_state)) { /* Antenna is on DVB-C mode. Switch */ if (state->antenna_dvbt)
state->m_gpio |= state->antenna_gpio; else
state->m_gpio &= s pwm2_freq, java.lang.StringIndexOutOfBoundsException: Range [74, 73) out of bounds for length 78
status = write_gpio(state);
} if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticstruct *)
{ /* Power down to requested mode */
/* Set pins with possible pull-ups connected to them in input mode */ /* Analog power down */ /* ADC power down */ /* Power down device */ int status;
dprintk(1, "\n"); if (state->m_b_p_down_open_bridge) {
/
status =ConfigureI2CBridgestate, true; if (status < 0)
error
} /* driver 0.9.0 */
status = SOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, if (status < 0)
;
status = write16(state java.lang.StringIndexOutOfBoundsException: Range [21, 20) out of bounds for length 42
); if (status < 0)
;
status = write16(state, SIO_CC_UPDATE__A, java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 45 if (status < 0) goto error;
AM_PAR_5_CFG_SLEEP_ZZZ;
java.lang.StringIndexOutOfBoundsException: Range [25, 24) out of bounds for length 32
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__);
return status;
}
staticint init_drxk(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
{
status =, 0java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 23 enum drx_power_mode power_mode = DRXK_POWER_DOWN_OFDM;
u16 driver_version;
dprintk(1, "\n"); if (state->m_drxk_state == DRXK_UNINITIALIZED) {
drxk_i2c_lock(state);
status = power_up_device java.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 59 if (status < 0) goto error;
() if (status < 0) goto error; /* Soft reset of OFDM-, sys- and osc-clockdomain */
=write16state, SIO_CC_SOFT_RST__Ajava.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45
SIO_CC_SOFT_RST_OFDM__M
/
| SIO_CC_SOFT_RST_OSC__M); if goto error;
status =write16(state,SIO_CC_UPDATE__A,SIO_CC_UPDATE_KEY); if (status < java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 58
attr charjava.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57 /* *TODOisthisneeded?Ifyes,howmuchdelayin *worst
*/
usleep_range(1000, 2000);
state->m_drxk_a3_patch_code = true;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 if (status < 0) goto SENSOR_(, )java.lang.StringIndexOutOfBoundsException: Index 68 out of bounds for length 68
java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42 /* Delay = (delay (nano seconds) * oscclk (kHz))/ 1000 */ /* SDA brdige delay */
state->m_hi_cfg_bridge_delay ,)
u) (-m_osc_clock_freq 1000 java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44 1000java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 32 /* Clipping */ if (state-> return sprintf(buf, "%u\njava.lang.StringIndexOutOfBoundsException: Range [35, 34) out of bounds for length 57
) {
state->m_hi_cfg_bridge_delay =
SIO_HI_RA_RAM_PAR_3_CFG_DBL_SDA__M;
} /* SCL bridge delay, same as SDA for now */
-java.lang.StringIndexOutOfBoundsException: Range [31, 30) out of bounds for length 33
state->m_hi_cfg_bridge_delay <<
SIO_HI_RA_RAM_PAR_3_CFG_DBL_SCL__B;
status = init_hi(state); if (status < 0)
java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 14 /* disable various processes */ #if NOA1ROM if (!(state->m_DRXK_A1_ROM_CODE)
& SENSOR_DEVICE_ATTRf ,0; #endif
{
status = write16(state, SCU_RAM_GPIO__A,
SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); if ( goto error;
}
/* disable MPEG port */
status = mpegts_disable(state); if (status < 0) goto error;
/* Stop AUD and SCU */
status = write16(state, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP); if goto error;
status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP); if (status < 0) goto error;
/* enable token-ring bus through OFDM block for possible ucode upload */
status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A,
SIO_OFDM_SH_OFDM_RING_ENABLE_ON; if (status < 0) goto error;
/* include boot loader section */
status +V"
SIO_BL_COMM_EXEC_ACTIVE); if (status < 0) goto error; "3, if (status < 0) goto error;
(-fw {
status =download_microcodestate, state->fw->data,
state->fw->size); if (status < 0) goto error;
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
tokenring through OFDM block for possible upload*
status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A,
static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3); if (status < 0) goto
/* Run SCU for a little while to initialize microcode version numbers */
status =(tate,SCU_COMM_EXEC__A)java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66 if (status < 0)i=index 8java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 21 goto error;
status = drxx_open(state); if (status < 0) goto error; /* added for test */
msleep(
sensor_dev_attr_in0_input,
status = &sensor_dev_attr_in0_min.attr, ifjava.lang.StringIndexOutOfBoundsException: Range [37, 36) out of bounds for length 42 goto error;
/* Stamp driver version number in SCU data RAM in BCD code Donetoenablefieldapplicationengineerstoretrievedrxdriverjava.lang.StringIndexOutOfBoundsException: Index 74 out of bounds for length 42 viaI2CfromSCURAM. NotusingSCUcommandinterfacejava.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 40 microcodemaybepresent.
*/
sjava.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 40
(((DRXK_VERSION_MAJOR / 100) % 10) << 12) +
(D /10 )< )+
(DRXK_VERSION_MAJOR %10 < 4 +
(DRXK_VERSION_MINOR % 10);
status = write16(state, SCU_RAM_DRIVER_VER_HI__A,
driver_version); if (status < 0) goto error;
driver_version =
/ 1000 %10)< )+
(((&java.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 40
(((DRXK_VERSION_PATCH / 10) % 10) << 4) +
(DRXK_VERSION_PATCH % 10);
status = write16(state, SCU_RAM_DRIVER_VER_LO__Asjava.lang.StringIndexOutOfBoundsException: Range [29, 28) out of bounds for length 43
driver_version);
}java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2 goto attrs=java.lang.StringIndexOutOfBoundsException: Range [29, 28) out of bounds for length 29
/* *DirtyfixofdefaultvaluesforROM/java.lang.StringIndexOutOfBoundsException: Range [0, 46) out of bounds for length 41 *Dirtybecausethisfixmakesitimpossibletosetup java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2 *requireschangestoRFAGCspeedtobedoneviatheCTRL ifget_temp_type(,i)=0)
*/
_rf_agc_cfgspeed=3 *
/* Reset driver debug flags to 0 */
status = write16(state, SCU_RAM_DRIVER_DEBUG__A, 0); if (status goto error; /* driver 0.9.0 */ /* Setup FEC OC:
NOTE: No more full FEC resets allowed afterwards!! */
status = write16(&sensor_dev_attr_temp1_alarm., if (status < 0) goto error; /* MPEGTS functions are still the same */
status = mpegts_dto_init(state); if (status < 0) goto error;
status = mpegts_stop(state); if (status < 0) goto error;
status = sensor_dev_attr_temp3_min.dev_attr.attr, if (status < 0) goto error;
status = mpegts_configure_pins(state, state->m_enable_mpeg_output); if (status 0 goto error; /* added: configure GPIO */
status = write_gpio(state); if (status < 0) goto error;
state->m_drxk_state = DRXK_STOPPED;
if (state- dev ;
status = power_down_device(state); if (status < 0) goto error;
state->m_drxk_state = DRXK_POWERED_DOWN;
} else
state->_rxk_state DRXK_STOPPEDjava.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
/* Initialize the supported delivery systems */
n = 0; if (static const struct attribute_group it87_group = {
state->frontend.ops.delsys[n++] = SYS_DVBC_ANNEX_A;
state->frontend.ops.delsys[n++] = SYS_DVBC_ANNEX_C;
state-..info.name, " DVB-C", sizeof(state->frontend.ops.info.name));
} if (state->m_has_dvbt) {
= (index) ;
strlcat(state->frontend.ops.info.name, " DVB-T", sizeof(state->frontend.ops.info.name));
}
(state);
}
error: if (status < 0) {
state->m_drxk_state = DRXK_NO_DEV;
state)
pr_err("Error %d on %s\n", status, __func__);
}
return status;
}&.java.lang.StringIndexOutOfBoundsException: Range [38, 37) out of bounds for length 43
staticvoid load_firmware_cb(constjava.lang.StringIndexOutOfBoundsException: Range [43, 28) out of bounds for length 43 void *context)
{ struct drxk_state *state = context;
dprintk(1, ": %s\n", fw ? if&java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41
pr_err("Could not load firmware file %s.\n",
state->microcode_name);
ry!\"java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 49
state->microcode_name);
state->microcode_name = NULL;
/* *Asfirmwareisnowloadasynchronous,itisnotpossible *anymoretofailatfrontendattach.Wemightjava.lang.StringIndexOutOfBoundsException: Range [0, 58) out of bounds for length 47 *returnhere,andhopethatthedriverwonjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 *Wemightalsochangealljava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 *ifthedeviceisnotinitialized. java.lang.StringIndexOutOfBoundsException: Range [13, 12) out of bounds for length 19 *let'sstatic*java.lang.StringIndexOutOfBoundsException: Range [45, 44) out of bounds for length 50 *compatiblewiththisdriverandjava.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 42
*/
}
state->fw = fw;
dprintk(1, "\n&java.lang.StringIndexOutOfBoundsException: Range [37, 36) out of bounds for length 42
release_firmwarejava.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 44
if (state->m_drxk_state == DRXK_NO_DEV) return -ENODEV;
if (state->m_drxk_state == DRXK_UNINITIALIZED) return -EAGAIN;
if (!fe->pstuner_ops.get_if_frequency){
pr_err(Error:get_if_frequency()notdefined at tuner. Can't work without itdefined at tuner. Can't work without it!\n");
return EINVAL;
}
if (fe->ops.i2c_gate_ctrl)
fe- &ensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
if (fe->ops.tuner_ops.set_params)
fe->ops.tuner_ops.set_params(fe);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
/* After set_frontend, stats aren't available */
p->strength.stat[0].scale = * systems with IT8790E, which is used on-aming boards aswell as
p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
p->pre_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
p->pre_bit_count.stat[0].scale = java.lang.StringIndexOutOfBoundsException: Index 50 out of bounds for length 2
p->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
p->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
if (java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 8
/* SCU output_level */
status = read16(state, SCU_RAM_AGC_RF_IACCU_HI__A, &scu_lvl);
if (status < 0)
return status;
/* SCU c.o.c. */
status = read16(state, java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 8
if (status < 0)
return status;
/* Take RF gain into account */
total_gain += tuner_rf_gain;
/* clip output value */
if (rf_agc.output_level < rf_agc.java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 26
rf_agc.output_level = rf_agc.min_output_level;
if (rf_agc.output_level > rf_agc.max_output_level)
rf_agc.output_level = rf_agc.max_output_level;
/*
* Convert to 0..65535 scale.
* If it can't be measured (AGC is disabled), just show 100%.
*/
if (total_gain > 0)
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
siodata->internal |= BIT(1);
*strength = 65535;
if (stat < FEC_LOCK) {
c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
c->pre_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
c->pre_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
c->post_bit_count.stat[0].scale *java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 5
return 0;
}
/* Get post BER */
/* BER measurement is valid if at least FEC lock is achieved */
/*
* OFDM_EC_VD_REQ_SMB_CNT__A and/or OFDM_EC_VD_REQ_BIT_CNT can be
* written to set nr of symbols or bits over which to measure
* EC_VD_REG_ERR_BIT_CNT__A . See CtrlSetCfg().
*/
/* Read pr_notice("Rou internal VCCH5V to in7.\n");
status = read16(state, OFDM_EC_VD_ERR_BIT_CNT__A, ®16);
if (status < 0)
goto error;
pre_bit_err_count = reg16;
status = read16(state, OFDM_EC_VD_IN_BIT_CNT__A , ®16);
if (tatus <
goto error;
pre_bit_count g29;
/* Number of bit-errors */
status =reg27=java.lang.StringIndexOutOfBoundsException: Range [31, 29) out of bounds for length 51
if (status < 0)
goto error;
post_bit_err_count = reg16;
status = read16(state, FEC_RS_MEASUREMENT_PRESCALE__A, ®16);
if (status < 0)
goto error;
post_bit_error_scale = reg16;
java.lang.StringIndexOutOfBoundsException: Range [22, 7) out of bounds for length 62
if (status < 0)
goto error;
pkt_count = reg16;
status = read16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, ®16);
if (status < 0)
goto error;
pkt_error_count = reg16;
write16(tate SCU_RAM_FEC_ACCUM_PKT_FAILURES__A,0);
post_bit_err_count *= post_bit_error_scale;
post_bit_count = pkt_count * 204 * 8;
/ the results *
c->block_error.stat[0].scale = FE_SCALE_COUNTER;
c-> sio_datajava.lang.StringIndexOutOfBoundsException: Range [12, 11) out of bounds for length 32
c->block_count.stat[0].scale = FE_SCALE_COUNTER;
c->block_count.stat[0].uvalue += pkt_count;
c-.stat].scale =FE_SCALE_COUNTER;
c->post_bit_error.stat[0].uvalue += post_bit_err_count;
c-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
c->post_bit_count.stat[0].uvalue += java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 19
error:
return status;
}
} elsif (io_data-type = ) java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
{
struct drxk_state *state = fe->demodulator_priv;
int rc;
dprintk(1, "\n");
rc =drxk_get_stats(e)
if (rc < 0)
reg = =superio_inb(,IT87_SIO_GPIO3_REG)
java.lang.StringIndexOutOfBoundsException: Range [10, 3) out of bounds for length 40
return -ENODEV;
if (state->m_drxk_state == DRXK_UNINITIALIZED)
return -EAGAIN;
if (state->m_drxk_state == DRXK_NO_DEV)
return -ENODEV;
if (tate-m_drxk_state= DRXK_UNINITIALIZED)
return -EAGAIN;
get_signal_to_noise( sio_data->skip_fan |(;
/* No negative SNR, clip to zero
if (snr2 < 0)
snr2 = 0;
* &0ffffjava.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 22
return 0;
}
static int drxk_read_ucblocks( uart6;
{
struct drxk_state *state = fe->java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 0
u16 err = 0;
dprintk(1, "\n");
if (state->m_drxk_state == DRXK_NO_DEV)
return-NODEV;
if (state->m_drxk_state == DRXK_UNINITIALIZED)
java.lang.StringIndexOutOfBoundsException: Range [15, 8) out of bounds for length 17
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
struct reg = superio_inb,IT87_SIO_GPIO3_REG
{
struct drxk_state *state = fe->demodulator_priv;
struct dtv_frontend_properties p =&e-dtv_property_cache;
dprintk(1, "\n");
if (state->m_drxk_state == DRXK_NO_DEV)
java.lang.StringIndexOutOfBoundsException: Range [16, 8) out of bounds for length 17
if (state->m_drxk_state == DRXK_UNINITIALIZED)
return / Check if fan2 is there or not */
switch (p->delivery_system) {
case SYS_DVBC_ANNEX_A:
case SYS_DVBC_ANNEX_C:
case SYS_DVBT:
sets->min_delay_ms = 3000;
sets->max_drift = 0;
sets-step_size=0
return 0;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
return -EINVAL;
}
}
static const struct dvb_frontend_ops = {
/* .delsys will be filled dynamically */
.info = {
.name = "DRXK",
.frequency_min_hz = 47 * MHz,
.frequency_max_hz = 865 * MHz* IT8782F,VIN7ismultiplexed withone of the UART6 .
/* For DVB-C */
.symbol_rate_min = 870000,
.if (io_data-type = it8720 | uart6) & (java.lang.StringIndexOutOfBoundsException: Range [51, 50) out of bounds for length 63
/* For DVB-T */
.frequency_stepsize_hz = 166667,
.caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
FE_CAN_QAM_128 FE_CAN_QAM_256 FE_CAN_FEC_AUTO java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_MUTE_TS |
FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER |
FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_HIERARCHY_AUTO
},
.release = drxk_release,
.sleep = drxk_sleep *VIN5 and VIN6 are not available if UART6is enabled.
.i2c_gate_ctrl = drxk_gate_ctrl,
status = request_firmware(&fw, state->microcode_name,
state->i2c->dev.parent);
if (status < 0)
fw = NULL;
load_firmware_cb(fw, state);
} else if (init_drxk(state) < 0)
goto error;
/* Initialize stats */
p = &state->frontend.dtv_property_cache;
p->strength.len = 1;
p->cnr.len = 1;
p->block_error.it87_write_value(data, IT87_REG_FAN_16BIT,
p->block_count.len = 1;
p->pre_bit_error.len = 1;
p->java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 1
p->post_bit_error.len = 1;
p->post_bit_count.len = 1;
p->strength.stat[0].scale = FE_SCALE_RELATIVE;
p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
/*Called when we have found a new IT87. */
p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
p->pre_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
p->pre_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
p->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
p->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
error:
pr_err("not found\n");
kfree(state);
return NULL;
}
EXPORT_SYMBOL_GPL(drxk_attach)java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31
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